All of lore.kernel.org
 help / color / mirror / Atom feed
From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Subject: [PATCH 10/14] drm/i915: Update format_is_yuv() to include NV12
Date: Tue, 10 Oct 2017 17:47:54 +0530	[thread overview]
Message-ID: <1507637878-17165-11-git-send-email-vidya.srinivas@intel.com> (raw)
In-Reply-To: <1507637878-17165-1-git-send-email-vidya.srinivas@intel.com>

From: Chandra Konduru <chandra.konduru@intel.com>

This patch adds NV12 to format_is_yuv() function
for sprite planes.

v2:
-Use intel_ prefix for format_is_yuv (Ville)

v3: Rebased (me)

v4: Rebased and addressed review comments from Clinton A Taylor.
	"static function in intel_sprite.c is not available
	to the primary plane functions".
	Changed commit message - function modified for
	sprite planes.

v5: Missed the Tested-by/Reviewed-by in the previous series
	Adding the same to commit message in this version.

v6: Rebased (me)

v7: Rebased (me)

v8: Rebased (me)

Tested-by: Clinton Taylor <clinton.a.taylor@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 drivers/gpu/drm/i915/intel_sprite.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b0d6e3e..091bb42 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -42,13 +42,14 @@
 #include "i915_drv.h"
 
 static bool
-format_is_yuv(uint32_t format)
+intel_format_is_yuv(uint32_t format)
 {
 	switch (format) {
 	case DRM_FORMAT_YUYV:
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_VYUY:
 	case DRM_FORMAT_YVYU:
+	case DRM_FORMAT_NV12:
 		return true;
 	default:
 		return false;
@@ -330,7 +331,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
 	enum plane_id plane_id = plane->id;
 
 	/* Seems RGB data bypasses the CSC always */
-	if (!format_is_yuv(format))
+	if (!intel_format_is_yuv(format))
 		return;
 
 	/*
@@ -894,7 +895,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
 		src_y = src->y1 >> 16;
 		src_h = drm_rect_height(src) >> 16;
 
-		if (format_is_yuv(fb->format->format)) {
+		if (intel_format_is_yuv(fb->format->format)) {
 			src_x &= ~1;
 			src_w &= ~1;
 
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-10-10 12:09 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-10 12:17 [PATCH 00/14] Adding NV12 support Vidya Srinivas
2017-10-10 12:17 ` [PATCH 01/14] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2017-10-10 12:17 ` [PATCH 02/14] drm/i915/skl+: refactore WM calculation for NV12 Vidya Srinivas
2017-10-10 12:17 ` [PATCH 03/14] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2017-10-10 12:17 ` [PATCH 04/14] drm/i915/skl+: support varification of DDB HW state for NV12 Vidya Srinivas
2017-10-10 12:17 ` [PATCH 05/14] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2017-10-10 12:17 ` [PATCH 06/14] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2017-10-10 12:17 ` [PATCH 07/14] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2017-10-10 12:17 ` [PATCH 08/14] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2017-10-10 12:17 ` [PATCH 09/14] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2017-10-10 13:53   ` Mahesh Kumar
2017-10-10 20:24     ` Srinivas, Vidya
2017-10-10 12:17 ` Vidya Srinivas [this message]
2017-10-10 12:17 ` [PATCH 11/14] drm/i915: Upscale scaler max scale " Vidya Srinivas
2017-10-10 14:05   ` Mahesh Kumar
2017-10-10 20:26     ` Srinivas, Vidya
2017-10-10 12:17 ` [PATCH 12/14] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2017-10-10 14:09   ` Mahesh Kumar
2017-10-10 14:29     ` Mahesh Kumar
2017-10-10 20:25     ` Srinivas, Vidya
2017-10-16 22:33   ` Kristian Kristensen
2017-10-10 12:17 ` [PATCH 13/14] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2017-10-16 22:35   ` Kristian Kristensen
2017-10-17  3:58     ` Srinivas, Vidya
2017-10-10 12:17 ` [PATCH 14/14] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2017-10-10 12:47 ` ✓ Fi.CI.BAT: success for Adding NV12 support (rev3) Patchwork
2017-10-10 16:48 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1507637878-17165-11-git-send-email-vidya.srinivas@intel.com \
    --to=vidya.srinivas@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.