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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/13] watchdog/aspeed: fix variable type to store reload value
Date: Thu, 12 Oct 2017 17:03:24 +0100	[thread overview]
Message-ID: <1507824216-29058-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1507824216-29058-1-git-send-email-peter.maydell@linaro.org>

From: Cédric Le Goater <clg@kaod.org>

Initially from Anton D. Kachalov" <mouse@yandex-team.ru> but the SoB was
missing.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 20170920064915.30027-1-clg@kaod.org
[clg: change commit log and subject
      replace UL suffix by ULL ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/watchdog/wdt_aspeed.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index 22bce36..95f6ad1 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -100,13 +100,13 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size)
 
 static void aspeed_wdt_reload(AspeedWDTState *s, bool pclk)
 {
-    uint32_t reload;
+    uint64_t reload;
 
     if (pclk) {
         reload = muldiv64(s->regs[WDT_RELOAD_VALUE], NANOSECONDS_PER_SECOND,
                           s->pclk_freq);
     } else {
-        reload = s->regs[WDT_RELOAD_VALUE] * 1000;
+        reload = s->regs[WDT_RELOAD_VALUE] * 1000ULL;
     }
 
     if (aspeed_wdt_is_enabled(s)) {
-- 
2.7.4

  reply	other threads:[~2017-10-12 16:03 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-12 16:03 [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2017-10-12 16:03 ` Peter Maydell [this message]
2017-10-12 16:03 ` [Qemu-devel] [PULL 02/13] arm: fix armv7m_init() declaration to match definition Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 03/13] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 04/13] target/arm: Implement SG instruction Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 05/13] target/arm: Implement BLXNS Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 06/13] target/arm: Implement secure function return Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 07/13] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 08/13] target/arm: Pull Thumb insn word loads up to top level Peter Maydell
2017-12-08 23:09   ` Emilio G. Cota
2017-12-10 18:24     ` Peter Maydell
2017-12-11 15:37       ` Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 09/13] target-arm: Simplify insn_crosses_page() Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 10/13] target/arm: Support some Thumb insns being always unconditional Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 11/13] target/arm: Implement SG instruction corner cases Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 12/13] nvic: Add missing 'break' Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 13/13] nvic: Fix miscalculation of offsets into ITNS array Peter Maydell
2017-10-16  9:22 ` [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell

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