From: Peter Maydell <peter.maydell@linaro.org>
To: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PULL 00/13] target-arm queue
Date: Mon, 16 Oct 2017 10:22:12 +0100 [thread overview]
Message-ID: <CAFEAcA-g7aGDCnQdspj=k+G4LTxe2BPNN_pfM_HVgTcz9WVgWQ@mail.gmail.com> (raw)
In-Reply-To: <1507824216-29058-1-git-send-email-peter.maydell@linaro.org>
On 12 October 2017 at 17:03, Peter Maydell <peter.maydell@linaro.org> wrote:
> target-arm queue:
> * mostly my latest v8M stuff, plus a couple of minor patches
>
> The following changes since commit a0b261db8c030813e30a39eae47359ac2a37f7e2:
>
> Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request' into staging (2017-10-12 10:02:09 +0100)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171012
>
> for you to fetch changes up to cf5f7937b05c84d5565134f058c00cd48304a117:
>
> nvic: Fix miscalculation of offsets into ITNS array (2017-10-12 16:33:16 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * v8M: SG, BLXNS, secure-return
> * v8M: fixes for coverity issues in previous patches
> * arm: fix armv7m_init() declaration to match definition
> * watchdog/aspeed: fix variable type to store reload value
>
Applied, thanks.
-- PMM
next prev parent reply other threads:[~2017-10-16 9:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 16:03 [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 01/13] watchdog/aspeed: fix variable type to store reload value Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 02/13] arm: fix armv7m_init() declaration to match definition Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 03/13] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 04/13] target/arm: Implement SG instruction Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 05/13] target/arm: Implement BLXNS Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 06/13] target/arm: Implement secure function return Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 07/13] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 08/13] target/arm: Pull Thumb insn word loads up to top level Peter Maydell
2017-12-08 23:09 ` Emilio G. Cota
2017-12-10 18:24 ` Peter Maydell
2017-12-11 15:37 ` Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 09/13] target-arm: Simplify insn_crosses_page() Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 10/13] target/arm: Support some Thumb insns being always unconditional Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 11/13] target/arm: Implement SG instruction corner cases Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 12/13] nvic: Add missing 'break' Peter Maydell
2017-10-12 16:03 ` [Qemu-devel] [PULL 13/13] nvic: Fix miscalculation of offsets into ITNS array Peter Maydell
2017-10-16 9:22 ` Peter Maydell [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-03-19 18:34 [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2018-03-20 9:51 ` Peter Maydell
2017-02-07 18:37 Peter Maydell
2017-02-07 18:55 ` Peter Maydell
2017-02-07 19:01 ` no-reply
2015-11-03 14:13 Peter Maydell
2015-11-03 15:31 ` Peter Maydell
2015-10-16 13:57 Peter Maydell
2015-10-17 14:05 ` Peter Maydell
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