[PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Joonas Lahtinen]

When running under virtualization (vGPU active), we must disable
the azy PPGTT page table initialization optimization introduced by:

14826673247e ("drm/i915: Only initialize partially filled pagetables")

We must do this because GVT-g makes unduly assumptions about guest
behaviour, which this optimization breaks. This results in following
looking errors in the host:

ERROR gvt: guest page write error -22, gfn 0x7ada8, pa 0x7ada89a8, var 0x6, len 1

The real fix is to not to depend on i915 driver behaviour, but instead
either rely on only the contracts that i915 has with the hardware, or
add some paravirtualization. While the real fix is en route, it won't
be finished in time for 4.15, so the best option is to disable the
optimization for now when vGPU is active to avoid breaking 4.15 guests
in existing VM environments.

Fixes: 14826673247e ("drm/i915: Only initialize partially filled pagetables")
Suggested-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
[Joonas: Rewrote the commit message and added tags.]
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 527a2d2d6281..5eaa6893daaa 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1341,7 +1341,7 @@ static int gen8_ppgtt_alloc_pd(struct i915_address_space *vm,
 			if (IS_ERR(pt))
 				goto unwind;
 
-			if (count < GEN8_PTES)
+			if (count < GEN8_PTES || intel_vgpu_active(vm->i915))
 				gen8_initialize_pt(vm, pt);
 
 			gen8_ppgtt_set_pde(vm, pd, pt, pde);
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Chris Wilson]

Quoting Joonas Lahtinen (2017-10-18 11:25:43)
> When running under virtualization (vGPU active), we must disable
> the azy PPGTT page table initialization optimization introduced by:
> 
> 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> 
> We must do this because GVT-g makes unduly assumptions about guest
> behaviour, which this optimization breaks. This results in following
> looking errors in the host:
> 
> ERROR gvt: guest page write error -22, gfn 0x7ada8, pa 0x7ada89a8, var 0x6, len 1
> 
> The real fix is to not to depend on i915 driver behaviour, but instead
> either rely on only the contracts that i915 has with the hardware, or
> add some paravirtualization. While the real fix is en route, it won't
> be finished in time for 4.15, so the best option is to disable the
> optimization for now when vGPU is active to avoid breaking 4.15 guests
> in existing VM environments.
> 
> Fixes: 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> Suggested-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> [Joonas: Rewrote the commit message and added tags.]
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>

I do not claim to understand why, even after reading the explanation.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Patchwork]

== Series Details ==

Series: drm/i915: Disable lazy PPGTT page table optimization for vGPU
URL   : https://patchwork.freedesktop.org/series/32201/
State : success

== Summary ==

Series 32201v1 drm/i915: Disable lazy PPGTT page table optimization for vGPU
https://patchwork.freedesktop.org/api/1.0/series/32201/revisions/1/mbox/

Test chamelium:
        Subgroup dp-hpd-fast:
                skip       -> INCOMPLETE (fi-bdw-gvtdvm) fdo#102332
        Subgroup dp-crc-fast:
                fail       -> PASS       (fi-kbl-7500u) fdo#102514

fdo#102332 https://bugs.freedesktop.org/show_bug.cgi?id=102332
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:442s
fi-bdw-gvtdvm    total:10   pass:0    dwarn:0   dfail:0   fail:0   skip:0  
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:372s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:532s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:263s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:497s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:502s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:502s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:479s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:419s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:249s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:576s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:422s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:437s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:479s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:463s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:487s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:574s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:481s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:581s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:650s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:519s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:456s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:566s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:424s
fi-pnv-d510 failed to connect after reboot

8b18ad103908e9ccee79db8c0c29bc5a56ff81f8 drm-tip: 2017y-10m-18d-08h-27m-31s UTC integration manifest
7da37202b77e drm/i915: Disable lazy PPGTT page table optimization for vGPU

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6092/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Patchwork]

== Series Details ==

Series: drm/i915: Disable lazy PPGTT page table optimization for vGPU
URL   : https://patchwork.freedesktop.org/series/32201/
State : success

== Summary ==

Test perf:
        Subgroup polling:
                fail       -> PASS       (shard-hsw) fdo#102252

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hsw        total:2540 pass:1431 dwarn:0   dfail:0   fail:8   skip:1101 time:9262s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6092/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Zhenyu Wang]

[-- Attachment #1.1: Type: text/plain, Size: 2558 bytes --]

On 2017.10.18 13:25:43 +0300, Joonas Lahtinen wrote:
> When running under virtualization (vGPU active), we must disable
> the azy PPGTT page table initialization optimization introduced by:
> 
> 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> 
> We must do this because GVT-g makes unduly assumptions about guest
> behaviour, which this optimization breaks. This results in following
> looking errors in the host:
> 
> ERROR gvt: guest page write error -22, gfn 0x7ada8, pa 0x7ada89a8, var 0x6, len 1
> 
> The real fix is to not to depend on i915 driver behaviour, but instead
> either rely on only the contracts that i915 has with the hardware, or
> add some paravirtualization. While the real fix is en route, it won't
> be finished in time for 4.15, so the best option is to disable the
> optimization for now when vGPU is active to avoid breaking 4.15 guests
> in existing VM environments.
> 
> Fixes: 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> Suggested-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> [Joonas: Rewrote the commit message and added tags.]
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 527a2d2d6281..5eaa6893daaa 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1341,7 +1341,7 @@ static int gen8_ppgtt_alloc_pd(struct i915_address_space *vm,
>  			if (IS_ERR(pt))
>  				goto unwind;
>  
> -			if (count < GEN8_PTES)
> +			if (count < GEN8_PTES || intel_vgpu_active(vm->i915))
>  				gen8_initialize_pt(vm, pt);
>  
>  			gen8_ppgtt_set_pde(vm, pd, pt, pde);
> -- 

Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>

As this optimization would be broken on older kernel for GVT-g, final fix
need to do compat check to really enable this. So ok to fallback for now.

thanks

-- 
Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Joonas Lahtinen]

Yesterday, Zhi was still looking if this could be fixed by a small
modification in the GVT-g side, which would be much preferred.

Zhi, What's the status there?

Regards, Joonas

On Thu, 2017-10-19 at 10:48 +0800, Zhenyu Wang wrote:
> On 2017.10.18 13:25:43 +0300, Joonas Lahtinen wrote:
> > When running under virtualization (vGPU active), we must disable
> > the azy PPGTT page table initialization optimization introduced by:
> > 
> > 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> > 
> > We must do this because GVT-g makes unduly assumptions about guest
> > behaviour, which this optimization breaks. This results in following
> > looking errors in the host:
> > 
> > ERROR gvt: guest page write error -22, gfn 0x7ada8, pa 0x7ada89a8, var 0x6, len 1
> > 
> > The real fix is to not to depend on i915 driver behaviour, but instead
> > either rely on only the contracts that i915 has with the hardware, or
> > add some paravirtualization. While the real fix is en route, it won't
> > be finished in time for 4.15, so the best option is to disable the
> > optimization for now when vGPU is active to avoid breaking 4.15 guests
> > in existing VM environments.
> > 
> > Fixes: 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> > Suggested-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> > Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> > [Joonas: Rewrote the commit message and added tags.]
> > Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Cc: Zhi Wang <zhi.a.wang@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

<SNIP>
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Wang, Zhi A]

Hi Joonas
    Better you can take this patch first, since I was still stuck in floods of creating invalid entries in page table.

Thanks,
Zhi.

-----Original Message-----
From: Joonas Lahtinen [mailto:joonas.lahtinen@linux.intel.com] 
Sent: Friday, October 20, 2017 12:04 PM
To: Zhenyu Wang <zhenyuw@linux.intel.com>; Wang, Zhi A <zhi.a.wang@intel.com>
Cc: Intel graphics driver community testing & development <intel-gfx@lists.freedesktop.org>; Zhang, Xiaolin <xiaolin.zhang@intel.com>; Chris Wilson <chris@chris-wilson.co.uk>; Auld, Matthew <matthew.auld@intel.com>; Jani Nikula <jani.nikula@linux.intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

Yesterday, Zhi was still looking if this could be fixed by a small modification in the GVT-g side, which would be much preferred.

Zhi, What's the status there?

Regards, Joonas

On Thu, 2017-10-19 at 10:48 +0800, Zhenyu Wang wrote:
> On 2017.10.18 13:25:43 +0300, Joonas Lahtinen wrote:
> > When running under virtualization (vGPU active), we must disable the 
> > azy PPGTT page table initialization optimization introduced by:
> > 
> > 14826673247e ("drm/i915: Only initialize partially filled 
> > pagetables")
> > 
> > We must do this because GVT-g makes unduly assumptions about guest 
> > behaviour, which this optimization breaks. This results in following 
> > looking errors in the host:
> > 
> > ERROR gvt: guest page write error -22, gfn 0x7ada8, pa 0x7ada89a8, 
> > var 0x6, len 1
> > 
> > The real fix is to not to depend on i915 driver behaviour, but 
> > instead either rely on only the contracts that i915 has with the 
> > hardware, or add some paravirtualization. While the real fix is en 
> > route, it won't be finished in time for 4.15, so the best option is 
> > to disable the optimization for now when vGPU is active to avoid 
> > breaking 4.15 guests in existing VM environments.
> > 
> > Fixes: 14826673247e ("drm/i915: Only initialize partially filled 
> > pagetables")
> > Suggested-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> > Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> > [Joonas: Rewrote the commit message and added tags.]
> > Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Cc: Zhi Wang <zhi.a.wang@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

<SNIP>
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx