[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[memeka]

From: Marian Mihailescu <mihailescu2m@gmail.com>

Enable support for ARM Performance Monitoring Units available in Cortex-A7
and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).

Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Tested with perf on Odroid XU4 (Exynos5422):
armv7_cortex_a7 PMU driver: 5 counters available
armv7_cortex_a15 PMU driver: 7 counters available

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Willy Wolff <willy.mh.wolff@gmail.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 13 +++++++++++++
 arch/arm/boot/dts/exynos54xx.dtsi | 13 +++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 02d2f89..468059e 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -695,6 +695,19 @@
 			iommus = <&sysmmu_jpeg1>;
 		};
 
+		arm-a15-pmu {
+			compatible = "arm,cortex-a15-pmu";
+			interrupt-parent = <&combiner>;
+			interrupts = <1 2>,
+				<7 0>,
+				<16 6>,
+				<19 2>;
+			interrupt-affinity = <&cpu4>,
+				<&cpu5>,
+				<&cpu6>,
+				<&cpu7>;
+		};
+
 		pmu_system_controller: system-controller@10040000 {
 			compatible = "samsung,exynos5420-pmu", "syscon";
 			reg = <0x10040000 0x5000>;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 8ca4fef..8e007a4 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -79,6 +79,19 @@
 			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		arm-a7-pmu {
+			compatible = "arm,cortex-a7-pmu";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-affinity = <&cpu0>,
+				<&cpu1>,
+				<&cpu2>,
+				<&cpu3>;
+		};
+
 		sss: sss@10830000 {
 			compatible = "samsung,exynos4210-secss";
 			reg = <0x10830000 0x300>;
-- 
2.7.4

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[memeka]

From: Marian Mihailescu <mihailescu2m@gmail.com>

Enable support for ARM Performance Monitoring Units available in Cortex-A7
and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).

Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Tested with perf on Odroid XU4 (Exynos5422):
armv7_cortex_a7 PMU driver: 5 counters available
armv7_cortex_a15 PMU driver: 7 counters available

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Willy Wolff <willy.mh.wolff@gmail.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 13 +++++++++++++
 arch/arm/boot/dts/exynos54xx.dtsi | 13 +++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 02d2f89..468059e 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -695,6 +695,19 @@
 			iommus = <&sysmmu_jpeg1>;
 		};
 
+		arm-a15-pmu {
+			compatible = "arm,cortex-a15-pmu";
+			interrupt-parent = <&combiner>;
+			interrupts = <1 2>,
+				<7 0>,
+				<16 6>,
+				<19 2>;
+			interrupt-affinity = <&cpu4>,
+				<&cpu5>,
+				<&cpu6>,
+				<&cpu7>;
+		};
+
 		pmu_system_controller: system-controller at 10040000 {
 			compatible = "samsung,exynos5420-pmu", "syscon";
 			reg = <0x10040000 0x5000>;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 8ca4fef..8e007a4 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -79,6 +79,19 @@
 			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		arm-a7-pmu {
+			compatible = "arm,cortex-a7-pmu";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-affinity = <&cpu0>,
+				<&cpu1>,
+				<&cpu2>,
+				<&cpu3>;
+		};
+
 		sss: sss at 10830000 {
 			compatible = "samsung,exynos4210-secss";
 			reg = <0x10830000 0x300>;
-- 
2.7.4

Re: [PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Krzysztof Kozlowski]

On Sat, Oct 21, 2017 at 05:54:31PM +1030, Marian Mihailescu wrote:
> Hi Robin,
> 
> Apologies, I did not really check which cluster is described for the
> 5410 (since 5422 boots from the A7).
> 
> Should I define both pmu nodes (w/o interrupt affinity) in the
> exynos54xx,dtsi, and set the status property to "disabled"?
> And then add the interrupt affinity to the SoC variant, and enable
> them as required...

After putting it under common exynos54xx you would have to anyway
override/extend most of the nodes so I think there is no much sense for
that. Instead it should be in exynos5410.dtsi and exynos5422.dtsi.

> 
> The problem that I see however is that, while 5410 is easy to deal
> with (it has the cpus defined in exynos5420.dtsi for all boards), 542x
> variants have the cpus included in the board dts. So there would be
> the same pmu nodes with interrupt affinity copied in all 542x and 5800
> boards dts (and there are several of them), instead of being included
> in exynos542x.dtsi...

You mean exynos5420-cpus.dtsi, not board DTS?

For exynos542x/5800 you could indeed add it directly to
exynos542x-cpus.dtsi, following existing pattern about cpus (with
comment).


Best regards,
Krzysztof

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Krzysztof Kozlowski]

On Sat, Oct 21, 2017 at 05:54:31PM +1030, Marian Mihailescu wrote:
> Hi Robin,
> 
> Apologies, I did not really check which cluster is described for the
> 5410 (since 5422 boots from the A7).
> 
> Should I define both pmu nodes (w/o interrupt affinity) in the
> exynos54xx,dtsi, and set the status property to "disabled"?
> And then add the interrupt affinity to the SoC variant, and enable
> them as required...

After putting it under common exynos54xx you would have to anyway
override/extend most of the nodes so I think there is no much sense for
that. Instead it should be in exynos5410.dtsi and exynos5422.dtsi.

> 
> The problem that I see however is that, while 5410 is easy to deal
> with (it has the cpus defined in exynos5420.dtsi for all boards), 542x
> variants have the cpus included in the board dts. So there would be
> the same pmu nodes with interrupt affinity copied in all 542x and 5800
> boards dts (and there are several of them), instead of being included
> in exynos542x.dtsi...

You mean exynos5420-cpus.dtsi, not board DTS?

For exynos542x/5800 you could indeed add it directly to
exynos542x-cpus.dtsi, following existing pattern about cpus (with
comment).


Best regards,
Krzysztof

Re: [PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Marian Mihailescu]

Hi Robin,

Apologies, I did not really check which cluster is described for the
5410 (since 5422 boots from the A7).

Should I define both pmu nodes (w/o interrupt affinity) in the
exynos54xx,dtsi, and set the status property to "disabled"?
And then add the interrupt affinity to the SoC variant, and enable
them as required...

The problem that I see however is that, while 5410 is easy to deal
with (it has the cpus defined in exynos5420.dtsi for all boards), 542x
variants have the cpus included in the board dts. So there would be
the same pmu nodes with interrupt affinity copied in all 542x and 5800
boards dts (and there are several of them), instead of being included
in exynos542x.dtsi...

Any thoughts about this?

Thanks,
Marian

Either I've been missing something or nothing has been going on. (K. E. Gordon)


On Sat, Oct 21, 2017 at 2:45 AM, Robin Murphy <robin.murphy@arm.com> wrote:
> On 20/10/17 13:09, Marian Mihailescu wrote:
>> Hi,
>>
>> This patch enables support for ARM Performance Monitoring Units
>> available in Cortex-A7
>> and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).
>>
>> Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
>> so the Cortex-A15 PMU is defined in the exynos5420 device tree file.
>
> Huh? 5410 only has the *A15* cluster described (and for whatever reason
> mainline cannot bring up the A7 cluster even if you do add it).
>
> Also*, the interrupt affinity properties are bogus as presented - those
> will need to be delegated to the SoC-variant-specific dtsi files in the
> same manner as the "cpus" nodes, to cope with the different CPU numberings.
>
> Robin.
>
> *I'd like to have made this comment inline in the patch, but I can't :(
>
>> Tested with perf on Odroid XU4 (Exynos5422):
>> armv7_cortex_a7 PMU driver: 5 counters available
>> armv7_cortex_a15 PMU driver: 7 counters available
>>
>> Regards,
>> Marian
>>
>> --
>> Either I've been missing something or nothing has been going on. (K. E. Gordon)
>>
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Marian Mihailescu]

Hi Robin,

Apologies, I did not really check which cluster is described for the
5410 (since 5422 boots from the A7).

Should I define both pmu nodes (w/o interrupt affinity) in the
exynos54xx,dtsi, and set the status property to "disabled"?
And then add the interrupt affinity to the SoC variant, and enable
them as required...

The problem that I see however is that, while 5410 is easy to deal
with (it has the cpus defined in exynos5420.dtsi for all boards), 542x
variants have the cpus included in the board dts. So there would be
the same pmu nodes with interrupt affinity copied in all 542x and 5800
boards dts (and there are several of them), instead of being included
in exynos542x.dtsi...

Any thoughts about this?

Thanks,
Marian

Either I've been missing something or nothing has been going on. (K. E. Gordon)


On Sat, Oct 21, 2017 at 2:45 AM, Robin Murphy <robin.murphy@arm.com> wrote:
> On 20/10/17 13:09, Marian Mihailescu wrote:
>> Hi,
>>
>> This patch enables support for ARM Performance Monitoring Units
>> available in Cortex-A7
>> and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).
>>
>> Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
>> so the Cortex-A15 PMU is defined in the exynos5420 device tree file.
>
> Huh? 5410 only has the *A15* cluster described (and for whatever reason
> mainline cannot bring up the A7 cluster even if you do add it).
>
> Also*, the interrupt affinity properties are bogus as presented - those
> will need to be delegated to the SoC-variant-specific dtsi files in the
> same manner as the "cpus" nodes, to cope with the different CPU numberings.
>
> Robin.
>
> *I'd like to have made this comment inline in the patch, but I can't :(
>
>> Tested with perf on Odroid XU4 (Exynos5422):
>> armv7_cortex_a7 PMU driver: 5 counters available
>> armv7_cortex_a15 PMU driver: 7 counters available
>>
>> Regards,
>> Marian
>>
>> --
>> Either I've been missing something or nothing has been going on. (K. E. Gordon)
>>
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>

Re: [PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Robin Murphy]

On 20/10/17 13:09, Marian Mihailescu wrote:
> Hi,
> 
> This patch enables support for ARM Performance Monitoring Units
> available in Cortex-A7
> and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).
> 
> Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
> so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Huh? 5410 only has the *A15* cluster described (and for whatever reason
mainline cannot bring up the A7 cluster even if you do add it).

Also*, the interrupt affinity properties are bogus as presented - those
will need to be delegated to the SoC-variant-specific dtsi files in the
same manner as the "cpus" nodes, to cope with the different CPU numberings.

Robin.

*I'd like to have made this comment inline in the patch, but I can't :(

> Tested with perf on Odroid XU4 (Exynos5422):
> armv7_cortex_a7 PMU driver: 5 counters available
> armv7_cortex_a15 PMU driver: 7 counters available
> 
> Regards,
> Marian
> 
> --
> Either I've been missing something or nothing has been going on. (K. E. Gordon)
> 
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Robin Murphy]

On 20/10/17 13:09, Marian Mihailescu wrote:
> Hi,
> 
> This patch enables support for ARM Performance Monitoring Units
> available in Cortex-A7
> and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).
> 
> Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
> so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Huh? 5410 only has the *A15* cluster described (and for whatever reason
mainline cannot bring up the A7 cluster even if you do add it).

Also*, the interrupt affinity properties are bogus as presented - those
will need to be delegated to the SoC-variant-specific dtsi files in the
same manner as the "cpus" nodes, to cope with the different CPU numberings.

Robin.

*I'd like to have made this comment inline in the patch, but I can't :(

> Tested with perf on Odroid XU4 (Exynos5422):
> armv7_cortex_a7 PMU driver: 5 counters available
> armv7_cortex_a15 PMU driver: 7 counters available
> 
> Regards,
> Marian
> 
> --
> Either I've been missing something or nothing has been going on. (K. E. Gordon)
> 
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

Re: [PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Krzysztof Kozlowski]

On Fri, Oct 20, 2017 at 2:09 PM, Marian Mihailescu
<mihailescu2m@gmail.com> wrote:
> Hi,
>
> This patch enables support for ARM Performance Monitoring Units
> available in Cortex-A7
> and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).
>
> Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
> so the Cortex-A15 PMU is defined in the exynos5420 device tree file.
>
> Tested with perf on Odroid XU4 (Exynos5422):
> armv7_cortex_a7 PMU driver: 5 counters available
> armv7_cortex_a15 PMU driver: 7 counters available

Please send this as simple text mail, not a multi-part message with
attachments. I cannot comment inline for multi-part, not mentioning
that patch is not being displayed at all. Probably this is also the
reason why patch is not present in patchwork
(https://patchwork.kernel.org/project/linux-samsung-soc/list/).

The easiest is to just run "git format-patch -1" and then "git
send-email --to .. --cc .. 0001-*".

Best regards,
Krzysztof

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Krzysztof Kozlowski]

On Fri, Oct 20, 2017 at 2:09 PM, Marian Mihailescu
<mihailescu2m@gmail.com> wrote:
> Hi,
>
> This patch enables support for ARM Performance Monitoring Units
> available in Cortex-A7
> and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).
>
> Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
> so the Cortex-A15 PMU is defined in the exynos5420 device tree file.
>
> Tested with perf on Odroid XU4 (Exynos5422):
> armv7_cortex_a7 PMU driver: 5 counters available
> armv7_cortex_a15 PMU driver: 7 counters available

Please send this as simple text mail, not a multi-part message with
attachments. I cannot comment inline for multi-part, not mentioning
that patch is not being displayed at all. Probably this is also the
reason why patch is not present in patchwork
(https://patchwork.kernel.org/project/linux-samsung-soc/list/).

The easiest is to just run "git format-patch -1" and then "git
send-email --to .. --cc .. 0001-*".

Best regards,
Krzysztof

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Marian Mihailescu]

[-- Attachment #1: Type: text/plain, Size: 555 bytes --]

Hi,

This patch enables support for ARM Performance Monitoring Units
available in Cortex-A7
and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).

Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Tested with perf on Odroid XU4 (Exynos5422):
armv7_cortex_a7 PMU driver: 5 counters available
armv7_cortex_a15 PMU driver: 7 counters available

Regards,
Marian

--
Either I've been missing something or nothing has been going on. (K. E. Gordon)

[-- Attachment #2: 0001-ARM-dts-exynos-add-cpu-perf-counters-to-Exynos54xx-b.patch --]
[-- Type: application/octet-stream, Size: 2272 bytes --]

From: Marian Mihailescu <mihailescu2m@gmail.com>
Date: Fri, 20 Oct 2017 20:09:32 +1030
Subject: [PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

Enable support for ARM Performance Monitoring Units available in Cortex-A7
and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).

Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Tested with perf on Odroid XU4 (Exynos5422):
armv7_cortex_a7 PMU driver: 5 counters available
armv7_cortex_a15 PMU driver: 7 counters available

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Willy Wolff <willy.mh.wolff@gmail.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 13 +++++++++++++
 arch/arm/boot/dts/exynos54xx.dtsi | 13 +++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 02d2f89..468059e 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -695,6 +695,19 @@
 			iommus = <&sysmmu_jpeg1>;
 		};
 
+		arm-a15-pmu {
+			compatible = "arm,cortex-a15-pmu";
+			interrupt-parent = <&combiner>;
+			interrupts = <1 2>,
+				<7 0>,
+				<16 6>,
+				<19 2>;
+			interrupt-affinity = <&cpu4>,
+				<&cpu5>,
+				<&cpu6>,
+				<&cpu7>;
+		};
+
 		pmu_system_controller: system-controller@10040000 {
 			compatible = "samsung,exynos5420-pmu", "syscon";
 			reg = <0x10040000 0x5000>;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 8ca4fef..8e007a4 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -79,6 +79,19 @@
 			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		arm-a7-pmu {
+			compatible = "arm,cortex-a7-pmu";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-affinity = <&cpu0>,
+				<&cpu1>,
+				<&cpu2>,
+				<&cpu3>;
+		};
+
 		sss: sss@10830000 {
 			compatible = "samsung,exynos4210-secss";
 			reg = <0x10830000 0x300>;
-- 
2.7.4

[PATCH] ARM: dts: exynos: add cpu perf counters to Exynos54xx boards

[Marian Mihailescu]

Hi,

This patch enables support for ARM Performance Monitoring Units
available in Cortex-A7
and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800).

Exynos5410 currently has only Cortex-A7 nodes defined in the device tree,
so the Cortex-A15 PMU is defined in the exynos5420 device tree file.

Tested with perf on Odroid XU4 (Exynos5422):
armv7_cortex_a7 PMU driver: 5 counters available
armv7_cortex_a15 PMU driver: 7 counters available

Regards,
Marian

--
Either I've been missing something or nothing has been going on. (K. E. Gordon)
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