* [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support
@ 2017-10-30 16:07 Geert Uytterhoeven
2017-10-30 16:07 ` [PATCH 1/2] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Geert Uytterhoeven
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2017-10-30 16:07 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, Geert Uytterhoeven
Hi Simon, Magnus,
This patch series enables SMP support on the R-Car V3M SoC, by adding
the second Cortex-A53 CPU core. It also adds the performance monitor
unit, and links it to both CPU cores.
Note that the PSCI implementation on Eagle may be a preliminary version
with some familiar quirks:
- SMP bringup works, and both CPUs can be used,
- Offlining CPU0 crashes the system,
- CPU1 can be offlined, but trying to bring it online again crashes
the system, too.
I'm confident these will be fixed in future firmware versions, just like
on H3/Salvator-X.
Thanks!
Geert Uytterhoeven (2):
arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
--
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
2017-10-30 16:07 [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support Geert Uytterhoeven
@ 2017-10-30 16:07 ` Geert Uytterhoeven
2017-10-30 16:07 ` [PATCH 2/2] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node Geert Uytterhoeven
2017-11-01 8:40 ` Simon Horman
2 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2017-10-30 16:07 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, Geert Uytterhoeven
Add a device node for the second Cortex-A53 CPU core on the Renesas
R-Car V3M (r8a77970) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 75d09f1724f02c1d..583ebb4c5eac0bfe 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -37,6 +37,16 @@
enable-method = "psci";
};
+ a53_1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <1>;
+ clocks = <&cpg CPG_CORE 0>;
+ power-domains = <&sysc 6>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
L2_CA53: cache-controller {
compatible = "cache";
power-domains = <&sysc 21>;
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
2017-10-30 16:07 [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support Geert Uytterhoeven
2017-10-30 16:07 ` [PATCH 1/2] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Geert Uytterhoeven
@ 2017-10-30 16:07 ` Geert Uytterhoeven
2017-11-01 8:40 ` Simon Horman
2 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2017-10-30 16:07 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-renesas-soc, linux-arm-kernel, Geert Uytterhoeven
Enable the performance monitor unit for the Cortex-A53 cores on the
R-Car V3M (r8a77970) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 583ebb4c5eac0bfe..449c221dfe9b4dcb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -113,6 +113,13 @@
IRQ_TYPE_LEVEL_LOW)>;
};
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a53_0>, <&a53_1>;
+ };
+
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a77970-wdt",
"renesas,rcar-gen3-wdt";
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support
2017-10-30 16:07 [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support Geert Uytterhoeven
@ 2017-11-01 8:40 ` Simon Horman
2017-10-30 16:07 ` [PATCH 2/2] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node Geert Uytterhoeven
2017-11-01 8:40 ` Simon Horman
2 siblings, 0 replies; 5+ messages in thread
From: Simon Horman @ 2017-11-01 8:40 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Magnus Damm, linux-renesas-soc, linux-arm-kernel
On Mon, Oct 30, 2017 at 05:07:11PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series enables SMP support on the R-Car V3M SoC, by adding
> the second Cortex-A53 CPU core. It also adds the performance monitor
> unit, and links it to both CPU cores.
>
> Note that the PSCI implementation on Eagle may be a preliminary version
> with some familiar quirks:
> - SMP bringup works, and both CPUs can be used,
> - Offlining CPU0 crashes the system,
> - CPU1 can be offlined, but trying to bring it online again crashes
> the system, too.
>
> I'm confident these will be fixed in future firmware versions, just like
> on H3/Salvator-X.
I'd like to understand how confident before applying this series.
I have been burnt in the past by enabling SMP before the fw/hw/sw stack
was ready (on H3 IIRC) and I'd rather not relive that experience.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support
@ 2017-11-01 8:40 ` Simon Horman
0 siblings, 0 replies; 5+ messages in thread
From: Simon Horman @ 2017-11-01 8:40 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 30, 2017 at 05:07:11PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series enables SMP support on the R-Car V3M SoC, by adding
> the second Cortex-A53 CPU core. It also adds the performance monitor
> unit, and links it to both CPU cores.
>
> Note that the PSCI implementation on Eagle may be a preliminary version
> with some familiar quirks:
> - SMP bringup works, and both CPUs can be used,
> - Offlining CPU0 crashes the system,
> - CPU1 can be offlined, but trying to bring it online again crashes
> the system, too.
>
> I'm confident these will be fixed in future firmware versions, just like
> on H3/Salvator-X.
I'd like to understand how confident before applying this series.
I have been burnt in the past by enabling SMP before the fw/hw/sw stack
was ready (on H3 IIRC) and I'd rather not relive that experience.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-11-01 8:40 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2017-10-30 16:07 [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support Geert Uytterhoeven
2017-10-30 16:07 ` [PATCH 1/2] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Geert Uytterhoeven
2017-10-30 16:07 ` [PATCH 2/2] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node Geert Uytterhoeven
2017-11-01 8:40 ` [PATCH 0/2] arm64: dts: renesas: r8a77970: Add SMP Support Simon Horman
2017-11-01 8:40 ` Simon Horman
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