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From: Shanker Donthineni <shankerd@codeaurora.org>
To: Will Deacon <will.deacon@arm.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Matt Fleming <matt@codeblueprint.co.uk>,
	Christoffer Dall <christoffer.dall@linaro.org>,
	linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org,
	kvmarm@lists.cs.columbia.edu,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Neil Leeder <nleeder@codeaurora.org>
Subject: [PATCH 1/3] arm64: Define cputype macros for Falkor CPU
Date: Thu,  2 Nov 2017 22:27:42 -0500	[thread overview]
Message-ID: <1509679664-3749-2-git-send-email-shankerd@codeaurora.org> (raw)
In-Reply-To: <1509679664-3749-1-git-send-email-shankerd@codeaurora.org>

Add cputype definition macros for Qualcomm Datacenter Technologies
Falkor CPU in cputype.h. It's unfortunate that the first revision
of the Falkor CPU used the wrong part number 0x800, got fixed in v2
chip with part number 0xC00, and would be used the same value for
future revisions.

Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
---
 arch/arm64/include/asm/cputype.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 235e77d..cbf08d7 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -91,6 +91,7 @@
 #define BRCM_CPU_PART_VULCAN		0x516
 
 #define QCOM_CPU_PART_FALKOR_V1		0x800
+#define QCOM_CPU_PART_FALKOR		0xC00
 
 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
 #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
@@ -99,6 +100,7 @@
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
 #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)
+#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR)
 
 #ifndef __ASSEMBLY__
 
-- 
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

WARNING: multiple messages have this Message-ID (diff)
From: Shanker Donthineni <shankerd@codeaurora.org>
To: Will Deacon <will.deacon@arm.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Matt Fleming <matt@codeblueprint.co.uk>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Neil Leeder <nleeder@codeaurora.org>,
	linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu
Subject: [PATCH 1/3] arm64: Define cputype macros for Falkor CPU
Date: Thu,  2 Nov 2017 22:27:42 -0500	[thread overview]
Message-ID: <1509679664-3749-2-git-send-email-shankerd@codeaurora.org> (raw)
In-Reply-To: <1509679664-3749-1-git-send-email-shankerd@codeaurora.org>

Add cputype definition macros for Qualcomm Datacenter Technologies
Falkor CPU in cputype.h. It's unfortunate that the first revision
of the Falkor CPU used the wrong part number 0x800, got fixed in v2
chip with part number 0xC00, and would be used the same value for
future revisions.

Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
---
 arch/arm64/include/asm/cputype.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 235e77d..cbf08d7 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -91,6 +91,7 @@
 #define BRCM_CPU_PART_VULCAN		0x516
 
 #define QCOM_CPU_PART_FALKOR_V1		0x800
+#define QCOM_CPU_PART_FALKOR		0xC00
 
 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
 #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
@@ -99,6 +100,7 @@
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
 #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)
+#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR)
 
 #ifndef __ASSEMBLY__
 
-- 
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

WARNING: multiple messages have this Message-ID (diff)
From: shankerd@codeaurora.org (Shanker Donthineni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: Define cputype macros for Falkor CPU
Date: Thu,  2 Nov 2017 22:27:42 -0500	[thread overview]
Message-ID: <1509679664-3749-2-git-send-email-shankerd@codeaurora.org> (raw)
In-Reply-To: <1509679664-3749-1-git-send-email-shankerd@codeaurora.org>

Add cputype definition macros for Qualcomm Datacenter Technologies
Falkor CPU in cputype.h. It's unfortunate that the first revision
of the Falkor CPU used the wrong part number 0x800, got fixed in v2
chip with part number 0xC00, and would be used the same value for
future revisions.

Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
---
 arch/arm64/include/asm/cputype.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 235e77d..cbf08d7 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -91,6 +91,7 @@
 #define BRCM_CPU_PART_VULCAN		0x516
 
 #define QCOM_CPU_PART_FALKOR_V1		0x800
+#define QCOM_CPU_PART_FALKOR		0xC00
 
 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
 #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
@@ -99,6 +100,7 @@
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
 #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)
+#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR)
 
 #ifndef __ASSEMBLY__
 
-- 
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

  reply	other threads:[~2017-11-03  3:28 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-03  3:27 [PATCH 0/3] Implement a software workaround for Falkor erratum 1041 Shanker Donthineni
2017-11-03  3:27 ` Shanker Donthineni
2017-11-03  3:27 ` Shanker Donthineni
2017-11-03  3:27 ` Shanker Donthineni [this message]
2017-11-03  3:27   ` [PATCH 1/3] arm64: Define cputype macros for Falkor CPU Shanker Donthineni
2017-11-03  3:27   ` Shanker Donthineni
2017-11-03  3:27 ` [PATCH 2/3] arm64: Prepare SCTLR_ELn accesses to handle Falkor erratum 1041 Shanker Donthineni
2017-11-03  3:27   ` Shanker Donthineni
2017-11-03  3:27   ` Shanker Donthineni
2017-11-03  3:27 ` [PATCH 3/3] arm64: Add software workaround for " Shanker Donthineni
2017-11-03  3:27   ` Shanker Donthineni
2017-11-03  3:27   ` Shanker Donthineni
2017-11-03 15:11   ` Robin Murphy
2017-11-03 15:11     ` Robin Murphy
2017-11-03 15:11     ` Robin Murphy
2017-11-04 21:43     ` Shanker Donthineni
2017-11-04 21:43       ` Shanker Donthineni
2017-11-04 21:43       ` Shanker Donthineni
2017-11-09 11:08       ` James Morse
2017-11-09 11:08         ` James Morse
2017-11-09 11:08         ` James Morse
2017-11-09 15:22         ` Shanker Donthineni
2017-11-09 15:22           ` Shanker Donthineni
2017-11-09 15:22           ` Shanker Donthineni
2017-11-10 10:24           ` James Morse
2017-11-10 10:24             ` James Morse
2017-11-10 10:24             ` James Morse
2017-11-13  1:06             ` Shanker Donthineni
2017-11-13  1:06               ` Shanker Donthineni
2017-11-13  1:06               ` Shanker Donthineni
2017-11-08 19:05   ` [3/3] " Manoj Iyer
2017-11-08 19:05     ` Manoj Iyer
2017-11-08 19:05     ` Manoj Iyer
2017-11-09 11:06     ` James Morse
2017-11-09 11:06       ` James Morse
2017-11-09 11:06       ` James Morse
2017-11-09 15:52       ` Manoj Iyer
2017-11-09 15:52         ` Manoj Iyer
2017-11-09 15:52         ` Manoj Iyer
2017-11-09 16:14         ` Manoj Iyer
2017-11-09 16:14           ` Manoj Iyer
2017-11-09 16:14           ` Manoj Iyer
2017-11-09 16:58           ` Manoj Iyer
2017-11-09 16:58             ` Manoj Iyer
2017-11-09 16:58             ` Manoj Iyer
2017-11-10 17:49             ` Manoj Iyer
2017-11-10 17:49               ` Manoj Iyer
2017-11-10 17:49               ` Manoj Iyer
2017-11-15 15:12               ` Manoj Iyer
2017-11-15 15:12                 ` Manoj Iyer
2017-11-15 15:12                 ` Manoj Iyer

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