[PATCH 0/7] Add Plane Color Properties

[PATCH 0/7] Add Plane Color Properties

[Uma Shankar]

This patch series adds properties for plane color features. It adds
properties for degamma used to linearize data, CSC used for gamut
conversion, and gamma used to again non-linearize data as per panel
supported color space. These can be utilize by user space to convert
planes from one format to another, one color space to another etc.

Usersapce can take smart blending decisions and utilize these hardware
supported plane color features to get accurate color profile. The same
can help in consistent color quality from source to panel taking
advantage of advanced color features in hardware.

These patches just add the property interfaces and enable helper functions.

This series adds Intel Gen9 specific plane gamma feature. We can build up
and add other platform/hardware specific implementation on top of this series

Note: This is just to get a design feedback whether these interfaces look ok. 
Based on community feedback on interfaces, we will implement IGT tests to validate
plane color features. This is un-tested currently. 

v2: Dropped legacy gamma table for plane as suggested by Maarten. Added Gen9/BDW plane
    gamma feature and rebase on tot.

Uma Shankar (7):
  drm: Add Plane Degamma properties
  drm: Add Plane CTM property
  drm: Add Plane Gamma properties
  drm: Define helper function for plane color enabling
  drm/i915: Enable plane color features
  drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms
  drm/i915: Load plane color luts from atomic flip

 drivers/gpu/drm/drm_atomic.c              |   30 +++++++++++
 drivers/gpu/drm/drm_atomic_helper.c       |   12 +++++
 drivers/gpu/drm/drm_mode_config.c         |   35 +++++++++++++
 drivers/gpu/drm/drm_plane.c               |   45 +++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h           |   10 ++++
 drivers/gpu/drm/i915/i915_pci.c           |    5 +-
 drivers/gpu/drm/i915/i915_reg.h           |   24 +++++++++
 drivers/gpu/drm/i915/intel_atomic_plane.c |    4 ++
 drivers/gpu/drm/i915/intel_color.c        |   78 +++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c      |    4 ++
 drivers/gpu/drm/i915/intel_drv.h          |   10 ++++
 drivers/gpu/drm/i915/intel_sprite.c       |    4 ++
 include/drm/drm_color_mgmt.h              |    5 ++
 include/drm/drm_mode_config.h             |   28 +++++++++++
 include/drm/drm_plane.h                   |   27 ++++++++++
 15 files changed, 320 insertions(+), 1 deletion(-)

-- 
1.7.9.5

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[RFC 1/7] drm: Add Plane Degamma properties

[Uma Shankar]

Add Plane Degamma as a blob property and plane
degamma size as a range property.

v2: Rebase

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/drm_atomic.c        |   12 ++++++++++++
 drivers/gpu/drm/drm_atomic_helper.c |    6 ++++++
 drivers/gpu/drm/drm_mode_config.c   |   14 ++++++++++++++
 include/drm/drm_mode_config.h       |   11 +++++++++++
 include/drm/drm_plane.h             |   10 ++++++++++
 5 files changed, 53 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 7e0e7be..30853c7 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -713,6 +713,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 {
 	struct drm_device *dev = plane->dev;
 	struct drm_mode_config *config = &dev->mode_config;
+	bool replaced = false;
+	int ret;
 
 	if (property == config->prop_fb_id) {
 		struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, val);
@@ -758,6 +760,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
+	} else if (property == config->plane_degamma_lut_property) {
+		ret = drm_atomic_replace_property_blob_from_id(dev,
+					&state->degamma_lut,
+					val, -1, &replaced);
+		state->color_mgmt_changed |= replaced;
+		return ret;
 	} else {
 		return -EINVAL;
 	}
@@ -816,6 +824,9 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 		*val = state->zpos;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
+	} else if (property == config->plane_degamma_lut_property) {
+		*val = (state->degamma_lut) ?
+			state->degamma_lut->base.id : 0;
 	} else {
 		return -EINVAL;
 	}
@@ -953,6 +964,7 @@ static void drm_atomic_plane_print_state(struct drm_printer *p,
 	drm_printf(p, "\tcrtc-pos=" DRM_RECT_FMT "\n", DRM_RECT_ARG(&dest));
 	drm_printf(p, "\tsrc-pos=" DRM_RECT_FP_FMT "\n", DRM_RECT_FP_ARG(&src));
 	drm_printf(p, "\trotation=%x\n", state->rotation);
+	drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed);
 
 	if (plane->funcs->atomic_print_state)
 		plane->funcs->atomic_print_state(p, state);
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 71d712f..ba924cf 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3395,6 +3395,10 @@ void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
 
 	state->fence = NULL;
 	state->commit = NULL;
+
+	if (state->degamma_lut)
+		drm_property_blob_get(state->degamma_lut);
+	state->color_mgmt_changed = false;
 }
 EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
 
@@ -3439,6 +3443,8 @@ void __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)
 
 	if (state->commit)
 		drm_crtc_commit_put(state->commit);
+
+	drm_property_blob_put(state->degamma_lut);
 }
 EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
 
diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
index cda8bfa..118f6ac 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -348,6 +348,20 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.modifiers_property = prop;
 
+	prop = drm_property_create(dev,
+			DRM_MODE_PROP_BLOB,
+			"PLANE_DEGAMMA_LUT", 0);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.plane_degamma_lut_property = prop;
+
+	prop = drm_property_create_range(dev,
+			DRM_MODE_PROP_IMMUTABLE,
+			"PLANE_DEGAMMA_LUT_SIZE", 0, UINT_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.plane_degamma_lut_size_property = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 0b4ac2e..6ee2df6 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -718,6 +718,17 @@ struct drm_mode_config {
 	struct drm_property *gamma_lut_size_property;
 
 	/**
+	 * @plane_degamma_lut_property: Optional Plane property to set the LUT
+	 * used to convert the framebuffer's colors to linear gamma.
+	 */
+	struct drm_property *plane_degamma_lut_property;
+	/**
+	 * @plane_degamma_lut_size_property: Optional Plane property for the
+	 * size of the degamma LUT as supported by the driver (read-only).
+	 */
+	struct drm_property *plane_degamma_lut_size_property;
+
+	/**
 	 * @suggested_x_property: Optional connector property with a hint for
 	 * the position of the output on the host's screen.
 	 */
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 069c4c8..d112c50 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -123,6 +123,14 @@ struct drm_plane_state {
 	 */
 	bool visible;
 
+	/* @degamma_lut:
+	 *
+	 * Lookup table for converting framebuffer pixel data before apply the
+	 * color conversion matrix @ctm. See drm_plane_enable_color_mgmt(). The
+	 * blob (if not NULL) is an array of &struct drm_color_lut.
+	 */
+	struct drm_property_blob *degamma_lut;
+
 	/**
 	 * @commit: Tracks the pending commit to prevent use-after-free conditions,
 	 * and for async plane updates.
@@ -132,6 +140,8 @@ struct drm_plane_state {
 	struct drm_crtc_commit *commit;
 
 	struct drm_atomic_state *state;
+
+	bool color_mgmt_changed : 1;
 };
 
 static inline struct drm_rect
-- 
1.7.9.5

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[RFC 2/7] drm: Add Plane CTM property

[Uma Shankar]

Add a blob property for plane CSC usage.

v2: Rebase

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/drm_atomic.c        |   10 ++++++++++
 drivers/gpu/drm/drm_atomic_helper.c |    3 +++
 drivers/gpu/drm/drm_mode_config.c   |    7 +++++++
 include/drm/drm_mode_config.h       |    6 ++++++
 include/drm/drm_plane.h             |    8 ++++++++
 5 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 30853c7..45aede5 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -766,6 +766,14 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 					val, -1, &replaced);
 		state->color_mgmt_changed |= replaced;
 		return ret;
+	} else if (property == config->plane_ctm_property) {
+		ret = drm_atomic_replace_property_blob_from_id(dev,
+					&state->ctm,
+					val,
+					sizeof(struct drm_color_ctm),
+					&replaced);
+		state->color_mgmt_changed |= replaced;
+		return ret;
 	} else {
 		return -EINVAL;
 	}
@@ -827,6 +835,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 	} else if (property == config->plane_degamma_lut_property) {
 		*val = (state->degamma_lut) ?
 			state->degamma_lut->base.id : 0;
+	} else if (property == config->plane_ctm_property) {
+		*val = (state->ctm) ? state->ctm->base.id : 0;
 	} else {
 		return -EINVAL;
 	}
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index ba924cf..d3154e0 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3398,6 +3398,8 @@ void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
 
 	if (state->degamma_lut)
 		drm_property_blob_get(state->degamma_lut);
+	if (state->ctm)
+		drm_property_blob_get(state->ctm);
 	state->color_mgmt_changed = false;
 }
 EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
@@ -3445,6 +3447,7 @@ void __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)
 		drm_crtc_commit_put(state->commit);
 
 	drm_property_blob_put(state->degamma_lut);
+	drm_property_blob_put(state->ctm);
 }
 EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
 
diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
index 118f6ac..bccc70e 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -362,6 +362,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.plane_degamma_lut_size_property = prop;
 
+	prop = drm_property_create(dev,
+			DRM_MODE_PROP_BLOB,
+			"PLANE_CTM", 0);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.plane_ctm_property = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 6ee2df6..3bf7fc6 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -727,6 +727,12 @@ struct drm_mode_config {
 	 * size of the degamma LUT as supported by the driver (read-only).
 	 */
 	struct drm_property *plane_degamma_lut_size_property;
+	/**
+	 * @plane_ctm_property: Optional CRTC property to set the
+	 * matrix used to convert colors after the lookup in the
+	 * degamma LUT.
+	 */
+	struct drm_property *plane_ctm_property;
 
 	/**
 	 * @suggested_x_property: Optional connector property with a hint for
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index d112c50..7fcc51e 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -132,6 +132,14 @@ struct drm_plane_state {
 	struct drm_property_blob *degamma_lut;
 
 	/**
+	 * @ctm:
+	 *
+	 * Color transformation matrix. See drm_plane_enable_color_mgmt(). The
+	 * blob (if not NULL) is a &struct drm_color_ctm.
+	 */
+	struct drm_property_blob *ctm;
+
+	/**
 	 * @commit: Tracks the pending commit to prevent use-after-free conditions,
 	 * and for async plane updates.
 	 *
-- 
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[RFC 3/7] drm: Add Plane Gamma properties

[Uma Shankar]

Add plane gamma as blob property and size as a
range property.

v2: Rebase

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/drm_atomic.c        |    8 ++++++++
 drivers/gpu/drm/drm_atomic_helper.c |    3 +++
 drivers/gpu/drm/drm_mode_config.c   |   14 ++++++++++++++
 include/drm/drm_mode_config.h       |   11 +++++++++++
 include/drm/drm_plane.h             |    9 +++++++++
 5 files changed, 45 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 45aede5..41946d2 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -774,6 +774,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 					&replaced);
 		state->color_mgmt_changed |= replaced;
 		return ret;
+	} else if (property == config->plane_gamma_lut_property) {
+		ret = drm_atomic_replace_property_blob_from_id(dev,
+					&state->gamma_lut,
+					val, -1, &replaced);
+		state->color_mgmt_changed |= replaced;
+		return ret;
 	} else {
 		return -EINVAL;
 	}
@@ -837,6 +843,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 			state->degamma_lut->base.id : 0;
 	} else if (property == config->plane_ctm_property) {
 		*val = (state->ctm) ? state->ctm->base.id : 0;
+	} else if (property == config->plane_gamma_lut_property) {
+		*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
 	} else {
 		return -EINVAL;
 	}
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index d3154e0..1d2566d 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3400,6 +3400,8 @@ void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
 		drm_property_blob_get(state->degamma_lut);
 	if (state->ctm)
 		drm_property_blob_get(state->ctm);
+	if (state->gamma_lut)
+		drm_property_blob_get(state->gamma_lut);
 	state->color_mgmt_changed = false;
 }
 EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
@@ -3448,6 +3450,7 @@ void __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)
 
 	drm_property_blob_put(state->degamma_lut);
 	drm_property_blob_put(state->ctm);
+	drm_property_blob_put(state->gamma_lut);
 }
 EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
 
diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
index bccc70e..94c4420 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -369,6 +369,20 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.plane_ctm_property = prop;
 
+	prop = drm_property_create(dev,
+			DRM_MODE_PROP_BLOB,
+			"PLANE_GAMMA_LUT", 0);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.plane_gamma_lut_property = prop;
+
+	prop = drm_property_create_range(dev,
+			DRM_MODE_PROP_IMMUTABLE,
+			"PLANE_GAMMA_LUT_SIZE", 0, UINT_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.plane_gamma_lut_size_property = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 3bf7fc6..e55aaed 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -733,6 +733,17 @@ struct drm_mode_config {
 	 * degamma LUT.
 	 */
 	struct drm_property *plane_ctm_property;
+	/**
+	 * @plane_gamma_lut_property: Optional Plane property to set the LUT
+	 * used to convert the colors, after the CTM matrix, to the common
+	 * gamma space chosen for blending.
+	 */
+	struct drm_property *plane_gamma_lut_property;
+	/**
+	 * @plane_gamma_lut_size_property: Optional Plane property for the size
+	 * of the gamma LUT as supported by the driver (read-only).
+	 */
+	struct drm_property *plane_gamma_lut_size_property;
 
 	/**
 	 * @suggested_x_property: Optional connector property with a hint for
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 7fcc51e..01d9ea7 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -140,6 +140,15 @@ struct drm_plane_state {
 	struct drm_property_blob *ctm;
 
 	/**
+	 * @gamma_lut:
+	 *
+	 * Lookup table for converting pixel data after the color conversion
+	 * matrix @ctm.  See drm_plane_enable_color_mgmt(). The blob (if not
+	 * NULL) is an array of &struct drm_color_lut.
+	 */
+	struct drm_property_blob *gamma_lut;
+
+	/**
 	 * @commit: Tracks the pending commit to prevent use-after-free conditions,
 	 * and for async plane updates.
 	 *
-- 
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[RFC 4/7] drm: Define helper function for plane color enabling

[Uma Shankar]

Define helper function to enable Plane color features
to attach plane color properties to plane structure.

v2: Rebase

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/drm_plane.c  |   45 ++++++++++++++++++++++++++++++++++++++++++
 include/drm/drm_color_mgmt.h |    5 +++++
 2 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index 19404e3..e9f2dab 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -144,6 +144,51 @@ static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane
 }
 
 /**
+ * drm_plane_enable_color_mgmt - enable color management properties
+ * @plane: DRM Plane
+ * @plane_degamma_lut_size: the size of the degamma lut (before CSC)
+ * @plane_has_ctm: whether to attach ctm_property for CSC matrix
+ * @plane_gamma_lut_size: the size of the gamma lut (after CSC)
+ *
+ * This function lets the driver enable the color correction
+ * properties on a plane. This includes 3 degamma, csc and gamma
+ * properties that userspace can set and 2 size properties to inform
+ * the userspace of the lut sizes. Each of the properties are
+ * optional. The gamma and degamma properties are only attached if
+ * their size is not 0 and ctm_property is only attached if has_ctm is
+ * true.
+ */
+void drm_plane_enable_color_mgmt(struct drm_plane *plane,
+				uint plane_degamma_lut_size,
+				bool plane_has_ctm,
+				uint plane_gamma_lut_size)
+{
+	struct drm_device *dev = plane->dev;
+	struct drm_mode_config *config = &dev->mode_config;
+
+	if (plane_degamma_lut_size) {
+		drm_object_attach_property(&plane->base,
+				config->plane_degamma_lut_property, 0);
+		drm_object_attach_property(&plane->base,
+				config->plane_degamma_lut_size_property,
+				plane_degamma_lut_size);
+	}
+
+	if (plane_has_ctm)
+		drm_object_attach_property(&plane->base,
+				config->plane_ctm_property, 0);
+
+	if (plane_gamma_lut_size) {
+		drm_object_attach_property(&plane->base,
+				config->plane_gamma_lut_property, 0);
+		drm_object_attach_property(&plane->base,
+				config->plane_gamma_lut_size_property,
+				plane_gamma_lut_size);
+	}
+}
+EXPORT_SYMBOL(drm_plane_enable_color_mgmt);
+
+/**
  * drm_universal_plane_init - Initialize a new universal plane object
  * @dev: DRM device
  * @plane: plane object to init
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
index 03a59cb..155a9ba 100644
--- a/include/drm/drm_color_mgmt.h
+++ b/include/drm/drm_color_mgmt.h
@@ -37,4 +37,9 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc,
 int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,
 				 int gamma_size);
 
+void drm_plane_enable_color_mgmt(struct drm_plane *plane,
+				 uint plane_degamma_lut_size,
+				 bool plane_has_ctm,
+				 uint plane_gamma_lut_size);
+
 #endif
-- 
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[RFC 5/7] drm/i915: Enable plane color features

[Uma Shankar]

Enable and initialize plane color features.

v2: Rebase and some cleanup

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h    |   10 ++++++++++
 drivers/gpu/drm/i915/intel_color.c |   12 ++++++++++++
 drivers/gpu/drm/i915/intel_drv.h   |    9 +++++++++
 3 files changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fe93115..6c91b5f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -744,6 +744,11 @@ struct drm_i915_display_funcs {
 
 	void (*load_csc_matrix)(struct drm_crtc_state *crtc_state);
 	void (*load_luts)(struct drm_crtc_state *crtc_state);
+	/* Add Plane Color callbacks */
+	void (*load_plane_csc_matrix)(const struct drm_plane_state
+				      *plane_state);
+	void (*load_plane_luts)(const struct drm_plane_state
+				*plane_state);
 };
 
 #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
@@ -890,6 +895,11 @@ struct intel_device_info {
 		u16 degamma_lut_size;
 		u16 gamma_lut_size;
 	} color;
+
+	struct plane_color_luts {
+		u16 plane_degamma_lut_size;
+		u16 plane_gamma_lut_size;
+	} plane_color;
 };
 
 struct intel_display_error_state;
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index b8315bc..f2481f1 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -641,6 +641,18 @@ int intel_color_check(struct drm_crtc *crtc,
 	return -EINVAL;
 }
 
+void intel_plane_color_init(struct drm_plane *plane)
+{
+	struct drm_i915_private *dev_priv = to_i915(plane->dev);
+
+	/* Enable color management support when we have degamma & gamma LUTs. */
+	if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 &&
+	    INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0)
+		drm_plane_enable_color_mgmt(plane,
+		INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size,
+		true, INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size);
+}
+
 void intel_color_init(struct drm_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 00b4886..eb90d11 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -445,6 +445,14 @@ struct intel_plane_state {
 	 */
 	int scaler_id;
 
+	/*
+	 * Use reduced/limited/broadcast rbg range, compressing from the full
+	 * range fed into the crtcs.
+	 */
+	bool limited_color_range;
+	/* Gamma mode programmed on the plane */
+	uint32_t gamma_mode;
+
 	struct drm_intel_sprite_colorkey ckey;
 };
 
@@ -2018,6 +2026,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
 int intel_color_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
 void intel_color_set_csc(struct drm_crtc_state *crtc_state);
 void intel_color_load_luts(struct drm_crtc_state *crtc_state);
+void intel_plane_color_init(struct drm_plane *plane);
 
 /* intel_lspcon.c */
 bool lspcon_init(struct intel_digital_port *intel_dig_port);
-- 
1.7.9.5

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[RFC 6/7] drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms

[Uma Shankar]

Implement Plane Gamma feature for BDW and Gen9 platforms.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c      |    5 ++-
 drivers/gpu/drm/i915/i915_reg.h      |   24 ++++++++++++++
 drivers/gpu/drm/i915/intel_color.c   |   58 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c |    4 +++
 drivers/gpu/drm/i915/intel_sprite.c  |    4 +++
 5 files changed, 94 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6458c30..6655eaf 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -51,7 +51,10 @@
 	.cursor_offsets = { CURSOR_A_OFFSET, IVB_CURSOR_B_OFFSET, IVB_CURSOR_C_OFFSET }
 
 #define BDW_COLORS \
-	.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }
+	.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }, \
+	.plane_color = { .plane_degamma_lut_size = 0, \
+			 .plane_gamma_lut_size = 16 }
+
 #define CHV_COLORS \
 	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
 #define GLK_COLORS \
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f0f8f60..b71082b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -159,6 +159,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define _PHY3(phy, ...) _PICK(phy, __VA_ARGS__)
 #define _MMIO_PHY3(phy, a, b, c) _MMIO(_PHY3(phy, a, b, c))
 
+#define _MMIO_PLANE_GAMC(plane, i, a, b)  _MMIO(_PIPE(plane, a, b) + (i) * 4)
+#define _MMIO_PLANE_GAMC16(plane, i, a, b)  _MMIO(_PIPE(plane, a, b) + (i) * 4)
+
 #define _MASKED_FIELD(mask, value) ({					   \
 	if (__builtin_constant_p(mask))					   \
 		BUILD_BUG_ON_MSG(((mask) & 0xffff0000), "Incorrect mask"); \
@@ -8800,6 +8803,27 @@ enum skl_power_gate {
 #define PRE_CSC_GAMC_INDEX(pipe)	_MMIO_PIPE(pipe, _PRE_CSC_GAMC_INDEX_A, _PRE_CSC_GAMC_INDEX_B)
 #define PRE_CSC_GAMC_DATA(pipe)		_MMIO_PIPE(pipe, _PRE_CSC_GAMC_DATA_A, _PRE_CSC_GAMC_DATA_B)
 
+/* Plane Gamma in Gen9+ */
+#define _PLANE_GAMC_1_A	0x701d0
+#define _PLANE_GAMC_1_B	0x711d0
+#define _PLANE_GAMC_2_A	0x702d0
+#define _PLANE_GAMC_2_B	0x712d0
+#define _PLANE_GAMC_1(pipe)	_PIPE(pipe, _PLANE_GAMC_1_A, _PLANE_GAMC_1_B)
+#define _PLANE_GAMC_2(pipe)	_PIPE(pipe, _PLANE_GAMC_2_A, _PLANE_GAMC_2_B)
+#define PLANE_GAMC(pipe, plane, i)	\
+	_MMIO_PLANE_GAMC(plane, i, _PLANE_GAMC_1(pipe), _PLANE_GAMC_2(pipe))
+
+#define _PLANE_GAMC16_1_A	0x70210
+#define _PLANE_GAMC16_1_B	0x71210
+#define _PLANE_GAMC16_2_A	0x70310
+#define _PLANE_GAMC16_2_B	0x71310
+#define _PLANE_GAMC16_1(pipe)	_PIPE(pipe, _PLANE_GAMC16_1_A, \
+				     _PLANE_GAMC16_1_B)
+#define _PLANE_GAMC16_2(pipe)	_PIPE(pipe, _PLANE_GAMC16_2_A, \
+				     _PLANE_GAMC16_2_B)
+#define PLANE_GAMC16(pipe, plane, i) _MMIO_PLANE_GAMC16(plane, i, \
+				_PLANE_GAMC16_1(pipe), _PLANE_GAMC16_2(pipe))
+
 /* pipe CSC & degamma/gamma LUTs on CHV */
 #define _CGM_PIPE_A_CSC_COEFF01	(VLV_DISPLAY_BASE + 0x67900)
 #define _CGM_PIPE_A_CSC_COEFF23	(VLV_DISPLAY_BASE + 0x67904)
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index f2481f1..3452769 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -489,6 +489,59 @@ static void broadwell_load_luts(struct drm_crtc_state *state)
 	I915_WRITE(PREC_PAL_INDEX(pipe), 0);
 }
 
+static void bdw_load_plane_gamma_lut(const struct drm_plane_state *state,
+				     u32 offset)
+{
+	struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+	enum pipe pipe = to_intel_plane(state->plane)->pipe;
+	enum plane_id plane = to_intel_plane(state->plane)->id;
+	uint32_t i, lut_size =
+			INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size;
+
+	if (state->gamma_lut) {
+		struct drm_color_lut *lut =
+			(struct drm_color_lut *) state->gamma_lut->data;
+
+		for (i = 0; i < lut_size; i++) {
+			uint32_t word =
+			(drm_color_lut_extract(lut[i].red, 10) << 20) |
+			(drm_color_lut_extract(lut[i].green, 10) << 10) |
+			drm_color_lut_extract(lut[i].blue, 10);
+
+			I915_WRITE(PLANE_GAMC(pipe, plane, i), word);
+		}
+
+		/* Program the max register to clamp values > 1.0. */
+		i = lut_size - 1;
+		I915_WRITE(PLANE_GAMC16(pipe, plane, 0),
+			   drm_color_lut_extract(lut[i].red, 16));
+		I915_WRITE(PLANE_GAMC16(pipe, plane, 1),
+			   drm_color_lut_extract(lut[i].green, 16));
+		I915_WRITE(PLANE_GAMC16(pipe, plane, 2),
+			   drm_color_lut_extract(lut[i].blue, 16));
+	} else {
+		for (i = 0; i < lut_size; i++) {
+			uint32_t v = (i * ((1 << 10) - 1)) / (lut_size - 1);
+
+			I915_WRITE(PLANE_GAMC(pipe, plane, i),
+				   (v << 20) | (v << 10) | v);
+		}
+
+		I915_WRITE(PLANE_GAMC16(pipe, plane, 0), (1 << 16) - 1);
+		I915_WRITE(PLANE_GAMC16(pipe, plane, 1), (1 << 16) - 1);
+		I915_WRITE(PLANE_GAMC16(pipe, plane, 2), (1 << 16) - 1);
+	}
+}
+
+/* Loads the palette/gamma unit for the CRTC on Broadwell+. */
+static void broadwell_load_plane_luts(const struct drm_plane_state *state)
+{
+	struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+
+	bdw_load_plane_gamma_lut(state,
+		INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size);
+}
+
 static void glk_load_degamma_lut(struct drm_crtc_state *state)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->crtc->dev);
@@ -645,6 +698,11 @@ void intel_plane_color_init(struct drm_plane *plane)
 {
 	struct drm_i915_private *dev_priv = to_i915(plane->dev);
 
+	if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv) ||
+		IS_BROXTON(dev_priv)) {
+		dev_priv->display.load_plane_luts = broadwell_load_plane_luts;
+	}
+
 	/* Enable color management support when we have degamma & gamma LUTs. */
 	if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 &&
 	    INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 737de25..0f184a3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13267,6 +13267,10 @@ static bool intel_cursor_plane_format_mod_supported(struct drm_plane *plane,
 						   DRM_MODE_ROTATE_0,
 						   supported_rotations);
 
+	/* Add Plane Color properties */
+	if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9)
+		intel_plane_color_init(&primary->base);
+
 	drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
 
 	return primary;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 4fcf80c..3a538d9 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1330,6 +1330,10 @@ struct intel_plane *
 					   DRM_MODE_ROTATE_0,
 					   supported_rotations);
 
+	/* Add Plane Color properties */
+	if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9)
+		intel_plane_color_init(&intel_plane->base);
+
 	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
 
 	return intel_plane;
-- 
1.7.9.5

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[RFC 7/7] drm/i915: Load plane color luts from atomic flip

[Uma Shankar]

Load plane color luts as part of atomic plane updates.
This will be done only if the plane color luts are changed.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/intel_atomic_plane.c |    4 ++++
 drivers/gpu/drm/i915/intel_color.c        |    8 ++++++++
 drivers/gpu/drm/i915/intel_drv.h          |    1 +
 3 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 8e6dc15..52d71db 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -239,6 +239,10 @@ static void intel_plane_atomic_update(struct drm_plane *plane,
 		intel_atomic_get_new_plane_state(state, intel_plane);
 	struct drm_crtc *crtc = new_plane_state->base.crtc ?: old_state->crtc;
 
+	if (new_plane_state->base.color_mgmt_changed) {
+		intel_color_load_plane_luts(&new_plane_state->base);
+	}
+
 	if (new_plane_state->base.visible) {
 		const struct intel_crtc_state *new_crtc_state =
 			intel_atomic_get_new_crtc_state(state, to_intel_crtc(crtc));
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index 3452769..34e70ba 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -663,6 +663,14 @@ void intel_color_load_luts(struct drm_crtc_state *crtc_state)
 	dev_priv->display.load_luts(crtc_state);
 }
 
+void intel_color_load_plane_luts(const struct drm_plane_state *plane_state)
+{
+	struct drm_device *dev = plane_state->plane->dev;
+	struct drm_i915_private *dev_priv = to_i915(dev);
+
+	dev_priv->display.load_plane_luts(plane_state);
+}
+
 int intel_color_check(struct drm_crtc *crtc,
 		      struct drm_crtc_state *crtc_state)
 {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index eb90d11..67487d4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2027,6 +2027,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
 void intel_color_set_csc(struct drm_crtc_state *crtc_state);
 void intel_color_load_luts(struct drm_crtc_state *crtc_state);
 void intel_plane_color_init(struct drm_plane *plane);
+void intel_color_load_plane_luts(const struct drm_plane_state *plane_state);
 
 /* intel_lspcon.c */
 bool lspcon_init(struct intel_digital_port *intel_dig_port);
-- 
1.7.9.5

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✗ Fi.CI.BAT: failure for Add Plane Color Properties (rev2)

[Patchwork]

== Series Details ==

Series: Add Plane Color Properties (rev2)
URL   : https://patchwork.freedesktop.org/series/30875/
State : failure

== Summary ==

Series 30875v2 Add Plane Color Properties
https://patchwork.freedesktop.org/api/1.0/series/30875/revisions/2/mbox/

Test core_auth:
        Subgroup basic-auth:
                dmesg-warn -> PASS       (fi-bsw-n3050) fdo#103479 +1
Test debugfs_test:
        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-glk-dsi)
Test gem_sync:
        Subgroup basic-store-all:
                fail       -> PASS       (fi-ivb-3520m) fdo#100007
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-n2820) fdo#101705

fdo#103479 https://bugs.freedesktop.org/show_bug.cgi?id=103479
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:447s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:453s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:380s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:545s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:275s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:508s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:501s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:509s
fi-byt-n2820     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:488s
fi-cfl-s         total:289  pass:254  dwarn:3   dfail:0   fail:0   skip:32  time:556s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:606s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:432s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:260s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:582s
fi-glk-dsi       total:12   pass:2    dwarn:0   dfail:0   fail:0   skip:9  
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:432s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:422s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:504s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:462s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:495s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:573s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:474s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:586s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:568s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:451s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:596s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:653s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:514s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:501s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:460s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:569s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:429s

b911f67a17e5eef16d49a51b83f7da12666e3be6 drm-tip: 2017y-11m-07d-11h-11m-37s UTC integration manifest
152f249bcea4 drm/i915: Load plane color luts from atomic flip
9895a783dd56 drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms
6cdd88c197d2 drm/i915: Enable plane color features
9e22c82f26bc drm: Define helper function for plane color enabling
416c78edc65a drm: Add Plane Gamma properties
83ce54aa7a5b drm: Add Plane CTM property
84f90f719591 drm: Add Plane Degamma properties

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6985/
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✗ Fi.CI.BAT: failure for Add Plane Color Properties (rev2)

[Patchwork]

== Series Details ==

Series: Add Plane Color Properties (rev2)
URL   : https://patchwork.freedesktop.org/series/30875/
State : failure

== Summary ==

Series 30875v2 Add Plane Color Properties
https://patchwork.freedesktop.org/api/1.0/series/30875/revisions/2/mbox/

Test chamelium:
        Subgroup dp-crc-fast:
                pass       -> FAIL       (fi-kbl-7500u) fdo#102514
Test core_auth:
        Subgroup basic-auth:
                dmesg-warn -> PASS       (fi-bsw-n3050) fdo#103479 +1
Test gem_sync:
        Subgroup basic-each:
                pass       -> DMESG-FAIL (fi-glk-dsi)
        Subgroup basic-many-each:
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-store-all:
                fail       -> PASS       (fi-ivb-3520m) fdo#100007
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-store-each:
                pass       -> SKIP       (fi-glk-dsi)
Test gem_tiled_blits:
        Subgroup basic:
                pass       -> SKIP       (fi-glk-dsi)
Test gem_tiled_fence_blits:
        Subgroup basic:
                pass       -> SKIP       (fi-glk-dsi)
Test gem_wait:
        Subgroup basic-busy-all:
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-wait-all:
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-await-all:
                pass       -> SKIP       (fi-glk-dsi)
Test gem_workarounds:
        Subgroup basic-read:
                pass       -> SKIP       (fi-glk-dsi)
Test kms_busy:
        Subgroup basic-flip-a:
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-flip-b:
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-flip-c:
                pass       -> SKIP       (fi-glk-dsi)
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                pass       -> SKIP       (fi-glk-dsi)
        Subgroup basic-busy-flip-before-cursor-legacy:
                pass       -> SKIP       (fi-glk-dsi)
Test kms_frontbuffer_tracking:
        Subgroup basic:
                fail       -> SKIP       (fi-glk-dsi) fdo#103167
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> DMESG-FAIL (fi-glk-dsi) fdo#103514 +3
        Subgroup hang-read-crc-pipe-b:
                pass       -> FAIL       (fi-skl-6700k)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#103479 https://bugs.freedesktop.org/show_bug.cgi?id=103479
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103514 https://bugs.freedesktop.org/show_bug.cgi?id=103514

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:444s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:457s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:379s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:538s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:277s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:504s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:503s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:506s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:497s
fi-cfl-s         total:289  pass:254  dwarn:3   dfail:0   fail:0   skip:32  time:559s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:425s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:263s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:595s
fi-glk-dsi       total:289  pass:239  dwarn:1   dfail:4   fail:0   skip:45  time:473s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:433s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:429s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:488s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:462s
fi-kbl-7500u     total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  time:486s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:580s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:483s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:587s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:573s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:600s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:649s
fi-skl-6700k     total:289  pass:264  dwarn:0   dfail:0   fail:1   skip:24  time:524s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:502s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:463s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:572s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:422s

b911f67a17e5eef16d49a51b83f7da12666e3be6 drm-tip: 2017y-11m-07d-11h-11m-37s UTC integration manifest
9bc7cd3fed32 drm/i915: Load plane color luts from atomic flip
885a07d97e61 drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms
81e35d5d8e56 drm/i915: Enable plane color features
86eb07be510e drm: Define helper function for plane color enabling
bb9318342473 drm: Add Plane Gamma properties
ad5a351603cf drm: Add Plane CTM property
120c35761405 drm: Add Plane Degamma properties

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6988/
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Re: [Intel-gfx] [RFC 1/7] drm: Add Plane Degamma properties

[Emil Velikov]

On 7 November 2017 at 12:06, Uma Shankar <uma.shankar@intel.com> wrote:
> Add Plane Degamma as a blob property and plane
> degamma size as a range property.
>
> v2: Rebase
>
Hi Uma, seems like something has gone wrong during the rebase.

> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/drm_atomic.c        |   12 ++++++++++++
>  drivers/gpu/drm/drm_atomic_helper.c |    6 ++++++
>  drivers/gpu/drm/drm_mode_config.c   |   14 ++++++++++++++
>  include/drm/drm_mode_config.h       |   11 +++++++++++
>  include/drm/drm_plane.h             |   10 ++++++++++
>  5 files changed, 53 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 7e0e7be..30853c7 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -713,6 +713,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
>  {
>         struct drm_device *dev = plane->dev;
>         struct drm_mode_config *config = &dev->mode_config;
> +       bool replaced = false;
> +       int ret;
>
>         if (property == config->prop_fb_id) {
>                 struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, val);
> @@ -758,6 +760,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
>         } else if (plane->funcs->atomic_set_property) {
>                 return plane->funcs->atomic_set_property(plane, state,
>                                 property, val);
> +       } else if (property == config->plane_degamma_lut_property) {
> +               ret = drm_atomic_replace_property_blob_from_id(dev,
> +                                       &state->degamma_lut,
> +                                       val, -1, &replaced);
> +               state->color_mgmt_changed |= replaced;
> +               return ret;
Namely: the driver specific atomic_set_property will be called and the
newly added code will not be reached.
I think we should keep the atomic_set_property call last in the
if/else chain. Converting the lot to a switch statement might make
things a bit more obvious.


>         } else {
>                 return -EINVAL;
>         }
> @@ -816,6 +824,9 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
>                 *val = state->zpos;
>         } else if (plane->funcs->atomic_get_property) {
>                 return plane->funcs->atomic_get_property(plane, state, property, val);
> +       } else if (property == config->plane_degamma_lut_property) {
> +               *val = (state->degamma_lut) ?
> +                       state->degamma_lut->base.id : 0;
Analogous thing happens here.

Did you test the updated series through IGT - it should have caught
the above (considering we have tests, and I'm not loosing my marbles).
Same comments apply for CTM and gamma, patches 2 and 3 respectively.

HTH
Emil
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Re: [Intel-gfx] [PATCH 0/7] Add Plane Color Properties

[Daniel Stone]

Hi Uma,

On 7 November 2017 at 12:06, Uma Shankar <uma.shankar@intel.com> wrote:
> This patch series adds properties for plane color features. It adds
> properties for degamma used to linearize data, CSC used for gamut
> conversion, and gamma used to again non-linearize data as per panel
> supported color space. These can be utilize by user space to convert
> planes from one format to another, one color space to another etc.
>
> Usersapce can take smart blending decisions and utilize these hardware
> supported plane color features to get accurate color profile. The same
> can help in consistent color quality from source to panel taking
> advantage of advanced color features in hardware.
>
> These patches just add the property interfaces and enable helper functions.

This is missing documentation on how plane colour management interacts
with CRTC colour management. Is it a step before CRTC colour
management is applied, or does it bypass CRTC colour management, or
... ?

Cheers,
Daniel
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Re: [RFC 2/7] drm: Add Plane CTM property

[Brian Starkey]

Hi Uma,

On Tue, Nov 07, 2017 at 05:36:26PM +0530, Uma Shankar wrote:
>Add a blob property for plane CSC usage.
>
>v2: Rebase
>
>Signed-off-by: Uma Shankar <uma.shankar@intel.com>
>---
> drivers/gpu/drm/drm_atomic.c        |   10 ++++++++++
> drivers/gpu/drm/drm_atomic_helper.c |    3 +++
> drivers/gpu/drm/drm_mode_config.c   |    7 +++++++
> include/drm/drm_mode_config.h       |    6 ++++++
> include/drm/drm_plane.h             |    8 ++++++++
> 5 files changed, 34 insertions(+)
>
>diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
>index 30853c7..45aede5 100644
>--- a/drivers/gpu/drm/drm_atomic.c
>+++ b/drivers/gpu/drm/drm_atomic.c
>@@ -766,6 +766,14 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
> 					val, -1, &replaced);
> 		state->color_mgmt_changed |= replaced;
> 		return ret;
>+	} else if (property == config->plane_ctm_property) {
>+		ret = drm_atomic_replace_property_blob_from_id(dev,
>+					&state->ctm,
>+					val,
>+					sizeof(struct drm_color_ctm),
>+					&replaced);
>+		state->color_mgmt_changed |= replaced;
>+		return ret;
> 	} else {
> 		return -EINVAL;
> 	}
>@@ -827,6 +835,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
> 	} else if (property == config->plane_degamma_lut_property) {
> 		*val = (state->degamma_lut) ?
> 			state->degamma_lut->base.id : 0;
>+	} else if (property == config->plane_ctm_property) {
>+		*val = (state->ctm) ? state->ctm->base.id : 0;
> 	} else {
> 		return -EINVAL;
> 	}
>diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
>index ba924cf..d3154e0 100644
>--- a/drivers/gpu/drm/drm_atomic_helper.c
>+++ b/drivers/gpu/drm/drm_atomic_helper.c
>@@ -3398,6 +3398,8 @@ void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
>
> 	if (state->degamma_lut)
> 		drm_property_blob_get(state->degamma_lut);
>+	if (state->ctm)
>+		drm_property_blob_get(state->ctm);
> 	state->color_mgmt_changed = false;
> }
> EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
>@@ -3445,6 +3447,7 @@ void __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)
> 		drm_crtc_commit_put(state->commit);
>
> 	drm_property_blob_put(state->degamma_lut);
>+	drm_property_blob_put(state->ctm);
> }
> EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
>
>diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
>index 118f6ac..bccc70e 100644
>--- a/drivers/gpu/drm/drm_mode_config.c
>+++ b/drivers/gpu/drm/drm_mode_config.c
>@@ -362,6 +362,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
> 		return -ENOMEM;
> 	dev->mode_config.plane_degamma_lut_size_property = prop;
>
>+	prop = drm_property_create(dev,
>+			DRM_MODE_PROP_BLOB,
>+			"PLANE_CTM", 0);

I do wonder if "PLANE_" is really needed here, as the property will
only ever be found on a plane (same would apply to all three property
names).

>+	if (!prop)
>+		return -ENOMEM;
>+	dev->mode_config.plane_ctm_property = prop;
>+
> 	return 0;
> }
>
>diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
>index 6ee2df6..3bf7fc6 100644
>--- a/include/drm/drm_mode_config.h
>+++ b/include/drm/drm_mode_config.h
>@@ -727,6 +727,12 @@ struct drm_mode_config {
> 	 * size of the degamma LUT as supported by the driver (read-only).
> 	 */
> 	struct drm_property *plane_degamma_lut_size_property;
>+	/**
>+	 * @plane_ctm_property: Optional CRTC property to set the
>+	 * matrix used to convert colors after the lookup in the
>+	 * degamma LUT.
>+	 */

Copy-paste error - should be "Optional plane property"

Thanks,
-Brian

>+	struct drm_property *plane_ctm_property;
>
> 	/**
> 	 * @suggested_x_property: Optional connector property with a hint for
>diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
>index d112c50..7fcc51e 100644
>--- a/include/drm/drm_plane.h
>+++ b/include/drm/drm_plane.h
>@@ -132,6 +132,14 @@ struct drm_plane_state {
> 	struct drm_property_blob *degamma_lut;
>
> 	/**
>+	 * @ctm:
>+	 *
>+	 * Color transformation matrix. See drm_plane_enable_color_mgmt(). The
>+	 * blob (if not NULL) is a &struct drm_color_ctm.
>+	 */
>+	struct drm_property_blob *ctm;
>+
>+	/**
> 	 * @commit: Tracks the pending commit to prevent use-after-free conditions,
> 	 * and for async plane updates.
> 	 *
>-- 
>1.7.9.5
>
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Re: [Intel-gfx] [RFC 1/7] drm: Add Plane Degamma properties

[Brian Starkey]

Hi,

On Tue, Nov 07, 2017 at 05:36:25PM +0530, Uma Shankar wrote:
>Add Plane Degamma as a blob property and plane
>degamma size as a range property.
>
>v2: Rebase
>
>Signed-off-by: Uma Shankar <uma.shankar@intel.com>
>---
> drivers/gpu/drm/drm_atomic.c        |   12 ++++++++++++
> drivers/gpu/drm/drm_atomic_helper.c |    6 ++++++
> drivers/gpu/drm/drm_mode_config.c   |   14 ++++++++++++++
> include/drm/drm_mode_config.h       |   11 +++++++++++
> include/drm/drm_plane.h             |   10 ++++++++++
> 5 files changed, 53 insertions(+)
>
>diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
>index 7e0e7be..30853c7 100644
>--- a/drivers/gpu/drm/drm_atomic.c
>+++ b/drivers/gpu/drm/drm_atomic.c
>@@ -713,6 +713,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
> {
> 	struct drm_device *dev = plane->dev;
> 	struct drm_mode_config *config = &dev->mode_config;
>+	bool replaced = false;
>+	int ret;
>
> 	if (property == config->prop_fb_id) {
> 		struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, val);
>@@ -758,6 +760,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
> 	} else if (plane->funcs->atomic_set_property) {
> 		return plane->funcs->atomic_set_property(plane, state,
> 				property, val);
>+	} else if (property == config->plane_degamma_lut_property) {
>+		ret = drm_atomic_replace_property_blob_from_id(dev,
>+					&state->degamma_lut,
>+					val, -1, &replaced);
>+		state->color_mgmt_changed |= replaced;
>+		return ret;
> 	} else {
> 		return -EINVAL;
> 	}
>@@ -816,6 +824,9 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
> 		*val = state->zpos;
> 	} else if (plane->funcs->atomic_get_property) {
> 		return plane->funcs->atomic_get_property(plane, state, property, val);
>+	} else if (property == config->plane_degamma_lut_property) {
>+		*val = (state->degamma_lut) ?
>+			state->degamma_lut->base.id : 0;
> 	} else {
> 		return -EINVAL;
> 	}
>@@ -953,6 +964,7 @@ static void drm_atomic_plane_print_state(struct drm_printer *p,
> 	drm_printf(p, "\tcrtc-pos=" DRM_RECT_FMT "\n", DRM_RECT_ARG(&dest));
> 	drm_printf(p, "\tsrc-pos=" DRM_RECT_FP_FMT "\n", DRM_RECT_FP_ARG(&src));
> 	drm_printf(p, "\trotation=%x\n", state->rotation);
>+	drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed);
>
> 	if (plane->funcs->atomic_print_state)
> 		plane->funcs->atomic_print_state(p, state);
>diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
>index 71d712f..ba924cf 100644
>--- a/drivers/gpu/drm/drm_atomic_helper.c
>+++ b/drivers/gpu/drm/drm_atomic_helper.c
>@@ -3395,6 +3395,10 @@ void __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
>
> 	state->fence = NULL;
> 	state->commit = NULL;
>+
>+	if (state->degamma_lut)
>+		drm_property_blob_get(state->degamma_lut);
>+	state->color_mgmt_changed = false;
> }
> EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
>
>@@ -3439,6 +3443,8 @@ void __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)
>
> 	if (state->commit)
> 		drm_crtc_commit_put(state->commit);
>+
>+	drm_property_blob_put(state->degamma_lut);
> }
> EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
>
>diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
>index cda8bfa..118f6ac 100644
>--- a/drivers/gpu/drm/drm_mode_config.c
>+++ b/drivers/gpu/drm/drm_mode_config.c
>@@ -348,6 +348,20 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
> 		return -ENOMEM;
> 	dev->mode_config.modifiers_property = prop;
>
>+	prop = drm_property_create(dev,
>+			DRM_MODE_PROP_BLOB,
>+			"PLANE_DEGAMMA_LUT", 0);
>+	if (!prop)
>+		return -ENOMEM;
>+	dev->mode_config.plane_degamma_lut_property = prop;
>+
>+	prop = drm_property_create_range(dev,
>+			DRM_MODE_PROP_IMMUTABLE,
>+			"PLANE_DEGAMMA_LUT_SIZE", 0, UINT_MAX);
>+	if (!prop)
>+		return -ENOMEM;
>+	dev->mode_config.plane_degamma_lut_size_property = prop;
>+
> 	return 0;
> }
>
>diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
>index 0b4ac2e..6ee2df6 100644
>--- a/include/drm/drm_mode_config.h
>+++ b/include/drm/drm_mode_config.h
>@@ -718,6 +718,17 @@ struct drm_mode_config {
> 	struct drm_property *gamma_lut_size_property;
>
> 	/**
>+	 * @plane_degamma_lut_property: Optional Plane property to set the LUT
>+	 * used to convert the framebuffer's colors to linear gamma.
>+	 */
>+	struct drm_property *plane_degamma_lut_property;
>+	/**
>+	 * @plane_degamma_lut_size_property: Optional Plane property for the
>+	 * size of the degamma LUT as supported by the driver (read-only).
>+	 */
>+	struct drm_property *plane_degamma_lut_size_property;
>+
>+	/**
> 	 * @suggested_x_property: Optional connector property with a hint for
> 	 * the position of the output on the host's screen.
> 	 */
>diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
>index 069c4c8..d112c50 100644
>--- a/include/drm/drm_plane.h
>+++ b/include/drm/drm_plane.h
>@@ -123,6 +123,14 @@ struct drm_plane_state {
> 	 */
> 	bool visible;
>
>+	/* @degamma_lut:
>+	 *
>+	 * Lookup table for converting framebuffer pixel data before apply the
>+	 * color conversion matrix @ctm. See drm_plane_enable_color_mgmt(). The
>+	 * blob (if not NULL) is an array of &struct drm_color_lut.
>+	 */
>+	struct drm_property_blob *degamma_lut;

In one of the previous discussions[1] related to per-plane color
management, Lionel suggested that the 16-bit color lut entries weren't
enough when considering HDR.

It might be worth creating a new gamma lut format with 32-bit entries
for these new properties, as HDR is very much a real rather than
hypothetical concern these days.

Thanks,
-Brian

>+
> 	/**
> 	 * @commit: Tracks the pending commit to prevent use-after-free conditions,
> 	 * and for async plane updates.
>@@ -132,6 +140,8 @@ struct drm_plane_state {
> 	struct drm_crtc_commit *commit;
>
> 	struct drm_atomic_state *state;
>+
>+	bool color_mgmt_changed : 1;
> };
>
> static inline struct drm_rect
>-- 
>1.7.9.5
>
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Re: [Intel-gfx] [RFC 1/7] drm: Add Plane Degamma properties

[Brian Starkey]

On Tue, Nov 07, 2017 at 05:49:56PM +0000, Brian Starkey wrote:
>
>In one of the previous discussions[1] related to per-plane color
>management, Lionel suggested that the 16-bit color lut entries weren't
>enough when considering HDR.
>
>It might be worth creating a new gamma lut format with 32-bit entries
>for these new properties, as HDR is very much a real rather than
>hypothetical concern these days.
>
>Thanks,
>-Brian

Sorry, failed to paste the link:

[1] https://patchwork.kernel.org/patch/9546905/
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RE: [RFC 2/7] drm: Add Plane CTM property

[Shankar, Uma]

>-----Original Message-----
>From: dri-devel [mailto:dri-devel-bounces@lists.freedesktop.org] On Behalf Of
>Brian Starkey
>Sent: Tuesday, November 7, 2017 11:10 PM
>To: Shankar, Uma <uma.shankar@intel.com>
>Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville <ville.syrjala@intel.com>;
>Lankhorst, Maarten <maarten.lankhorst@intel.com>; dri-
>devel@lists.freedesktop.org
>Subject: Re: [RFC 2/7] drm: Add Plane CTM property
>
>Hi Uma,
>
>On Tue, Nov 07, 2017 at 05:36:26PM +0530, Uma Shankar wrote:
>>Add a blob property for plane CSC usage.
>>
>>v2: Rebase
>>
>>Signed-off-by: Uma Shankar <uma.shankar@intel.com>
>>---
>> drivers/gpu/drm/drm_atomic.c        |   10 ++++++++++
>> drivers/gpu/drm/drm_atomic_helper.c |    3 +++
>> drivers/gpu/drm/drm_mode_config.c   |    7 +++++++
>> include/drm/drm_mode_config.h       |    6 ++++++
>> include/drm/drm_plane.h             |    8 ++++++++
>> 5 files changed, 34 insertions(+)
>>
>>diff --git a/drivers/gpu/drm/drm_atomic.c
>>b/drivers/gpu/drm/drm_atomic.c index 30853c7..45aede5 100644
>>--- a/drivers/gpu/drm/drm_atomic.c
>>+++ b/drivers/gpu/drm/drm_atomic.c
>>@@ -766,6 +766,14 @@ static int drm_atomic_plane_set_property(struct
>drm_plane *plane,
>> 					val, -1, &replaced);
>> 		state->color_mgmt_changed |= replaced;
>> 		return ret;
>>+	} else if (property == config->plane_ctm_property) {
>>+		ret = drm_atomic_replace_property_blob_from_id(dev,
>>+					&state->ctm,
>>+					val,
>>+					sizeof(struct drm_color_ctm),
>>+					&replaced);
>>+		state->color_mgmt_changed |= replaced;
>>+		return ret;
>> 	} else {
>> 		return -EINVAL;
>> 	}
>>@@ -827,6 +835,8 @@ static int drm_atomic_plane_set_property(struct
>drm_plane *plane,
>> 	} else if (property == config->plane_degamma_lut_property) {
>> 		*val = (state->degamma_lut) ?
>> 			state->degamma_lut->base.id : 0;
>>+	} else if (property == config->plane_ctm_property) {
>>+		*val = (state->ctm) ? state->ctm->base.id : 0;
>> 	} else {
>> 		return -EINVAL;
>> 	}
>>diff --git a/drivers/gpu/drm/drm_atomic_helper.c
>>b/drivers/gpu/drm/drm_atomic_helper.c
>>index ba924cf..d3154e0 100644
>>--- a/drivers/gpu/drm/drm_atomic_helper.c
>>+++ b/drivers/gpu/drm/drm_atomic_helper.c
>>@@ -3398,6 +3398,8 @@ void
>>__drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane,
>>
>> 	if (state->degamma_lut)
>> 		drm_property_blob_get(state->degamma_lut);
>>+	if (state->ctm)
>>+		drm_property_blob_get(state->ctm);
>> 	state->color_mgmt_changed = false;
>> }
>> EXPORT_SYMBOL(__drm_atomic_helper_plane_duplicate_state);
>>@@ -3445,6 +3447,7 @@ void
>__drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)
>> 		drm_crtc_commit_put(state->commit);
>>
>> 	drm_property_blob_put(state->degamma_lut);
>>+	drm_property_blob_put(state->ctm);
>> }
>> EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
>>
>>diff --git a/drivers/gpu/drm/drm_mode_config.c
>>b/drivers/gpu/drm/drm_mode_config.c
>>index 118f6ac..bccc70e 100644
>>--- a/drivers/gpu/drm/drm_mode_config.c
>>+++ b/drivers/gpu/drm/drm_mode_config.c
>>@@ -362,6 +362,13 @@ static int
>drm_mode_create_standard_properties(struct drm_device *dev)
>> 		return -ENOMEM;
>> 	dev->mode_config.plane_degamma_lut_size_property = prop;
>>
>>+	prop = drm_property_create(dev,
>>+			DRM_MODE_PROP_BLOB,
>>+			"PLANE_CTM", 0);
>
>I do wonder if "PLANE_" is really needed here, as the property will only ever be
>found on a plane (same would apply to all three property names).

This is just to explicitly separate out the names from the crtc (pipe) properties. 
(Similar properties exist for pipe already). It will create confusion, hence explicitly called
them out appending with a  "PLANE" prefix.

>
>>+	if (!prop)
>>+		return -ENOMEM;
>>+	dev->mode_config.plane_ctm_property = prop;
>>+
>> 	return 0;
>> }
>>
>>diff --git a/include/drm/drm_mode_config.h
>>b/include/drm/drm_mode_config.h index 6ee2df6..3bf7fc6 100644
>>--- a/include/drm/drm_mode_config.h
>>+++ b/include/drm/drm_mode_config.h
>>@@ -727,6 +727,12 @@ struct drm_mode_config {
>> 	 * size of the degamma LUT as supported by the driver (read-only).
>> 	 */
>> 	struct drm_property *plane_degamma_lut_size_property;
>>+	/**
>>+	 * @plane_ctm_property: Optional CRTC property to set the
>>+	 * matrix used to convert colors after the lookup in the
>>+	 * degamma LUT.
>>+	 */
>
>Copy-paste error - should be "Optional plane property"

Yeah indeed, thanks for spotting it. Will fix in next set.

Regards,
Uma Shankar

>
>Thanks,
>-Brian
>
>>+	struct drm_property *plane_ctm_property;
>>
>> 	/**
>> 	 * @suggested_x_property: Optional connector property with a hint for
>>diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index
>>d112c50..7fcc51e 100644
>>--- a/include/drm/drm_plane.h
>>+++ b/include/drm/drm_plane.h
>>@@ -132,6 +132,14 @@ struct drm_plane_state {
>> 	struct drm_property_blob *degamma_lut;
>>
>> 	/**
>>+	 * @ctm:
>>+	 *
>>+	 * Color transformation matrix. See drm_plane_enable_color_mgmt().
>The
>>+	 * blob (if not NULL) is a &struct drm_color_ctm.
>>+	 */
>>+	struct drm_property_blob *ctm;
>>+
>>+	/**
>> 	 * @commit: Tracks the pending commit to prevent use-after-free
>conditions,
>> 	 * and for async plane updates.
>> 	 *
>>--
>>1.7.9.5
>>
>>_______________________________________________
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>>https://lists.freedesktop.org/mailman/listinfo/dri-devel
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✓ Fi.CI.BAT: success for Add Plane Color Properties (rev2)

[Patchwork]

== Series Details ==

Series: Add Plane Color Properties (rev2)
URL   : https://patchwork.freedesktop.org/series/30875/
State : success

== Summary ==

Series 30875v2 Add Plane Color Properties
https://patchwork.freedesktop.org/api/1.0/series/30875/revisions/2/mbox/

Test chamelium:
        Subgroup dp-crc-fast:
                pass       -> FAIL       (fi-kbl-7500u) fdo#102514
Test core_auth:
        Subgroup basic-auth:
                dmesg-warn -> PASS       (fi-bsw-n3050) fdo#103479 +1
Test gem_sync:
        Subgroup basic-store-all:
                fail       -> PASS       (fi-ivb-3520m) fdo#100007
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-b:
                pass       -> FAIL       (fi-skl-6700k) fdo#103191

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#103479 https://bugs.freedesktop.org/show_bug.cgi?id=103479
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:444s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:457s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:379s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:538s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:277s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:504s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:503s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:506s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:497s
fi-cfl-s         total:289  pass:254  dwarn:3   dfail:0   fail:0   skip:32  time:559s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:425s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:263s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:595s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:433s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:429s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:429s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:488s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:462s
fi-kbl-7500u     total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  time:486s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:580s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:483s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:587s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:573s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:600s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:649s
fi-skl-6700k     total:289  pass:264  dwarn:0   dfail:0   fail:1   skip:24  time:524s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:502s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:463s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:572s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:422s
Blacklisted hosts:
fi-glk-dsi       total:289  pass:239  dwarn:1   dfail:4   fail:0   skip:45  time:473s

b911f67a17e5eef16d49a51b83f7da12666e3be6 drm-tip: 2017y-11m-07d-11h-11m-37s UTC integration manifest
9bc7cd3fed32 drm/i915: Load plane color luts from atomic flip
885a07d97e61 drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms
81e35d5d8e56 drm/i915: Enable plane color features
86eb07be510e drm: Define helper function for plane color enabling
bb9318342473 drm: Add Plane Gamma properties
ad5a351603cf drm: Add Plane CTM property
120c35761405 drm: Add Plane Degamma properties

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6988/
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Re: [RFC 1/7] drm: Add Plane Degamma properties

[Shankar, Uma]

>-----Original Message-----
>From: Brian Starkey [mailto:brian.starkey@arm.com]
>Sent: Tuesday, November 7, 2017 11:40 PM
>To: Shankar, Uma <uma.shankar@intel.com>
>Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville <ville.syrjala@intel.com>;
>Lankhorst, Maarten <maarten.lankhorst@intel.com>; dri-
>devel@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [RFC 1/7] drm: Add Plane Degamma properties
>
>On Tue, Nov 07, 2017 at 05:49:56PM +0000, Brian Starkey wrote:
>>
>>In one of the previous discussions[1] related to per-plane color
>>management, Lionel suggested that the 16-bit color lut entries weren't
>>enough when considering HDR.
>>
>>It might be worth creating a new gamma lut format with 32-bit entries
>>for these new properties, as HDR is very much a real rather than
>>hypothetical concern these days.
>>
>>Thanks,
>>-Brian
>
>Sorry, failed to paste the link:
>
>[1] https://patchwork.kernel.org/patch/9546905/

Thanks for the input Brian and sharing the link with earlier discussions around this.
I will try to create a separate LUT structure with 32 bit entries which gets used for plane color
features. Not sure what to do for pipe level color since we already use u16 fields. May be the same
color_lut structure (we can call it color_lut2)  can be used for high precision use cases like HDR.

Regards,
Uma Shankar


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Re: [PATCH 0/7] Add Plane Color Properties

[Shankar, Uma]

>-----Original Message-----
>From: Daniel Stone [mailto:daniel@fooishbar.org]
>Sent: Tuesday, November 7, 2017 9:44 PM
>To: Shankar, Uma <uma.shankar@intel.com>
>Cc: intel-gfx <intel-gfx@lists.freedesktop.org>; dri-devel <dri-
>devel@lists.freedesktop.org>; Syrjala, Ville <ville.syrjala@intel.com>; Lankhorst,
>Maarten <maarten.lankhorst@intel.com>
>Subject: Re: [Intel-gfx] [PATCH 0/7] Add Plane Color Properties
>
>Hi Uma,
>
>On 7 November 2017 at 12:06, Uma Shankar <uma.shankar@intel.com> wrote:
>> This patch series adds properties for plane color features. It adds
>> properties for degamma used to linearize data, CSC used for gamut
>> conversion, and gamma used to again non-linearize data as per panel
>> supported color space. These can be utilize by user space to convert
>> planes from one format to another, one color space to another etc.
>>
>> Usersapce can take smart blending decisions and utilize these hardware
>> supported plane color features to get accurate color profile. The same
>> can help in consistent color quality from source to panel taking
>> advantage of advanced color features in hardware.
>>
>> These patches just add the property interfaces and enable helper functions.
>
>This is missing documentation on how plane colour management interacts with
>CRTC colour management. Is it a step before CRTC colour management is
>applied, or does it bypass CRTC colour management, or ... ?
>

We can have color correction at 2 places in the Display hardware pipeline
1. At plane level (before blending)
2. At pipe level (after blending)

Both can be used and function independently of each other. Typical use case can be:

2 Layers planes/overlays with different color space and formats. These can be converted to one
common color space using the plane level color correction, then blended together. If needed 
pipe color correction can be applied on the blended output (based on use case and scenarios)

Regards,
Uma Shankar


>Cheers,
>Daniel
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Re: [Intel-gfx] [PATCH 0/7] Add Plane Color Properties

[Daniel Stone]

Hi Uma,

On 10 November 2017 at 08:37, Shankar, Uma <uma.shankar@intel.com> wrote:
>>This is missing documentation on how plane colour management interacts with
>>CRTC colour management. Is it a step before CRTC colour management is
>>applied, or does it bypass CRTC colour management, or ... ?
>>
>
> We can have color correction at 2 places in the Display hardware pipeline
> 1. At plane level (before blending)
> 2. At pipe level (after blending)
>
> Both can be used and function independently of each other. Typical use case can be:
>
> 2 Layers planes/overlays with different color space and formats. These can be converted to one
> common color space using the plane level color correction, then blended together. If needed
> pipe color correction can be applied on the blended output (based on use case and scenarios)

This is roughly what I'd expected, but I don't believe the same to be
true of all hardware, and it would certainly need to be documented.
Thanks for the explanation!

Cheers,
Daniel
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