[U-Boot] [PATCH 0/2] Add clock support for designware net driver

[U-Boot] [PATCH 0/2] Add clock support for designware net driver

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

_ Patch 1 adds dev_count_phandle_with_args() in read.c to avoid compilation
  errors for Rockchip puma-rk3399 and lion-rk3368 platforms with patch 2.

_ Patch 2 adds clock support to designware net driver.

Patrice Chotard (2):
  dm: core: add missing dev_count_phandle_with_args()
  net: designware: add clock support

 drivers/core/read.c      |  7 +++++++
 drivers/net/designware.c | 43 +++++++++++++++++++++++++++++++++++++++++++
 drivers/net/designware.h |  4 ++++
 3 files changed, 54 insertions(+)

-- 
1.9.1

[U-Boot] [PATCH 1/2] dm: core: add missing dev_count_phandle_with_args()

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

Add missing dev_count_phandle_with_args() to avoid
compilation issue.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 drivers/core/read.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 5d440ce..f346cc1 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -103,6 +103,13 @@ int dev_read_phandle_with_args(struct udevice *dev, const char *list_name,
 					      out_args);
 }
 
+int dev_count_phandle_with_args(struct udevice *dev, const char *list_name,
+				const char *cells_name)
+{
+	return ofnode_count_phandle_with_args(dev_ofnode(dev), list_name,
+					      cells_name);
+}
+
 int dev_read_addr_cells(struct udevice *dev)
 {
 	return ofnode_read_addr_cells(dev_ofnode(dev));
-- 
1.9.1

[U-Boot] [PATCH 2/2] net: designware: add clock support

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 drivers/net/designware.c | 43 +++++++++++++++++++++++++++++++++++++++++++
 drivers/net/designware.h |  4 ++++
 2 files changed, 47 insertions(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 036d231..9207324 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <errno.h>
 #include <miiphy.h>
@@ -661,6 +662,35 @@ int designware_eth_probe(struct udevice *dev)
 	u32 iobase = pdata->iobase;
 	ulong ioaddr;
 	int ret;
+#ifdef CONFIG_CLK
+	int i, err, clock_nb;
+
+	priv->clock_count = 0;
+	clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+	if (clock_nb > 0) {
+		priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+					    GFP_KERNEL);
+		if (!priv->clocks)
+			return -ENOMEM;
+
+		for (i = 0; i < clock_nb; i++) {
+			err = clk_get_by_index(dev, i, &priv->clocks[i]);
+			if (err < 0)
+				break;
+
+			err = clk_enable(&priv->clocks[i]);
+			if (err) {
+				pr_err("failed to enable clock %d\n", i);
+				clk_free(&priv->clocks[i]);
+				goto clk_err;
+			}
+			priv->clock_count++;
+		}
+	} else if (clock_nb != -ENOENT) {
+		pr_err("failed to get clock phandle(%d)\n", clock_nb);
+		return clock_nb;
+	}
+#endif
 
 #if defined(CONFIG_DM_REGULATOR)
 	struct udevice *phy_supply;
@@ -707,6 +737,15 @@ int designware_eth_probe(struct udevice *dev)
 	debug("%s, ret=%d\n", __func__, ret);
 
 	return ret;
+
+#ifdef CONFIG_CLK
+clk_err:
+	ret = clk_release_all(priv->clocks, priv->clock_count);
+	if (ret)
+		pr_err("failed to disable all clocks\n");
+
+	return err;
+#endif
 }
 
 static int designware_eth_remove(struct udevice *dev)
@@ -717,7 +756,11 @@ static int designware_eth_remove(struct udevice *dev)
 	mdio_unregister(priv->bus);
 	mdio_free(priv->bus);
 
+#ifdef CONFIG_CLK
+	return clk_release_all(priv->clocks, priv->clock_count);
+#else
 	return 0;
+#endif
 }
 
 const struct eth_ops designware_eth_ops = {
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 7992d0e..252cd24 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -239,6 +239,10 @@ struct dw_eth_dev {
 #ifdef CONFIG_DM_GPIO
 	struct gpio_desc reset_gpio;
 #endif
+#ifdef CONFIG_CLK
+	struct clk *clocks;	/* clock list */
+	int clock_count;	/* number of clock in clock list */
+#endif
 
 	struct phy_device *phydev;
 	struct mii_dev *bus;
-- 
1.9.1

[U-Boot] [PATCH 0/2] Add clock support for designware net driver

[Patrice CHOTARD]

I forgot to add Simon Glass in review, i will resend this serie.

Sorry

Patrice

On 11/28/2017 05:41 PM, patrice.chotard at st.com wrote:
> From: Patrice Chotard <patrice.chotard@st.com>
> 
> _ Patch 1 adds dev_count_phandle_with_args() in read.c to avoid compilation
>    errors for Rockchip puma-rk3399 and lion-rk3368 platforms with patch 2.
> 
> _ Patch 2 adds clock support to designware net driver.
> 
> Patrice Chotard (2):
>    dm: core: add missing dev_count_phandle_with_args()
>    net: designware: add clock support
> 
>   drivers/core/read.c      |  7 +++++++
>   drivers/net/designware.c | 43 +++++++++++++++++++++++++++++++++++++++++++
>   drivers/net/designware.h |  4 ++++
>   3 files changed, 54 insertions(+)
> 

[U-Boot] [PATCH 1/2] dm: core: add missing dev_count_phandle_with_args()

[Joe Hershberger]

On Tue, Nov 28, 2017 at 10:41 AM,  <patrice.chotard@st.com> wrote:
> From: Patrice Chotard <patrice.chotard@st.com>
>
> Add missing dev_count_phandle_with_args() to avoid
> compilation issue.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

[U-Boot] [PATCH 2/2] net: designware: add clock support

[Joe Hershberger]

On Tue, Nov 28, 2017 at 10:41 AM,  <patrice.chotard@st.com> wrote:
> From: Patrice Chotard <patrice.chotard@st.com>
>
> This implementation manages several clocks, disable and
> free all of them in case of error during probe and in remove
> callback.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>