[PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

[PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

[Sagar Arun Kamble]

With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) merged now
in linux-firmware.git, let us update the default firmware versions.

Cc: Spotswood John A <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Sagar Arun Kamble (3):
  drm/i915/guc: Change default GuC FW for SKL to v9.33
  drm/i915/guc: Change default GuC FW for BXT to v9.29
  drm/i915/guc: Change default GuC FW for KBL to v9.39

 drivers/gpu/drm/i915/intel_guc_fw.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

-- 
1.9.1

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[PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33

[Sagar Arun Kamble]

This patch makes v9.33 firmware as default firmware for SKL.

Note: GuC logging control is changed with this firmware. GuC is
expecting i915 to set control bit to enable "default logging"
while using GuC action UK_LOG_ENABLE_LOGGING.
However i915 is currently not doing this because it is version
specific change and can be handled entirely in GuC. It will need
to be fixed in future firmwares.

This update includes (since v6.1):

- HuC RSA Keys updated.
- Adding per engine preemption support in GuC scheduler
- Minor bug fixes.
- Added support to log media reset count for host to read it
- Sub-feature level control for power management features.
- Minor clean-up for power management interface.
- Unified power management interface and scheduler interface into
  1 file using same version.
- Bug Fix for multi context scheduler flag.
- DCC spec changes for BXT + DCT enabling
- SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
- Moving GuC non_critical r/w data to lower SRAM 64KB
- Media engine Reset fix.  Correctly marking context for resubmission in
  Media Reset case.
- ABT Disable bug fix. Disabled Evaluation mode on context change.
- Async FW in Engine Schedule feature (not enabled from KMD)
- GuC clean up to align developer build in line to production build.
- DCC consistency fix for SKL
- Disable ARAT interrupt before programming ARAT delta.
- Memory range check in Parse to avoid failure due to overflow.
- Enabled WA for MSGCH hang issue
- Clear forcewake in CSB when SQ is empty.
- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
- This is file location change.No functional change done as part of this
  check in.
- Enable decoupled freq for SKL GT4
- 3 tries of wake request needed from GuC2CSME for ME to wake up. Request
  has come from ME spec
- During reset one parameter was not getting accounted
- Enabling Guc Log changes for ultra low logging for OCA
- Enabling build failure check to catch critical section overflow.
- Disable build.bat redundant prints.
- Move few least used functions to non-critical section.
- Rearrange GuC documentation folder structure.
- Synchronize SLPC internal debug interface with other branches.
- Fixing Issue with Default Guc Log changes for OCA using special Control
  Bit

v2: Rebase. Updated commit message.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Spotswood John A <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c
index bbab4e1..631e932 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -30,8 +30,8 @@
 #include "intel_guc_fw.h"
 #include "i915_drv.h"
 
-#define SKL_FW_MAJOR 6
-#define SKL_FW_MINOR 1
+#define SKL_FW_MAJOR 9
+#define SKL_FW_MINOR 33
 
 #define BXT_FW_MAJOR 8
 #define BXT_FW_MINOR 7
-- 
1.9.1

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[PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29

[Sagar Arun Kamble]

This patch makes v9.29 firmware as default firmware for BXT.

Note: GuC logging control is changed with this firmware. GuC is
expecting i915 to set control bit to enable "default logging"
while using GuC action UK_LOG_ENABLE_LOGGING.
However i915 is currently not doing this because it is version
specific change and can be handled entirely in GuC. It will need
to be fixed in future firmwares.

This update includes (since v8.7):

- Added support to log media reset count for host to read it
- BXT WA for fixing MTP hangs. WaDisableDOPRenderClkGatingAtSubmit
- Sub-feature level control for power management features.
- Minor clean-up for power management interface.
- Unified power management interface and scheduler interface into
  1 file using same version.
- Bug Fix for multi context scheduler flag.
- DCC spec changes for BXT + DCT enabling
- Springboard based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
- Moving GuC non_critical r/w data to lower SRAM 64KB
- Enabled IBC for BXT
- Media engine Reset fix.  Correctly marking context for resubmission in
  Media Reset case.
- SLPC Dynamic RPe fix to resolve issues where incorrect frequency was set.
- ABT Disable bug fix. Disabled Evaluation mode on context change.
- GuC clean up to align developer build in line to production build.
- Disable ARAT interrupt before programming ARAT delta.
- Memory range check in Parse to avoid failure due to overflow.
- Clear forcewake in CSB when SQ is empty.
- SLPC IBC 1.6 for APL to ensure multiplier does not cap IA below Pe.
- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
- This is file location change. No functional change done as part of this
  check in.
- 3 tries of wake request needed from GuC2CSME for ME to wake up. Request
  has come from ME spec
- During reset one parameter was not getting accounted
- Enabling Guc Log changes for ultra low logging for OCA
- Disable build.bat redundant prints.
- Move few least used functions to non-critical section.
- Rearrange GuC documentation folder structure.
- Fixing Issue with Default Guc Log changes for OCA using special Control
  Bit

v2: Rebase. Updated commit message.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Spotswood John A <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c
index 631e932..df2ff96 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -33,8 +33,8 @@
 #define SKL_FW_MAJOR 9
 #define SKL_FW_MINOR 33
 
-#define BXT_FW_MAJOR 8
-#define BXT_FW_MINOR 7
+#define BXT_FW_MAJOR 9
+#define BXT_FW_MINOR 29
 
 #define KBL_FW_MAJOR 9
 #define KBL_FW_MINOR 14
-- 
1.9.1

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[PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39

[Sagar Arun Kamble]

This patch makes v9.39 firmware as default firmware for KBL.

Note: GuC logging control is changed with this firmware. GuC is
expecting i915 to set control bit to enable "default logging"
while using GuC action UK_LOG_ENABLE_LOGGING.
However i915 is currently not doing this because it is version
specific change and can be handled entirely in GuC. It will need
to be fixed in future firmwares.

This update includes (since v9.14):

- DCC spec changes for BXT + DCT enabling
- Bug Fix for power conservation feature SLPC_DCC
- Scheduler 1-element submission during DCC cycles.
- SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
- Moving GuC non_critical r/w data to lower SRAM 64KB
- Media engine Reset fix.  Correctly marking context for resubmission in
  Media Reset case.
- ABT Disable bug fix. Disabled Evaluation mode on context change.
- Async FW in Engine Schedule feature (not enabled from KMD)
- GuC clean up to align developer build in line to production build.
- Disable ARAT interrupt before programming ARAT delta.
- Memory range check in Parse to avoid failure due to overflow.
- GuC Msg Channel Hang WA - Stall GUC for mmio access when IDI is low
  during CPD flow.
- Fix for submit queue over flow issue
- Enabling IBC on KBL GT3 15W, GT4 45W
- Disabling wrong device ID WA in production signed kernel
- Enabling WA for MSGCH hang issue upto required KBL stepping
- Clear forcewake in CSB when SQ is empty.
- 3Tries of GuC2CSME wake request
- During reset one parameter was not getting accounted
- Disable DCC 1-elem mode submission
- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
- This is file location change.No functional change done as part of this
  check in.
- Enabling Guc Log changes for ultra low logging for OCA
- Enabling Dynamic Render Power Well Hysteresis Programming for Compute
  Worklaods
- Enabling build failure check to catch critical section overflow.
- Disable build.bat redundant prints.
- Move few least used functions to non-critical section.
- Rearrange GuC documentation folder structure.
- Synchronize SLPC internal debug interface with other branches.
- Fixing Issue with Default Guc Log changes for OCA using special Control
  Bit
- Aggressive DCC implementation for supported platforms.

v2: Rebase. Updated commit message.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Spotswood John A <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_guc_fw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c
index df2ff96..89862fa 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -37,7 +37,7 @@
 #define BXT_FW_MINOR 29
 
 #define KBL_FW_MAJOR 9
-#define KBL_FW_MINOR 14
+#define KBL_FW_MINOR 39
 
 #define GLK_FW_MAJOR 10
 #define GLK_FW_MINOR 56
-- 
1.9.1

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Re: [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39

[Srivatsa, Anusha]

>-----Original Message-----
>From: Kamble, Sagar A
>Sent: Wednesday, November 29, 2017 8:19 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Kamble, Sagar A <sagar.a.kamble@intel.com>; Mcgee, Jeff
><jeff.mcgee@intel.com>; Spotswood, John A <john.a.spotswood@intel.com>;
>Srivatsa, Anusha <anusha.srivatsa@intel.com>; Wajdeczko, Michal
><Michal.Wajdeczko@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas
>Lahtinen <joonas.lahtinen@linux.intel.com>
>Subject: [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39
>
>This patch makes v9.39 firmware as default firmware for KBL.
>
>Note: GuC logging control is changed with this firmware. GuC is expecting i915 to
>set control bit to enable "default logging"
>while using GuC action UK_LOG_ENABLE_LOGGING.
>However i915 is currently not doing this because it is version specific change and
>can be handled entirely in GuC. It will need to be fixed in future firmwares.
>
>This update includes (since v9.14):
>
>- DCC spec changes for BXT + DCT enabling
>- Bug Fix for power conservation feature SLPC_DCC
>- Scheduler 1-element submission during DCC cycles.
>- SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
>- Moving GuC non_critical r/w data to lower SRAM 64KB
>- Media engine Reset fix.  Correctly marking context for resubmission in
>  Media Reset case.
>- ABT Disable bug fix. Disabled Evaluation mode on context change.
>- Async FW in Engine Schedule feature (not enabled from KMD)
>- GuC clean up to align developer build in line to production build.
>- Disable ARAT interrupt before programming ARAT delta.
>- Memory range check in Parse to avoid failure due to overflow.
>- GuC Msg Channel Hang WA - Stall GUC for mmio access when IDI is low
>  during CPD flow.
>- Fix for submit queue over flow issue
>- Enabling IBC on KBL GT3 15W, GT4 45W
>- Disabling wrong device ID WA in production signed kernel
>- Enabling WA for MSGCH hang issue upto required KBL stepping
>- Clear forcewake in CSB when SQ is empty.
>- 3Tries of GuC2CSME wake request
>- During reset one parameter was not getting accounted
>- Disable DCC 1-elem mode submission
>- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
>- This is file location change.No functional change done as part of this
>  check in.
>- Enabling Guc Log changes for ultra low logging for OCA
>- Enabling Dynamic Render Power Well Hysteresis Programming for Compute
>  Worklaods
>- Enabling build failure check to catch critical section overflow.
>- Disable build.bat redundant prints.
>- Move few least used functions to non-critical section.
>- Rearrange GuC documentation folder structure.
>- Synchronize SLPC internal debug interface with other branches.
>- Fixing Issue with Default Guc Log changes for OCA using special Control
>  Bit
>- Aggressive DCC implementation for supported platforms.
>
>v2: Rebase. Updated commit message.
>
>Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
>Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>Cc: Spotswood John A <john.a.spotswood@intel.com>
>Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Anusha Srivatsa<anusha.srivatsa@intel.com >

> drivers/gpu/drm/i915/intel_guc_fw.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
>b/drivers/gpu/drm/i915/intel_guc_fw.c
>index df2ff96..89862fa 100644
>--- a/drivers/gpu/drm/i915/intel_guc_fw.c
>+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
>@@ -37,7 +37,7 @@
> #define BXT_FW_MINOR 29
>
> #define KBL_FW_MAJOR 9
>-#define KBL_FW_MINOR 14
>+#define KBL_FW_MINOR 39
>
> #define GLK_FW_MAJOR 10
> #define GLK_FW_MINOR 56
>--
>1.9.1

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Re: [PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29

[Srivatsa, Anusha]

>-----Original Message-----
>From: Kamble, Sagar A
>Sent: Wednesday, November 29, 2017 8:19 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Kamble, Sagar A <sagar.a.kamble@intel.com>; Mcgee, Jeff
><jeff.mcgee@intel.com>; Spotswood, John A <john.a.spotswood@intel.com>;
>Srivatsa, Anusha <anusha.srivatsa@intel.com>; Wajdeczko, Michal
><Michal.Wajdeczko@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas
>Lahtinen <joonas.lahtinen@linux.intel.com>
>Subject: [PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29
>
>This patch makes v9.29 firmware as default firmware for BXT.
>
>Note: GuC logging control is changed with this firmware. GuC is expecting i915 to
>set control bit to enable "default logging"
>while using GuC action UK_LOG_ENABLE_LOGGING.
>However i915 is currently not doing this because it is version specific change and
>can be handled entirely in GuC. It will need to be fixed in future firmwares.
>
>This update includes (since v8.7):
>
>- Added support to log media reset count for host to read it
>- BXT WA for fixing MTP hangs. WaDisableDOPRenderClkGatingAtSubmit
>- Sub-feature level control for power management features.
>- Minor clean-up for power management interface.
>- Unified power management interface and scheduler interface into
>  1 file using same version.
>- Bug Fix for multi context scheduler flag.
>- DCC spec changes for BXT + DCT enabling
>- Springboard based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
>- Moving GuC non_critical r/w data to lower SRAM 64KB
>- Enabled IBC for BXT
>- Media engine Reset fix.  Correctly marking context for resubmission in
>  Media Reset case.
>- SLPC Dynamic RPe fix to resolve issues where incorrect frequency was set.
>- ABT Disable bug fix. Disabled Evaluation mode on context change.
>- GuC clean up to align developer build in line to production build.
>- Disable ARAT interrupt before programming ARAT delta.
>- Memory range check in Parse to avoid failure due to overflow.
>- Clear forcewake in CSB when SQ is empty.
>- SLPC IBC 1.6 for APL to ensure multiplier does not cap IA below Pe.
>- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
>- This is file location change. No functional change done as part of this
>  check in.
>- 3 tries of wake request needed from GuC2CSME for ME to wake up. Request
>  has come from ME spec
>- During reset one parameter was not getting accounted
>- Enabling Guc Log changes for ultra low logging for OCA
>- Disable build.bat redundant prints.
>- Move few least used functions to non-critical section.
>- Rearrange GuC documentation folder structure.
>- Fixing Issue with Default Guc Log changes for OCA using special Control
>  Bit
>
>v2: Rebase. Updated commit message.
>
>Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
>Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>Cc: Spotswood John A <john.a.spotswood@intel.com>
>Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
>b/drivers/gpu/drm/i915/intel_guc_fw.c
>index 631e932..df2ff96 100644
>--- a/drivers/gpu/drm/i915/intel_guc_fw.c
>+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
>@@ -33,8 +33,8 @@
> #define SKL_FW_MAJOR 9
> #define SKL_FW_MINOR 33
>
>-#define BXT_FW_MAJOR 8
>-#define BXT_FW_MINOR 7
>+#define BXT_FW_MAJOR 9
>+#define BXT_FW_MINOR 29
>
> #define KBL_FW_MAJOR 9
> #define KBL_FW_MINOR 14
>--
>1.9.1

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Re: [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33

[Srivatsa, Anusha]

>-----Original Message-----
>From: Kamble, Sagar A
>Sent: Wednesday, November 29, 2017 8:19 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Kamble, Sagar A <sagar.a.kamble@intel.com>; Mcgee, Jeff
><jeff.mcgee@intel.com>; Spotswood, John A <john.a.spotswood@intel.com>;
>Srivatsa, Anusha <anusha.srivatsa@intel.com>; Wajdeczko, Michal
><Michal.Wajdeczko@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas
>Lahtinen <joonas.lahtinen@linux.intel.com>
>Subject: [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33
>
>This patch makes v9.33 firmware as default firmware for SKL.
>
>Note: GuC logging control is changed with this firmware. GuC is expecting i915 to
>set control bit to enable "default logging"
>while using GuC action UK_LOG_ENABLE_LOGGING.
>However i915 is currently not doing this because it is version specific change and
>can be handled entirely in GuC. It will need to be fixed in future firmwares.
>
>This update includes (since v6.1):
>
>- HuC RSA Keys updated.
>- Adding per engine preemption support in GuC scheduler
>- Minor bug fixes.
>- Added support to log media reset count for host to read it
>- Sub-feature level control for power management features.
>- Minor clean-up for power management interface.
>- Unified power management interface and scheduler interface into
>  1 file using same version.
>- Bug Fix for multi context scheduler flag.
>- DCC spec changes for BXT + DCT enabling
>- SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
>- Moving GuC non_critical r/w data to lower SRAM 64KB
>- Media engine Reset fix.  Correctly marking context for resubmission in
>  Media Reset case.
>- ABT Disable bug fix. Disabled Evaluation mode on context change.
>- Async FW in Engine Schedule feature (not enabled from KMD)
>- GuC clean up to align developer build in line to production build.
>- DCC consistency fix for SKL
>- Disable ARAT interrupt before programming ARAT delta.
>- Memory range check in Parse to avoid failure due to overflow.
>- Enabled WA for MSGCH hang issue
>- Clear forcewake in CSB when SQ is empty.
>- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
>- This is file location change.No functional change done as part of this
>  check in.
>- Enable decoupled freq for SKL GT4
>- 3 tries of wake request needed from GuC2CSME for ME to wake up. Request
>  has come from ME spec
>- During reset one parameter was not getting accounted
>- Enabling Guc Log changes for ultra low logging for OCA
>- Enabling build failure check to catch critical section overflow.
>- Disable build.bat redundant prints.
>- Move few least used functions to non-critical section.
>- Rearrange GuC documentation folder structure.
>- Synchronize SLPC internal debug interface with other branches.
>- Fixing Issue with Default Guc Log changes for OCA using special Control
>  Bit
>
>v2: Rebase. Updated commit message.
>
>Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
>Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>Cc: Spotswood John A <john.a.spotswood@intel.com>
>Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
>b/drivers/gpu/drm/i915/intel_guc_fw.c
>index bbab4e1..631e932 100644
>--- a/drivers/gpu/drm/i915/intel_guc_fw.c
>+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
>@@ -30,8 +30,8 @@
> #include "intel_guc_fw.h"
> #include "i915_drv.h"
>
>-#define SKL_FW_MAJOR 6
>-#define SKL_FW_MINOR 1
>+#define SKL_FW_MAJOR 9
>+#define SKL_FW_MINOR 33
>
> #define BXT_FW_MAJOR 8
> #define BXT_FW_MINOR 7
>--
>1.9.1

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Re: [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39

[Rodrigo Vivi]

On Wed, Nov 29, 2017 at 10:22:11PM +0000, Srivatsa, Anusha wrote:
> 
> 
> >-----Original Message-----
> >From: Kamble, Sagar A
> >Sent: Wednesday, November 29, 2017 8:19 AM
> >To: intel-gfx@lists.freedesktop.org
> >Cc: Kamble, Sagar A <sagar.a.kamble@intel.com>; Mcgee, Jeff
> ><jeff.mcgee@intel.com>; Spotswood, John A <john.a.spotswood@intel.com>;
> >Srivatsa, Anusha <anusha.srivatsa@intel.com>; Wajdeczko, Michal
> ><Michal.Wajdeczko@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas
> >Lahtinen <joonas.lahtinen@linux.intel.com>
> >Subject: [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39
> >
> >This patch makes v9.39 firmware as default firmware for KBL.
> >
> >Note: GuC logging control is changed with this firmware. GuC is expecting i915 to
> >set control bit to enable "default logging"
> >while using GuC action UK_LOG_ENABLE_LOGGING.
> >However i915 is currently not doing this because it is version specific change and
> >can be handled entirely in GuC. It will need to be fixed in future firmwares.
> >
> >This update includes (since v9.14):
> >
> >- DCC spec changes for BXT + DCT enabling
> >- Bug Fix for power conservation feature SLPC_DCC
> >- Scheduler 1-element submission during DCC cycles.
> >- SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
> >- Moving GuC non_critical r/w data to lower SRAM 64KB
> >- Media engine Reset fix.  Correctly marking context for resubmission in
> >  Media Reset case.
> >- ABT Disable bug fix. Disabled Evaluation mode on context change.
> >- Async FW in Engine Schedule feature (not enabled from KMD)
> >- GuC clean up to align developer build in line to production build.
> >- Disable ARAT interrupt before programming ARAT delta.
> >- Memory range check in Parse to avoid failure due to overflow.
> >- GuC Msg Channel Hang WA - Stall GUC for mmio access when IDI is low
> >  during CPD flow.
> >- Fix for submit queue over flow issue
> >- Enabling IBC on KBL GT3 15W, GT4 45W
> >- Disabling wrong device ID WA in production signed kernel
> >- Enabling WA for MSGCH hang issue upto required KBL stepping
> >- Clear forcewake in CSB when SQ is empty.
> >- 3Tries of GuC2CSME wake request
> >- During reset one parameter was not getting accounted
> >- Disable DCC 1-elem mode submission
> >- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
> >- This is file location change.No functional change done as part of this
> >  check in.
> >- Enabling Guc Log changes for ultra low logging for OCA
> >- Enabling Dynamic Render Power Well Hysteresis Programming for Compute
> >  Worklaods
> >- Enabling build failure check to catch critical section overflow.
> >- Disable build.bat redundant prints.
> >- Move few least used functions to non-critical section.
> >- Rearrange GuC documentation folder structure.
> >- Synchronize SLPC internal debug interface with other branches.
> >- Fixing Issue with Default Guc Log changes for OCA using special Control
> >  Bit
> >- Aggressive DCC implementation for supported platforms.
> >
> >v2: Rebase. Updated commit message.
> >
> >Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> >Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> >Cc: Spotswood John A <john.a.spotswood@intel.com>
> >Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> >Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> >Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Reviewed-by: Anusha Srivatsa<anusha.srivatsa@intel.com >

Thanks for the patches, thanks for splitting that initial series as requested and thanks for review.
All 3 patches merged to dinq.

> 
> > drivers/gpu/drm/i915/intel_guc_fw.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
> >b/drivers/gpu/drm/i915/intel_guc_fw.c
> >index df2ff96..89862fa 100644
> >--- a/drivers/gpu/drm/i915/intel_guc_fw.c
> >+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
> >@@ -37,7 +37,7 @@
> > #define BXT_FW_MINOR 29
> >
> > #define KBL_FW_MAJOR 9
> >-#define KBL_FW_MINOR 14
> >+#define KBL_FW_MINOR 39
> >
> > #define GLK_FW_MAJOR 10
> > #define GLK_FW_MINOR 56
> >--
> >1.9.1
> 
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✗ Fi.CI.BAT: failure for drm/i915/guc: Update default GuC FW for SKL/BXT/KBL (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Update default GuC FW for SKL/BXT/KBL (rev2)
URL   : https://patchwork.freedesktop.org/series/34590/
State : failure

== Summary ==

Series 34590 revision 2 was fully merged or fully failed: no git log

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✗ Fi.CI.BAT: failure for drm/i915/guc: Update default GuC FW for SKL/BXT/KBL (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Update default GuC FW for SKL/BXT/KBL (rev2)
URL   : https://patchwork.freedesktop.org/series/34590/
State : failure

== Summary ==

Applying: drm/i915/guc: Change default GuC FW for SKL to v9.33
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/i915/intel_guc_fw.c
Falling back to patching base and 3-way merge...
No changes -- Patch already applied.
Applying: drm/i915/guc: Change default GuC FW for BXT to v9.29
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/i915/intel_guc_fw.c
Falling back to patching base and 3-way merge...
No changes -- Patch already applied.
Applying: drm/i915/guc: Change default GuC FW for KBL to v9.39
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/i915/intel_guc_fw.c
Falling back to patching base and 3-way merge...
No changes -- Patch already applied.

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Re: [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

[Srivatsa, Anusha]

>-----Original Message-----
>From: Joonas Lahtinen [mailto:joonas.lahtinen@linux.intel.com]
>Sent: Tuesday, November 28, 2017 11:11 PM
>To: Kamble, Sagar A <sagar.a.kamble@intel.com>; intel-
>gfx@lists.freedesktop.org
>Cc: Spotswood, John A <john.a.spotswood@intel.com>; Srivatsa, Anusha
><anusha.srivatsa@intel.com>; Wajdeczko, Michal
><Michal.Wajdeczko@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
>Subject: Re: [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for
>SKL/BXT/KBL
>
>On Wed, 2017-11-29 at 11:47 +0530, Sagar Arun Kamble wrote:
>> With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now
>> at 01.org downloads, let us update the default firmware versions.
>
>I thought the agreement was for them to be at linux-firmware repo?

Yes. 
@Sagar, slight change in commit message would be nice. Mention - linux-firware.git (since firmware is already merged there and that will be the one main point to find blobs moving forward) instead of 01.org.

Anusha 
>Regards, Joonas
>--
>Joonas Lahtinen
>Open Source Technology Center
>Intel Corporation
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Re: [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

[Sagar Arun Kamble]

On 11/29/2017 12:41 PM, Joonas Lahtinen wrote:
> On Wed, 2017-11-29 at 11:47 +0530, Sagar Arun Kamble wrote:
>> With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now
>> at 01.org downloads, let us update the default firmware versions.
> I thought the agreement was for them to be at linux-firmware repo?

Sorry. I should have mentioned linux-firmware.git. They are merged there.

>
> Regards, Joonas

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Re: [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

[Joonas Lahtinen]

On Wed, 2017-11-29 at 11:47 +0530, Sagar Arun Kamble wrote:
> With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now
> at 01.org downloads, let us update the default firmware versions.

I thought the agreement was for them to be at linux-firmware repo?

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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[PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

[Sagar Arun Kamble]

With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now
at 01.org downloads, let us update the default firmware versions.

Cc: Spotswood John A <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Sagar Arun Kamble (3):
  drm/i915/guc: Change default GuC FW for SKL to v9.33
  drm/i915/guc: Change default GuC FW for BXT to v9.29
  drm/i915/guc: Change default GuC FW for KBL to v9.39

 drivers/gpu/drm/i915/intel_guc_fw.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

-- 
1.9.1

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