[PATCH 1/5] pmdinfogen: fix cross compilation for ARM BE

[PATCH 1/5] pmdinfogen: fix cross compilation for ARM BE

[Hemant Agrawal]

cross compiling DPDK for BE mode on ARM results into errors

"PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"

Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
Cc: Neil Horman <nhorman@tuxdriver.com>
Cc: stable@dpdk.org

Signed-off-by: Jun Yang <jun.yang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 buildtools/pmdinfogen/pmdinfogen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/buildtools/pmdinfogen/pmdinfogen.c b/buildtools/pmdinfogen/pmdinfogen.c
index e73fc76..9119e52 100644
--- a/buildtools/pmdinfogen/pmdinfogen.c
+++ b/buildtools/pmdinfogen/pmdinfogen.c
@@ -181,7 +181,7 @@ static int parse_elf(struct elf_info *info, const char *filename)
 		sechdrs[i].sh_offset    =
 			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_offset);
 		sechdrs[i].sh_size      =
-			TO_NATIVE(endian, 32, sechdrs[i].sh_size);
+			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_size);
 		sechdrs[i].sh_link      =
 			TO_NATIVE(endian, 32, sechdrs[i].sh_link);
 		sechdrs[i].sh_info      =
-- 
2.7.4

[PATCH 2/5] lpm: fix compilation on ARM BE

[Hemant Agrawal]

Compiling on ARM BE using Linaro toolchain caused following
error/warnings.

rte_lpm.c: In function ‘add_depth_big_v20’:
rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
    { .group_idx = (uint8_t)tbl8_group_index, },
    ^
rte_lpm.c:911:4: note: (near initialization for
	‘new_tbl24_entry.depth’)
rte_lpm.c:911:6:error: field name not in record or union initializer
    { .group_idx = (uint8_t)tbl8_group_index, },
      ^
rte_lpm.c:911:6: note: (near initialization for
	‘new_tbl24_entry.depth’)
rte_lpm.c:914:13: error: initialized field overwritten
	[-Werror=override-init]
    .depth = 0,

Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 lib/librte_lpm/rte_lpm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c
index 140dbb2..3723743 100644
--- a/lib/librte_lpm/rte_lpm.c
+++ b/lib/librte_lpm/rte_lpm.c
@@ -913,7 +913,7 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-			{ .group_idx = (uint8_t)tbl8_group_index, },
+			.group_idx = (uint8_t)tbl8_group_index,
 			.valid = VALID,
 			.valid_group = 1,
 			.depth = 0,
@@ -959,7 +959,7 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-				{ .group_idx = (uint8_t)tbl8_group_index, },
+				.group_idx = (uint8_t)tbl8_group_index,
 				.valid = VALID,
 				.valid_group = 1,
 				.depth = 0,
@@ -1366,7 +1366,7 @@ delete_depth_small_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-			{.next_hop = lpm->rules_tbl[sub_rule_index].next_hop,},
+			.next_hop = lpm->rules_tbl[sub_rule_index].next_hop,
 			.valid = VALID,
 			.valid_group = 0,
 			.depth = sub_rule_depth,
@@ -1669,7 +1669,7 @@ delete_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked,
 	} else if (tbl8_recycle_index > -1) {
 		/* Update tbl24 entry. */
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-			{ .next_hop = lpm->tbl8[tbl8_recycle_index].next_hop, },
+			.next_hop = lpm->tbl8[tbl8_recycle_index].next_hop,
 			.valid = VALID,
 			.valid_group = 0,
 			.depth = lpm->tbl8[tbl8_recycle_index].depth,
-- 
2.7.4

Re: [PATCH 2/5] lpm: fix compilation on ARM BE

[Bruce Richardson]

On Thu, Nov 02, 2017 at 03:38:52PM +0530, Hemant Agrawal wrote:
> Compiling on ARM BE using Linaro toolchain caused following
> error/warnings.
> 
> rte_lpm.c: In function ‘add_depth_big_v20’:
> rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
>     { .group_idx = (uint8_t)tbl8_group_index, },
>     ^
> rte_lpm.c:911:4: note: (near initialization for
> 	‘new_tbl24_entry.depth’)
> rte_lpm.c:911:6:error: field name not in record or union initializer
>     { .group_idx = (uint8_t)tbl8_group_index, },
>       ^
> rte_lpm.c:911:6: note: (near initialization for
> 	‘new_tbl24_entry.depth’)
> rte_lpm.c:914:13: error: initialized field overwritten
> 	[-Werror=override-init]
>     .depth = 0,
> 
> Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
> Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---

Acked-by: Bruce Richardson <bruce.richardson@intel.com>

Re: [PATCH 2/5] lpm: fix compilation on ARM BE

[Hemant Agrawal]

On 12/11/2017 6:11 PM, Bruce Richardson wrote:
> On Thu, Nov 02, 2017 at 03:38:52PM +0530, Hemant Agrawal wrote:
>> Compiling on ARM BE using Linaro toolchain caused following
>> error/warnings.
>>
>> rte_lpm.c: In function ‘add_depth_big_v20’:
>> rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
>>     { .group_idx = (uint8_t)tbl8_group_index, },
>>     ^
>> rte_lpm.c:911:4: note: (near initialization for
>> 	‘new_tbl24_entry.depth’)
>> rte_lpm.c:911:6:error: field name not in record or union initializer
>>     { .group_idx = (uint8_t)tbl8_group_index, },
>>       ^
>> rte_lpm.c:911:6: note: (near initialization for
>> 	‘new_tbl24_entry.depth’)
>> rte_lpm.c:914:13: error: initialized field overwritten
>> 	[-Werror=override-init]
>>     .depth = 0,
>>
>> Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
>> Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
>> ---
>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
>
Thanks for review. I found a better solution, I will be sending a v2.

[PATCH 3/5] bus/dpaa: fix compilation on ARM BE

[Hemant Agrawal]

Fix the following compilation error when compiling
with ARM BE compiler.

drivers/bus/dpaa/include/fsl_qman.h:1997:25:
error: statement with no effect [-Werror=unused-value]
 #define hw_sg_to_cpu(x) (x)

Fixes: c47ff048b99a ("bus/dpaa: add QMAN driver core routines")

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/dpaa/include/fsl_qman.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index eedfd7e..72556dc 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1993,8 +1993,8 @@ static inline int qman_poll_fq_for_init(struct qman_fq *fq)
 }
 
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#define cpu_to_hw_sg(x) (x)
-#define hw_sg_to_cpu(x) (x)
+#define cpu_to_hw_sg(x)
+#define hw_sg_to_cpu(x)
 #else
 #define cpu_to_hw_sg(x)  __cpu_to_hw_sg(x)
 #define hw_sg_to_cpu(x)  __hw_sg_to_cpu(x)
-- 
2.7.4

[PATCH 4/5] net/i40e: fix compilation on ARM BE

[Hemant Agrawal]

This patch fixes the following error observed when
compiling with ARM BE compiler.

i40e_ethdev.c: In function ‘i40e_dev_tunnel_filter_set’:
i40e_ethdev.c:6988:5: error: lvalue required as unary ‘&’ operand
     &rte_cpu_to_le_32(ipv4_addr),

Fixes: edc845bd53ec ("app/testpmd: fix build on FreeBSD")
Cc: Marvin Liu <yong.liu@intel.com>
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/i40e/i40e_ethdev.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index bcd9ef1..c66f101 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6951,7 +6951,7 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
 			uint8_t add)
 {
 	uint16_t ip_type;
-	uint32_t ipv4_addr;
+	uint32_t ipv4_addr, ipv4_addr_le;
 	uint8_t i, tun_type = 0;
 	/* internal varialbe to convert ipv6 byte order */
 	uint32_t convert_ipv6[4];
@@ -6984,8 +6984,9 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
 	if (tunnel_filter->ip_type == RTE_TUNNEL_IPTYPE_IPV4) {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4;
 		ipv4_addr = rte_be_to_cpu_32(tunnel_filter->ip_addr.ipv4_addr);
+		ipv4_addr_le = rte_cpu_to_le_32(ipv4_addr);
 		rte_memcpy(&pfilter->element.ipaddr.v4.data,
-				&rte_cpu_to_le_32(ipv4_addr),
+				&ipv4_addr_le,
 				sizeof(pfilter->element.ipaddr.v4.data));
 	} else {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6;
@@ -7302,7 +7303,7 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
 		      uint8_t add)
 {
 	uint16_t ip_type;
-	uint32_t ipv4_addr;
+	uint32_t ipv4_addr, ipv4_addr_le;
 	uint8_t i, tun_type = 0;
 	/* internal variable to convert ipv6 byte order */
 	uint32_t convert_ipv6[4];
@@ -7338,8 +7339,9 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
 	if (tunnel_filter->ip_type == I40E_TUNNEL_IPTYPE_IPV4) {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4;
 		ipv4_addr = rte_be_to_cpu_32(tunnel_filter->ip_addr.ipv4_addr);
+		ipv4_addr_le = rte_cpu_to_le_32(ipv4_addr);
 		rte_memcpy(&pfilter->element.ipaddr.v4.data,
-				&rte_cpu_to_le_32(ipv4_addr),
+				&ipv4_addr_le,
 				sizeof(pfilter->element.ipaddr.v4.data));
 	} else {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6;
-- 
2.7.4

Re: [PATCH 4/5] net/i40e: fix compilation on ARM BE

[Xing, Beilei]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Hemant Agrawal
> Sent: Thursday, November 2, 2017 6:09 PM
> To: dev@dpdk.org
> Cc: Yigit, Ferruh <ferruh.yigit@intel.com>; Liu, Yong <yong.liu@intel.com>;
> stable@dpdk.org
> Subject: [dpdk-dev] [PATCH 4/5] net/i40e: fix compilation on ARM BE
> 
> This patch fixes the following error observed when compiling with ARM BE
> compiler.
> 
> i40e_ethdev.c: In function ‘i40e_dev_tunnel_filter_set’:
> i40e_ethdev.c:6988:5: error: lvalue required as unary ‘&’ operand
>      &rte_cpu_to_le_32(ipv4_addr),
> 
> Fixes: edc845bd53ec ("app/testpmd: fix build on FreeBSD")
> Cc: Marvin Liu <yong.liu@intel.com>
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Acked-by: Beilei Xing <beilei.xing@intel.com>

[PATCH 5/5] net/ixgbe: fix compilation on ARM BE

[Hemant Agrawal]

fixes the following compilation error on compiling with ARM BE compiler

ixgbe_common.c: In function ‘ixgbe_host_interface_command’:
ixgbe_common.c:4610:22: error: passing argument 1 of
‘__builtin_bswap32’ makes integer from pointer without a cast
[-Werror=int-conversion]
   IXGBE_LE32_TO_CPUS(&buffer[bi]);
                      ^
Fixes: aa4fc14d2cee ("ixgbe: update base driver")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/ixgbe/base/ixgbe_common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c
index 7f85713..5e6ad95 100644
--- a/drivers/net/ixgbe/base/ixgbe_common.c
+++ b/drivers/net/ixgbe/base/ixgbe_common.c
@@ -4607,7 +4607,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 	/* first pull in the header so we know the buffer length */
 	for (bi = 0; bi < dword_len; bi++) {
 		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
-		IXGBE_LE32_TO_CPUS(&buffer[bi]);
+		IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
 	}
 
 	/* If there is any thing in data position pull it in */
@@ -4627,7 +4627,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 	/* Pull in the rest of the buffer (bi is where we left off) */
 	for (; bi <= dword_len; bi++) {
 		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
-		IXGBE_LE32_TO_CPUS(&buffer[bi]);
+		IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
 	}
 
 rel_out:
-- 
2.7.4

Re: [PATCH 5/5] net/ixgbe: fix compilation on ARM BE

[Bruce Richardson]

On Thu, Nov 02, 2017 at 03:38:55PM +0530, Hemant Agrawal wrote:
> fixes the following compilation error on compiling with ARM BE compiler
> 
> ixgbe_common.c: In function ‘ixgbe_host_interface_command’:
> ixgbe_common.c:4610:22: error: passing argument 1 of
> ‘__builtin_bswap32’ makes integer from pointer without a cast
> [-Werror=int-conversion]
>    IXGBE_LE32_TO_CPUS(&buffer[bi]);
>                       ^
> Fixes: aa4fc14d2cee ("ixgbe: update base driver")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Looks harmless!

Acked-by: Bruce Richardson <bruce.richardson@intel.com>

Re: [PATCH 1/5] pmdinfogen: fix cross compilation for ARM BE

[Bruce Richardson]

On Thu, Nov 02, 2017 at 03:38:51PM +0530, Hemant Agrawal wrote:
> cross compiling DPDK for BE mode on ARM results into errors
> 
> "PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"
> 
> Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
> Cc: Neil Horman <nhorman@tuxdriver.com>
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jun Yang <jun.yang@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
>  buildtools/pmdinfogen/pmdinfogen.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Comment could be a bit more specific about what the problem is and how
changing the hard-coded "32" fixes it.

Haven't tested the cross compilation part myself, but this causes no
errors for 32-bit or 64-bit builds on my system. So, with some more
detail on the specifics of the fix in the commit message:

Acked-by: Bruce Richardson <bruce.richardson@intel.com>

> diff --git a/buildtools/pmdinfogen/pmdinfogen.c b/buildtools/pmdinfogen/pmdinfogen.c
> index e73fc76..9119e52 100644
> --- a/buildtools/pmdinfogen/pmdinfogen.c
> +++ b/buildtools/pmdinfogen/pmdinfogen.c
> @@ -181,7 +181,7 @@ static int parse_elf(struct elf_info *info, const char *filename)
>  		sechdrs[i].sh_offset    =
>  			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_offset);
>  		sechdrs[i].sh_size      =
> -			TO_NATIVE(endian, 32, sechdrs[i].sh_size);
> +			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_size);
>  		sechdrs[i].sh_link      =
>  			TO_NATIVE(endian, 32, sechdrs[i].sh_link);
>  		sechdrs[i].sh_info      =
> -- 
> 2.7.4
> 

Re: [PATCH 1/5] pmdinfogen: fix cross compilation for ARM BE

[Neil Horman]

On Mon, Dec 11, 2017 at 12:40:32PM +0000, Bruce Richardson wrote:
> On Thu, Nov 02, 2017 at 03:38:51PM +0530, Hemant Agrawal wrote:
> > cross compiling DPDK for BE mode on ARM results into errors
> > 
> > "PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"
> > 
> > Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
> > Cc: Neil Horman <nhorman@tuxdriver.com>
> > Cc: stable@dpdk.org
> > 
> > Signed-off-by: Jun Yang <jun.yang@nxp.com>
> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> > ---
> >  buildtools/pmdinfogen/pmdinfogen.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> 
> Comment could be a bit more specific about what the problem is and how
> changing the hard-coded "32" fixes it.
> 
> Haven't tested the cross compilation part myself, but this causes no
> errors for 32-bit or 64-bit builds on my system. So, with some more
> detail on the specifics of the fix in the commit message:
> 
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> 

I'm with Bruce.  I'd like to know exactly whats going on here.  I dont have an
ARM system handy, so could you please post the errors that you are seeing here?
Is ADDR_SIZE not defined on BE for ARM or some such?  That seems like it should
be fixed, rather than this change.

Neil

> > diff --git a/buildtools/pmdinfogen/pmdinfogen.c b/buildtools/pmdinfogen/pmdinfogen.c
> > index e73fc76..9119e52 100644
> > --- a/buildtools/pmdinfogen/pmdinfogen.c
> > +++ b/buildtools/pmdinfogen/pmdinfogen.c
> > @@ -181,7 +181,7 @@ static int parse_elf(struct elf_info *info, const char *filename)
> >  		sechdrs[i].sh_offset    =
> >  			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_offset);
> >  		sechdrs[i].sh_size      =
> > -			TO_NATIVE(endian, 32, sechdrs[i].sh_size);
> > +			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_size);
> >  		sechdrs[i].sh_link      =
> >  			TO_NATIVE(endian, 32, sechdrs[i].sh_link);
> >  		sechdrs[i].sh_info      =
> > -- 
> > 2.7.4
> > 
> 

Re: [PATCH 1/5] pmdinfogen: fix cross compilation for ARM BE

[Hemant Agrawal]

Hi Neil/Bruce,

On 12/12/2017 12:28 AM, Neil Horman wrote:
> On Mon, Dec 11, 2017 at 12:40:32PM +0000, Bruce Richardson wrote:
>> On Thu, Nov 02, 2017 at 03:38:51PM +0530, Hemant Agrawal wrote:
>>> cross compiling DPDK for BE mode on ARM results into errors
>>>
>>> "PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"
>>>
>>> Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
>>> Cc: Neil Horman <nhorman@tuxdriver.com>
>>> Cc: stable@dpdk.org
>>>
>>> Signed-off-by: Jun Yang <jun.yang@nxp.com>
>>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
>>> ---
>>>  buildtools/pmdinfogen/pmdinfogen.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>
>> Comment could be a bit more specific about what the problem is and how
>> changing the hard-coded "32" fixes it.
>>
>> Haven't tested the cross compilation part myself, but this causes no
>> errors for 32-bit or 64-bit builds on my system. So, with some more
>> detail on the specifics of the fix in the commit message:
>>
>> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
>>
>
> I'm with Bruce.  I'd like to know exactly whats going on here.  I dont have an
> ARM system handy, so could you please post the errors that you are seeing here?
> Is ADDR_SIZE not defined on BE for ARM or some such?  That seems like it should
> be fixed, rather than this change.
>
> Neil
>

The original code hard codes the conversion for sh_size to 32, which is 
incorrect.

The sh_size can be "Elf32_Word    sh_size" for 32 bit and "Elf64_Xword 
sh_size" for 64 bit systems.

This causes the symtab_stop to have reduced size and thus find can fail.
	info->symtab_stop  = RTE_PTR_ADD(hdr, sechdrs[i].sh_offset + 
sechdrs[i].sh_size);

we fixed it by replacing the hardcoded 32 with ADDR_SIZE is better.

I don't have access to Intel BE compiler, so could not check behavior 
there. One of difference in my env is that I am doing cross compilation 
on intel-x86-64 machine.
I used the following BE compiler
https://releases.linaro.org/components/toolchain/binaries/6.4-2017.11/aarch64_be-linux-gnu/gcc-linaro-6.4.1-2017.11-x86_64_aarch64_be-linux-gnu.tar.xz


>>> diff --git a/buildtools/pmdinfogen/pmdinfogen.c b/buildtools/pmdinfogen/pmdinfogen.c
>>> index e73fc76..9119e52 100644
>>> --- a/buildtools/pmdinfogen/pmdinfogen.c
>>> +++ b/buildtools/pmdinfogen/pmdinfogen.c
>>> @@ -181,7 +181,7 @@ static int parse_elf(struct elf_info *info, const char *filename)
>>>  		sechdrs[i].sh_offset    =
>>>  			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_offset);
>>>  		sechdrs[i].sh_size      =
>>> -			TO_NATIVE(endian, 32, sechdrs[i].sh_size);
>>> +			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_size);
>>>  		sechdrs[i].sh_link      =
>>>  			TO_NATIVE(endian, 32, sechdrs[i].sh_link);
>>>  		sechdrs[i].sh_info      =
>>> --
>>> 2.7.4
>>>
>>
>

Re: [PATCH 1/5] pmdinfogen: fix cross compilation for ARM BE

[Neil Horman]

On Wed, Dec 13, 2017 at 05:22:57PM +0530, Hemant Agrawal wrote:
> Hi Neil/Bruce,
> 
> On 12/12/2017 12:28 AM, Neil Horman wrote:
> > On Mon, Dec 11, 2017 at 12:40:32PM +0000, Bruce Richardson wrote:
> > > On Thu, Nov 02, 2017 at 03:38:51PM +0530, Hemant Agrawal wrote:
> > > > cross compiling DPDK for BE mode on ARM results into errors
> > > > 
> > > > "PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"
> > > > 
> > > > Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
> > > > Cc: Neil Horman <nhorman@tuxdriver.com>
> > > > Cc: stable@dpdk.org
> > > > 
> > > > Signed-off-by: Jun Yang <jun.yang@nxp.com>
> > > > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> > > > ---
> > > >  buildtools/pmdinfogen/pmdinfogen.c | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > 
> > > 
> > > Comment could be a bit more specific about what the problem is and how
> > > changing the hard-coded "32" fixes it.
> > > 
> > > Haven't tested the cross compilation part myself, but this causes no
> > > errors for 32-bit or 64-bit builds on my system. So, with some more
> > > detail on the specifics of the fix in the commit message:
> > > 
> > > Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> > > 
> > 
> > I'm with Bruce.  I'd like to know exactly whats going on here.  I dont have an
> > ARM system handy, so could you please post the errors that you are seeing here?
> > Is ADDR_SIZE not defined on BE for ARM or some such?  That seems like it should
> > be fixed, rather than this change.
> > 
> > Neil
> > 
> 
> The original code hard codes the conversion for sh_size to 32, which is
> incorrect.
> 
> The sh_size can be "Elf32_Word    sh_size" for 32 bit and "Elf64_Xword
> sh_size" for 64 bit systems.
> 
> This causes the symtab_stop to have reduced size and thus find can fail.
> 	info->symtab_stop  = RTE_PTR_ADD(hdr, sechdrs[i].sh_offset +
> sechdrs[i].sh_size);
> 
> we fixed it by replacing the hardcoded 32 with ADDR_SIZE is better.
> 
Oh, my bad, you're correct, I thought it was 32 bits for both ABI's

Acked-by: Neil Horman <nhorman@tuxdriver.com>

[PATCH v2 1/5] pmdinfogen: fix cross compilation for ARM BE

[Hemant Agrawal]

Cross compiling DPDK for BE mode on ARM results into errors
"PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"

The original code assumes the sh_size to be 32 bit, while it can
be Elf32_Word or Elf64_Xword based on 32bit or 64 bit systems.

This patches replaces the sh_size conversion routines to use ADDR_SIZE

Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
Cc: Neil Horman <nhorman@tuxdriver.com>
Cc: stable@dpdk.org

Signed-off-by: Jun Yang <jun.yang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
--
v2: add descriptions and one more place for fix

 buildtools/pmdinfogen/pmdinfogen.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/buildtools/pmdinfogen/pmdinfogen.c b/buildtools/pmdinfogen/pmdinfogen.c
index 96ccbf3..b07dbcf 100644
--- a/buildtools/pmdinfogen/pmdinfogen.c
+++ b/buildtools/pmdinfogen/pmdinfogen.c
@@ -158,7 +158,8 @@ static int parse_elf(struct elf_info *info, const char *filename)
 		 * There are more than 64k sections,
 		 * read count from .sh_size.
 		 */
-		info->num_sections = TO_NATIVE(endian, 32, sechdrs[0].sh_size);
+		info->num_sections =
+			TO_NATIVE(endian, ADDR_SIZE, sechdrs[0].sh_size);
 	} else {
 		info->num_sections = hdr->e_shnum;
 	}
@@ -181,7 +182,7 @@ static int parse_elf(struct elf_info *info, const char *filename)
 		sechdrs[i].sh_offset    =
 			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_offset);
 		sechdrs[i].sh_size      =
-			TO_NATIVE(endian, 32, sechdrs[i].sh_size);
+			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_size);
 		sechdrs[i].sh_link      =
 			TO_NATIVE(endian, 32, sechdrs[i].sh_link);
 		sechdrs[i].sh_info      =
-- 
2.7.4

[PATCH v2 2/5] lpm: fix compilation on ARM BE

[Hemant Agrawal]

Compiling on ARM BE using Linaro toolchain caused following
error/warnings.

rte_lpm.c: In function ‘add_depth_big_v20’:
rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
    { .group_idx = (uint8_t)tbl8_group_index, },
    ^
rte_lpm.c:911:4: note: (near initialization for
	‘new_tbl24_entry.depth’)
rte_lpm.c:911:6:error: field name not in record or union initializer
    { .group_idx = (uint8_t)tbl8_group_index, },
      ^
rte_lpm.c:911:6: note: (near initialization for
	‘new_tbl24_entry.depth’)
rte_lpm.c:914:13: error: initialized field overwritten
	[-Werror=override-init]
    .depth = 0,

Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
Cc: stable@dpdk.org

Signed-off-by: Jun Yang <jun.yang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
v2: added endianess check in the assignments

 lib/librte_lpm/rte_lpm.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c
index e1f1fad..a47c04f 100644
--- a/lib/librte_lpm/rte_lpm.c
+++ b/lib/librte_lpm/rte_lpm.c
@@ -912,10 +912,17 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
 			{ .group_idx = (uint8_t)tbl8_group_index, },
 			.valid = VALID,
 			.valid_group = 1,
 			.depth = 0,
+#else
+			.depth = 0,
+			.valid_group = 1,
+			.valid = VALID,
+			{ .group_idx = (uint8_t)tbl8_group_index, },
+#endif
 		};
 
 		lpm->tbl24[tbl24_index] = new_tbl24_entry;
@@ -958,10 +965,17 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
 				{ .group_idx = (uint8_t)tbl8_group_index, },
 				.valid = VALID,
 				.valid_group = 1,
 				.depth = 0,
+#else
+				.depth = 0,
+				.valid_group = 1,
+				.valid = VALID,
+				{ .group_idx = (uint8_t)tbl8_group_index, },
+#endif
 		};
 
 		lpm->tbl24[tbl24_index] = new_tbl24_entry;
@@ -1365,10 +1379,18 @@ delete_depth_small_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
 			{.next_hop = lpm->rules_tbl[sub_rule_index].next_hop,},
 			.valid = VALID,
 			.valid_group = 0,
 			.depth = sub_rule_depth,
+#else
+			.depth = sub_rule_depth,
+			.valid_group = 0,
+			.valid = VALID,
+			{ .next_hop = lpm->rules_tbl[sub_rule_index].next_hop, },
+#endif
+
 		};
 
 		struct rte_lpm_tbl_entry_v20 new_tbl8_entry = {
@@ -1668,10 +1690,17 @@ delete_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked,
 	} else if (tbl8_recycle_index > -1) {
 		/* Update tbl24 entry. */
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
 			{ .next_hop = lpm->tbl8[tbl8_recycle_index].next_hop, },
 			.valid = VALID,
 			.valid_group = 0,
 			.depth = lpm->tbl8[tbl8_recycle_index].depth,
+#else
+			.depth = lpm->tbl8[tbl8_recycle_index].depth,
+			.valid_group = 0,
+			.valid = VALID,
+			{ .next_hop = lpm->tbl8[tbl8_recycle_index].next_hop, },
+#endif
 		};
 
 		/* Set tbl24 before freeing tbl8 to avoid race condition. */
-- 
2.7.4

Re: [PATCH v2 2/5] lpm: fix compilation on ARM BE

[Bruce Richardson]

On Wed, Dec 13, 2017 at 06:22:55PM +0530, Hemant Agrawal wrote:
> Compiling on ARM BE using Linaro toolchain caused following
> error/warnings.
> 
> rte_lpm.c: In function ‘add_depth_big_v20’:
> rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
>     { .group_idx = (uint8_t)tbl8_group_index, },
>     ^
> rte_lpm.c:911:4: note: (near initialization for
> 	‘new_tbl24_entry.depth’)
> rte_lpm.c:911:6:error: field name not in record or union initializer
>     { .group_idx = (uint8_t)tbl8_group_index, },
>       ^
> rte_lpm.c:911:6: note: (near initialization for
> 	‘new_tbl24_entry.depth’)
> rte_lpm.c:914:13: error: initialized field overwritten
> 	[-Werror=override-init]
>     .depth = 0,
> 
> Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
> Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jun Yang <jun.yang@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
> v2: added endianess check in the assignments
> 
>  lib/librte_lpm/rte_lpm.c | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c
> index e1f1fad..a47c04f 100644
> --- a/lib/librte_lpm/rte_lpm.c
> +++ b/lib/librte_lpm/rte_lpm.c
> @@ -912,10 +912,17 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
>  		 */
>  
>  		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
>  			{ .group_idx = (uint8_t)tbl8_group_index, },
>  			.valid = VALID,
>  			.valid_group = 1,
>  			.depth = 0,
> +#else
> +			.depth = 0,
> +			.valid_group = 1,
> +			.valid = VALID,
> +			{ .group_idx = (uint8_t)tbl8_group_index, },
> +#endif
>  		};
>  
I'm not I'd agree with this as a "better" fix. Were the issues with the
previous version of just removing the braces. All the ifdefs are rather
ugly.

Re: [PATCH v2 2/5] lpm: fix compilation on ARM BE

[Hemant Agrawal]

On 12/13/2017 6:52 PM, Bruce Richardson wrote:
> On Wed, Dec 13, 2017 at 06:22:55PM +0530, Hemant Agrawal wrote:
>> Compiling on ARM BE using Linaro toolchain caused following
>> error/warnings.
>>
>> rte_lpm.c: In function ‘add_depth_big_v20’:
>> rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
>>     { .group_idx = (uint8_t)tbl8_group_index, },
>>     ^
>> rte_lpm.c:911:4: note: (near initialization for
>> 	‘new_tbl24_entry.depth’)
>> rte_lpm.c:911:6:error: field name not in record or union initializer
>>     { .group_idx = (uint8_t)tbl8_group_index, },
>>       ^
>> rte_lpm.c:911:6: note: (near initialization for
>> 	‘new_tbl24_entry.depth’)
>> rte_lpm.c:914:13: error: initialized field overwritten
>> 	[-Werror=override-init]
>>     .depth = 0,
>>
>> Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
>> Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: Jun Yang <jun.yang@nxp.com>
>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
>> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
>> ---
>> v2: added endianess check in the assignments
>>
>>  lib/librte_lpm/rte_lpm.c | 29 +++++++++++++++++++++++++++++
>>  1 file changed, 29 insertions(+)
>>
>> diff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c
>> index e1f1fad..a47c04f 100644
>> --- a/lib/librte_lpm/rte_lpm.c
>> +++ b/lib/librte_lpm/rte_lpm.c
>> @@ -912,10 +912,17 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
>>  		 */
>>
>>  		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
>> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
>>  			{ .group_idx = (uint8_t)tbl8_group_index, },
>>  			.valid = VALID,
>>  			.valid_group = 1,
>>  			.depth = 0,
>> +#else
>> +			.depth = 0,
>> +			.valid_group = 1,
>> +			.valid = VALID,
>> +			{ .group_idx = (uint8_t)tbl8_group_index, },
>> +#endif
>>  		};
>>
> I'm not I'd agree with this as a "better" fix. Were the issues with the
> previous version of just removing the braces. All the ifdefs are rather
> ugly.
>
Ok. I will revert.

[PATCH v2 3/5] bus/dpaa: fix compilation on ARM BE

[Hemant Agrawal]

Fix the following compilation error when compiling
with ARM BE compiler.

drivers/bus/dpaa/include/fsl_qman.h:1997:25:
error: statement with no effect [-Werror=unused-value]
 #define hw_sg_to_cpu(x) (x)

Fixes: c47ff048b99a ("bus/dpaa: add QMAN driver core routines")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/dpaa/include/fsl_qman.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index eedfd7e..72556dc 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1993,8 +1993,8 @@ static inline int qman_poll_fq_for_init(struct qman_fq *fq)
 }
 
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#define cpu_to_hw_sg(x) (x)
-#define hw_sg_to_cpu(x) (x)
+#define cpu_to_hw_sg(x)
+#define hw_sg_to_cpu(x)
 #else
 #define cpu_to_hw_sg(x)  __cpu_to_hw_sg(x)
 #define hw_sg_to_cpu(x)  __hw_sg_to_cpu(x)
-- 
2.7.4

[PATCH v2 4/5] net/i40e: fix compilation on ARM BE

[Hemant Agrawal]

This patch fixes the following error observed when
compiling with ARM BE compiler.

i40e_ethdev.c: In function ‘i40e_dev_tunnel_filter_set’:
i40e_ethdev.c:6988:5: error: lvalue required as unary ‘&’ operand
     &rte_cpu_to_le_32(ipv4_addr),

Fixes: edc845bd53ec ("app/testpmd: fix build on FreeBSD")
Cc: Marvin Liu <yong.liu@intel.com>
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 811cc9f..a92933c 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6951,7 +6951,7 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
 			uint8_t add)
 {
 	uint16_t ip_type;
-	uint32_t ipv4_addr;
+	uint32_t ipv4_addr, ipv4_addr_le;
 	uint8_t i, tun_type = 0;
 	/* internal varialbe to convert ipv6 byte order */
 	uint32_t convert_ipv6[4];
@@ -6984,8 +6984,9 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
 	if (tunnel_filter->ip_type == RTE_TUNNEL_IPTYPE_IPV4) {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4;
 		ipv4_addr = rte_be_to_cpu_32(tunnel_filter->ip_addr.ipv4_addr);
+		ipv4_addr_le = rte_cpu_to_le_32(ipv4_addr);
 		rte_memcpy(&pfilter->element.ipaddr.v4.data,
-				&rte_cpu_to_le_32(ipv4_addr),
+				&ipv4_addr_le,
 				sizeof(pfilter->element.ipaddr.v4.data));
 	} else {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6;
@@ -7302,7 +7303,7 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
 		      uint8_t add)
 {
 	uint16_t ip_type;
-	uint32_t ipv4_addr;
+	uint32_t ipv4_addr, ipv4_addr_le;
 	uint8_t i, tun_type = 0;
 	/* internal variable to convert ipv6 byte order */
 	uint32_t convert_ipv6[4];
@@ -7338,8 +7339,9 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
 	if (tunnel_filter->ip_type == I40E_TUNNEL_IPTYPE_IPV4) {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4;
 		ipv4_addr = rte_be_to_cpu_32(tunnel_filter->ip_addr.ipv4_addr);
+		ipv4_addr_le = rte_cpu_to_le_32(ipv4_addr);
 		rte_memcpy(&pfilter->element.ipaddr.v4.data,
-				&rte_cpu_to_le_32(ipv4_addr),
+				&ipv4_addr_le,
 				sizeof(pfilter->element.ipaddr.v4.data));
 	} else {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6;
-- 
2.7.4

[PATCH v2 5/5] net/ixgbe: fix compilation on ARM BE

[Hemant Agrawal]

fixes the following compilation error on compiling with ARM BE compiler

ixgbe_common.c: In function ‘ixgbe_host_interface_command’:
ixgbe_common.c:4610:22: error: passing argument 1 of
‘__builtin_bswap32’ makes integer from pointer without a cast
[-Werror=int-conversion]
   IXGBE_LE32_TO_CPUS(&buffer[bi]);
                      ^
Fixes: aa4fc14d2cee ("ixgbe: update base driver")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c
index 7f85713..5e6ad95 100644
--- a/drivers/net/ixgbe/base/ixgbe_common.c
+++ b/drivers/net/ixgbe/base/ixgbe_common.c
@@ -4607,7 +4607,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 	/* first pull in the header so we know the buffer length */
 	for (bi = 0; bi < dword_len; bi++) {
 		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
-		IXGBE_LE32_TO_CPUS(&buffer[bi]);
+		IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
 	}
 
 	/* If there is any thing in data position pull it in */
@@ -4627,7 +4627,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 	/* Pull in the rest of the buffer (bi is where we left off) */
 	for (; bi <= dword_len; bi++) {
 		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
-		IXGBE_LE32_TO_CPUS(&buffer[bi]);
+		IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
 	}
 
 rel_out:
-- 
2.7.4

[PATCH v3 1/5] pmdinfogen: fix cross compilation for ARM BE

[Hemant Agrawal]

Cross compiling DPDK for BE mode on ARM results into errors
"PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"

The original code assumes the sh_size to be 32 bit, while it can
be Elf32_Word or Elf64_Xword based on 32bit or 64 bit systems.

This patches replaces the sh_size conversion routines to use ADDR_SIZE

Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
Cc: Neil Horman <nhorman@tuxdriver.com>
Cc: stable@dpdk.org

Signed-off-by: Jun Yang <jun.yang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
---
 buildtools/pmdinfogen/pmdinfogen.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/buildtools/pmdinfogen/pmdinfogen.c b/buildtools/pmdinfogen/pmdinfogen.c
index 96ccbf3..b07dbcf 100644
--- a/buildtools/pmdinfogen/pmdinfogen.c
+++ b/buildtools/pmdinfogen/pmdinfogen.c
@@ -158,7 +158,8 @@ static int parse_elf(struct elf_info *info, const char *filename)
 		 * There are more than 64k sections,
 		 * read count from .sh_size.
 		 */
-		info->num_sections = TO_NATIVE(endian, 32, sechdrs[0].sh_size);
+		info->num_sections =
+			TO_NATIVE(endian, ADDR_SIZE, sechdrs[0].sh_size);
 	} else {
 		info->num_sections = hdr->e_shnum;
 	}
@@ -181,7 +182,7 @@ static int parse_elf(struct elf_info *info, const char *filename)
 		sechdrs[i].sh_offset    =
 			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_offset);
 		sechdrs[i].sh_size      =
-			TO_NATIVE(endian, 32, sechdrs[i].sh_size);
+			TO_NATIVE(endian, ADDR_SIZE, sechdrs[i].sh_size);
 		sechdrs[i].sh_link      =
 			TO_NATIVE(endian, 32, sechdrs[i].sh_link);
 		sechdrs[i].sh_info      =
-- 
2.7.4

[PATCH v3 2/5] lpm: fix compilation on ARM BE

[Hemant Agrawal]

Compiling on ARM BE using Linaro toolchain caused following
error/warnings.

rte_lpm.c: In function ‘add_depth_big_v20’:
rte_lpm.c:911:4: error: braces around scalar initializer [-Werror]
    { .group_idx = (uint8_t)tbl8_group_index, },
    ^
rte_lpm.c:911:4: note: (near initialization for
	‘new_tbl24_entry.depth’)
rte_lpm.c:911:6:error: field name not in record or union initializer
    { .group_idx = (uint8_t)tbl8_group_index, },
      ^
rte_lpm.c:911:6: note: (near initialization for
	‘new_tbl24_entry.depth’)
rte_lpm.c:914:13: error: initialized field overwritten
	[-Werror=override-init]
    .depth = 0,

Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field")
Cc: Michal Kobylinski <michalx.kobylinski@intel.com>
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
v3: reverting ifdef
v2: adding ifdef

 lib/librte_lpm/rte_lpm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c
index e1f1fad..dda74a9 100644
--- a/lib/librte_lpm/rte_lpm.c
+++ b/lib/librte_lpm/rte_lpm.c
@@ -912,7 +912,7 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-			{ .group_idx = (uint8_t)tbl8_group_index, },
+			.group_idx = (uint8_t)tbl8_group_index,
 			.valid = VALID,
 			.valid_group = 1,
 			.depth = 0,
@@ -958,7 +958,7 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked, uint8_t depth,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-				{ .group_idx = (uint8_t)tbl8_group_index, },
+				.group_idx = (uint8_t)tbl8_group_index,
 				.valid = VALID,
 				.valid_group = 1,
 				.depth = 0,
@@ -1365,7 +1365,7 @@ delete_depth_small_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked,
 		 */
 
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-			{.next_hop = lpm->rules_tbl[sub_rule_index].next_hop,},
+			.next_hop = lpm->rules_tbl[sub_rule_index].next_hop,
 			.valid = VALID,
 			.valid_group = 0,
 			.depth = sub_rule_depth,
@@ -1668,7 +1668,7 @@ delete_depth_big_v20(struct rte_lpm_v20 *lpm, uint32_t ip_masked,
 	} else if (tbl8_recycle_index > -1) {
 		/* Update tbl24 entry. */
 		struct rte_lpm_tbl_entry_v20 new_tbl24_entry = {
-			{ .next_hop = lpm->tbl8[tbl8_recycle_index].next_hop, },
+			.next_hop = lpm->tbl8[tbl8_recycle_index].next_hop,
 			.valid = VALID,
 			.valid_group = 0,
 			.depth = lpm->tbl8[tbl8_recycle_index].depth,
-- 
2.7.4

[PATCH v3 3/5] bus/dpaa: fix compilation on ARM BE

[Hemant Agrawal]

Fix the following compilation error when compiling
with ARM BE compiler.

drivers/bus/dpaa/include/fsl_qman.h:1997:25:
error: statement with no effect [-Werror=unused-value]
 #define hw_sg_to_cpu(x) (x)

Fixes: c47ff048b99a ("bus/dpaa: add QMAN driver core routines")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/dpaa/include/fsl_qman.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index eedfd7e..72556dc 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1993,8 +1993,8 @@ static inline int qman_poll_fq_for_init(struct qman_fq *fq)
 }
 
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#define cpu_to_hw_sg(x) (x)
-#define hw_sg_to_cpu(x) (x)
+#define cpu_to_hw_sg(x)
+#define hw_sg_to_cpu(x)
 #else
 #define cpu_to_hw_sg(x)  __cpu_to_hw_sg(x)
 #define hw_sg_to_cpu(x)  __hw_sg_to_cpu(x)
-- 
2.7.4

[PATCH v3 4/5] net/i40e: fix compilation on ARM BE

[Hemant Agrawal]

This patch fixes the following error observed when
compiling with ARM BE compiler.

i40e_ethdev.c: In function ‘i40e_dev_tunnel_filter_set’:
i40e_ethdev.c:6988:5: error: lvalue required as unary ‘&’ operand
     &rte_cpu_to_le_32(ipv4_addr),

Fixes: edc845bd53ec ("app/testpmd: fix build on FreeBSD")
Cc: Marvin Liu <yong.liu@intel.com>
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 811cc9f..a92933c 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6951,7 +6951,7 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
 			uint8_t add)
 {
 	uint16_t ip_type;
-	uint32_t ipv4_addr;
+	uint32_t ipv4_addr, ipv4_addr_le;
 	uint8_t i, tun_type = 0;
 	/* internal varialbe to convert ipv6 byte order */
 	uint32_t convert_ipv6[4];
@@ -6984,8 +6984,9 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
 	if (tunnel_filter->ip_type == RTE_TUNNEL_IPTYPE_IPV4) {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4;
 		ipv4_addr = rte_be_to_cpu_32(tunnel_filter->ip_addr.ipv4_addr);
+		ipv4_addr_le = rte_cpu_to_le_32(ipv4_addr);
 		rte_memcpy(&pfilter->element.ipaddr.v4.data,
-				&rte_cpu_to_le_32(ipv4_addr),
+				&ipv4_addr_le,
 				sizeof(pfilter->element.ipaddr.v4.data));
 	} else {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6;
@@ -7302,7 +7303,7 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
 		      uint8_t add)
 {
 	uint16_t ip_type;
-	uint32_t ipv4_addr;
+	uint32_t ipv4_addr, ipv4_addr_le;
 	uint8_t i, tun_type = 0;
 	/* internal variable to convert ipv6 byte order */
 	uint32_t convert_ipv6[4];
@@ -7338,8 +7339,9 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
 	if (tunnel_filter->ip_type == I40E_TUNNEL_IPTYPE_IPV4) {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV4;
 		ipv4_addr = rte_be_to_cpu_32(tunnel_filter->ip_addr.ipv4_addr);
+		ipv4_addr_le = rte_cpu_to_le_32(ipv4_addr);
 		rte_memcpy(&pfilter->element.ipaddr.v4.data,
-				&rte_cpu_to_le_32(ipv4_addr),
+				&ipv4_addr_le,
 				sizeof(pfilter->element.ipaddr.v4.data));
 	} else {
 		ip_type = I40E_AQC_ADD_CLOUD_FLAGS_IPV6;
-- 
2.7.4

[PATCH v3 5/5] net/ixgbe: fix compilation on ARM BE

[Hemant Agrawal]

fixes the following compilation error on compiling with ARM BE compiler

ixgbe_common.c: In function ‘ixgbe_host_interface_command’:
ixgbe_common.c:4610:22: error: passing argument 1 of
‘__builtin_bswap32’ makes integer from pointer without a cast
[-Werror=int-conversion]
   IXGBE_LE32_TO_CPUS(&buffer[bi]);
                      ^
Fixes: aa4fc14d2cee ("ixgbe: update base driver")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c
index 7f85713..5e6ad95 100644
--- a/drivers/net/ixgbe/base/ixgbe_common.c
+++ b/drivers/net/ixgbe/base/ixgbe_common.c
@@ -4607,7 +4607,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 	/* first pull in the header so we know the buffer length */
 	for (bi = 0; bi < dword_len; bi++) {
 		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
-		IXGBE_LE32_TO_CPUS(&buffer[bi]);
+		IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
 	}
 
 	/* If there is any thing in data position pull it in */
@@ -4627,7 +4627,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 	/* Pull in the rest of the buffer (bi is where we left off) */
 	for (; bi <= dword_len; bi++) {
 		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
-		IXGBE_LE32_TO_CPUS(&buffer[bi]);
+		IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]);
 	}
 
 rel_out:
-- 
2.7.4

Re: [dpdk-stable] [PATCH v3 1/5] pmdinfogen: fix cross compilation for ARM BE

[Thomas Monjalon]

18/12/2017 08:56, Hemant Agrawal:
> Cross compiling DPDK for BE mode on ARM results into errors
> "PMDINFO portal/dpaa2_hw_dpio.o.pmd.c No drivers registered"
> 
> The original code assumes the sh_size to be 32 bit, while it can
> be Elf32_Word or Elf64_Xword based on 32bit or 64 bit systems.
> 
> This patches replaces the sh_size conversion routines to use ADDR_SIZE
> 
> Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
> Cc: Neil Horman <nhorman@tuxdriver.com>
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jun Yang <jun.yang@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> Acked-by: Neil Horman <nhorman@tuxdriver.com>

Series applied, thanks