[Ask for help] i.MX6 dual display

[Ask for help] i.MX6 dual display

[Sean Nyekjær]

Hi Philipp

I have an i.MX6Q running 4.9 LTS with etnaviv.
We would like to have both the HDMI and LVDS outputs enabled a once.

If I enable hdmi and lvds in the devicetree, we have only output on the 
hdmi port.
[    0.000000] Linux version 4.9.34 (oe-user@oe-host) (gcc version 6.3.0 
(GCC) ) #1 SMP PREEMPT Fri Dec 15 06:29:20 UTC 2017*
*[...]
[    0.515898] [drm] Initialized
[    0.518928] panel supply power not found, using dummy regulator
[    0.521554] etnaviv gpu-subsystem: bound 134000.gpu (ops 0xc084122c)
[    0.521594] etnaviv gpu-subsystem: bound 130000.gpu (ops 0xc084122c)
[    0.521624] etnaviv gpu-subsystem: bound 2204000.gpu (ops 0xc084122c)
[    0.521639] etnaviv-gpu 134000.gpu: model: GC320, revision: 5007
[    0.570553] etnaviv-gpu 130000.gpu: model: GC2000, revision: 5108
[    0.622405] etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215
[    0.622427] etnaviv-gpu 2204000.gpu: Ignoring GPU with VG and FE2.0
[    0.624865] imx-ipuv3 2400000.ipu: IPUv3H probed
[    0.626139] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    0.626146] [drm] No driver support for vblank timestamp query.
[    0.626300] imx-drm display-subsystem: bound imx-ipuv3-crtc.2 (ops 
0xc083b0e4)
[    0.626436] imx-drm display-subsystem: bound imx-ipuv3-crtc.3 (ops 
0xc083b0e4)
[    0.626574] imx-drm display-subsystem: bound imx-ipuv3-crtc.6 (ops 
0xc083b0e4)
[    0.626696] imx-drm display-subsystem: bound imx-ipuv3-crtc.7 (ops 
0xc083b0e4)
[    0.626945] dwhdmi-imx 120000.hdmi: Detected HDMI controller 
0x13:0xa:0xa0:0xc1
[    0.627404] imx-drm display-subsystem: bound 120000.hdmi (ops 0xc083b238)
[    0.627795] imx-drm display-subsystem: bound 
2000000.aips-bus:ldb@020e0008 (ops 0xc083adcc)
[    0.648754] random: fast init done
[    0.671003] imx-drm display-subsystem: fb0:  frame buffer device
[    0.708643] imx-ipuv3 2800000.ipu: IPUv3H probed

With forcing the LVDS on(still only picture on the HDMI):
[    0.000000] Kernel command line: console=ttymxc0,115200n8 
root=/dev/mmcblk1p1 rootfstype=ext4 rootwait quiet video=LVDS-1:e 
rauc.slot=A
[...]
[    0.523322] [drm] Initialized
[    0.526267] panel supply power not found, using dummy regulator
[    0.528889] etnaviv gpu-subsystem: bound 134000.gpu (ops 0xc084122c)
[    0.528925] etnaviv gpu-subsystem: bound 130000.gpu (ops 0xc084122c)
[    0.528970] etnaviv gpu-subsystem: bound 2204000.gpu (ops 0xc084122c)
[    0.528989] etnaviv-gpu 134000.gpu: model: GC320, revision: 5007
[    0.579268] etnaviv-gpu 130000.gpu: model: GC2000, revision: 5108
[    0.630262] etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215
[    0.630278] etnaviv-gpu 2204000.gpu: Ignoring GPU with VG and FE2.0
[    0.632512] imx-ipuv3 2400000.ipu: IPUv3H probed
[    0.633745] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    0.633753] [drm] No driver support for vblank timestamp query.
[    0.633910] imx-drm display-subsystem: bound imx-ipuv3-crtc.2 (ops 
0xc083b0e4)
[    0.634034] imx-drm display-subsystem: bound imx-ipuv3-crtc.3 (ops 
0xc083b0e4)
[    0.634169] imx-drm display-subsystem: bound imx-ipuv3-crtc.6 (ops 
0xc083b0e4)
[    0.634287] imx-drm display-subsystem: bound imx-ipuv3-crtc.7 (ops 
0xc083b0e4)
[    0.634522] dwhdmi-imx 120000.hdmi: Detected HDMI controller 
0x13:0xa:0xa0:0xc1
[    0.634981] imx-drm display-subsystem: bound 120000.hdmi (ops 0xc083b238)
[    0.635357] [drm] forcing LVDS-1 connector ON
[    0.635377] imx-drm display-subsystem: bound 
2000000.aips-bus:ldb@020e0008 (ops 0xc083adcc)
[    0.655807] random: fast init done
[    0.677586] imx-drm display-subsystem: fb0:  frame buffer device
[    0.717927] imx-ipuv3 2800000.ipu: IPUv3H probed

With forcing HDMI off, and LVDS on(Now we have picture on LVDS):
[    0.513932] [drm] Initialized
[    0.516913] panel supply power not found, using dummy regulator
[    0.519624] etnaviv gpu-subsystem: bound 134000.gpu (ops 0xc084122c)
[    0.519663] etnaviv gpu-subsystem: bound 130000.gpu (ops 0xc084122c)
[    0.519704] etnaviv gpu-subsystem: bound 2204000.gpu (ops 0xc084122c)
[    0.519722] etnaviv-gpu 134000.gpu: model: GC320, revision: 5007
[    0.569959] etnaviv-gpu 130000.gpu: model: GC2000, revision: 5108
[    0.620607] etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215
[    0.620626] etnaviv-gpu 2204000.gpu: Ignoring GPU with VG and FE2.0
[    0.622916] imx-ipuv3 2400000.ipu: IPUv3H probed
[    0.624175] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    0.624184] [drm] No driver support for vblank timestamp query.
[    0.624338] imx-drm display-subsystem: bound imx-ipuv3-crtc.2 (ops 
0xc083b0e4)
[    0.624461] imx-drm display-subsystem: bound imx-ipuv3-crtc.3 (ops 
0xc083b0e4)
[    0.624599] imx-drm display-subsystem: bound imx-ipuv3-crtc.6 (ops 
0xc083b0e4)
[    0.624714] imx-drm display-subsystem: bound imx-ipuv3-crtc.7 (ops 
0xc083b0e4)
[    0.624954] dwhdmi-imx 120000.hdmi: Detected HDMI controller 
0x13:0xa:0xa0:0xc1
[    0.625248] [drm] forcing HDMI-A-1 connector OFF
[    0.625449] imx-drm display-subsystem: bound 120000.hdmi (ops 0xc083b238)
[    0.625822] [drm] forcing LVDS-1 connector ON
[    0.625843] imx-drm display-subsystem: bound 
2000000.aips-bus:ldb@020e0008 (ops 0xc083adcc)
[    0.635015] imx-drm display-subsystem: fb0:  frame buffer device
[    0.678157] imx-ipuv3 2800000.ipu: IPUv3H probed

So basically I have 2 questions:
Is it possible to have both LVDS and HDMI enabled at once from the same ipu?
Can i move the HDMI output to the other ipu and how?

Best regards
Sean Nyekjaer
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Re: [Ask for help] i.MX6 dual display

[Philipp Zabel]

Hi Sean,

On Mon, 2017-12-18 at 09:10 +0100, Sean Nyekjær wrote:
> Hi Philipp
> 
> I have an i.MX6Q running 4.9 LTS with etnaviv.
> We would like to have both the HDMI and LVDS outputs enabled a once.
> 
> If I enable hdmi and lvds in the devicetree, we have only output on the 
> hdmi port.

Probably both LVDS and HDMI are clocked from the video PLL (PLL5). It is
rather unlikely to have a combination of LVDS Display and HDMI mode that
can be driven from the same PLL frequency, as the LVDS serializer input
clock is 3.5 times or 7 times the LVDS pixel clock.
You can check the clock tree in /sys/kernel/debug/clk/clk_summary.

If you want to support connecting arbitrary monitors at all, you'll have
to move the LDB clock input to another PLL that can be set to the LVDS
serializer clock rate without disturbing other peripherals.
Due to a bug in the i.MX6Q LDB clock dividers, this has to be done once,
early during boot, using the assigned-clocks/assigned-clock-parents
device tree properties of the &clks node. To find example device trees,
see:

  git grep -A3 assigned-clocks.*LDB_DI0_SEL arch/arm/boot/dts

[...]
> So basically I have 2 questions:
> Is it possible to have both LVDS and HDMI enabled at once from the same ipu?

Yes, if the resolution isn't too high. The IPU pixel clock / bandwidth
limitations depend on whether both DIs are active.
Also only one of the displays will have overlay plane support, if that
is relevant to you, since there's only one DP that can do composition in
each IPU.

> Can i move the HDMI output to the other ipu and how?

Yes, see arch/arm/boot/dts/imx6q-utilite-pro.dts for an example: After
severing the OF graph links between the IPU1 DIs and the HDMI encoder
in the device tree, the HDMI output can only be driven by IPU2:

  /delete-node/&ipu1_di0_hdmi;
  /delete-node/&hdmi_mux_0;
  /delete-node/&ipu1_di1_hdmi;
  /delete-node/&hdmi_mux_1;

regards
Philipp
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Re: [Ask for help] i.MX6 dual display

[Sean Nyekjær]

Hi Philipp
>
>> I have an i.MX6Q running 4.9 LTS with etnaviv.
>> We would like to have both the HDMI and LVDS outputs enabled a once.
>>
>> If I enable hdmi and lvds in the devicetree, we have only output on the
>> hdmi port.
> Probably both LVDS and HDMI are clocked from the video PLL (PLL5). It is
> rather unlikely to have a combination of LVDS Display and HDMI mode that
> can be driven from the same PLL frequency, as the LVDS serializer input
> clock is 3.5 times or 7 times the LVDS pixel clock.
> You can check the clock tree in /sys/kernel/debug/clk/clk_summary.
>
> If you want to support connecting arbitrary monitors at all, you'll have
> to move the LDB clock input to another PLL that can be set to the LVDS
> serializer clock rate without disturbing other peripherals.
> Due to a bug in the i.MX6Q LDB clock dividers, this has to be done once,
> early during boot, using the assigned-clocks/assigned-clock-parents
> device tree properties of the &clks node. To find example device trees,
> see:
>
>    git grep -A3 assigned-clocks.*LDB_DI0_SEL arch/arm/boot/dts
>
I have this in my devicetree:
&clks {
      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
             <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
     assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
             <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
That should be enough?
>> So basically I have 2 questions:
>> Is it possible to have both LVDS and HDMI enabled at once from the same ipu?
> Yes, if the resolution isn't too high. The IPU pixel clock / bandwidth
> limitations depend on whether both DIs are active.
> Also only one of the displays will have overlay plane support, if that
> is relevant to you, since there's only one DP that can do composition in
> each IPU.
Any way to tell if the IPU pixel clock is too high?
My LVDS display:
static const struct drm_display_mode xin_sun_xf1011280800_mode = {
         .clock       = 71100,
         .hdisplay    = 1280,
         .hsync_start = 1280 + 40,
         .hsync_end   = 1280 + 40 + 80,
         .htotal      = 1280 + 40 + 80 + 40,
         .vdisplay    = 800,
         .vsync_start = 800 + 10,
         .vsync_end   = 800 + 10 + 10,
         .vtotal      = 800 + 10 + 10 + 3,
         .vrefresh    = 60,
         .flags       = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
}
HDMI would be fine in 720p mode.

>
>> Can i move the HDMI output to the other ipu and how?
> Yes, see arch/arm/boot/dts/imx6q-utilite-pro.dts for an example: After
> severing the OF graph links between the IPU1 DIs and the HDMI encoder
> in the device tree, the HDMI output can only be driven by IPU2:
>
>    /delete-node/&ipu1_di0_hdmi;
>    /delete-node/&hdmi_mux_0;
>    /delete-node/&ipu1_di1_hdmi;
>    /delete-node/&hdmi_mux_1;
Thanks if I add this I get LVDS output and a blank HDMI output.
I have only one fb device. It it possible to get a second one for IPU2?

My prefered option would be the HDMI and LVDS mirrored.

Thanks for your help :-)
/Sean

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Re: [Ask for help] i.MX6 dual display

[Sean Nyekjær]

Hi Philipp
>>> I have an i.MX6Q running 4.9 LTS with etnaviv.
>>> We would like to have both the HDMI and LVDS outputs enabled a once.
>>>
>>> If I enable hdmi and lvds in the devicetree, we have only output on the
>>> hdmi port.
>> Probably both LVDS and HDMI are clocked from the video PLL (PLL5). It is
>> rather unlikely to have a combination of LVDS Display and HDMI mode that
>> can be driven from the same PLL frequency, as the LVDS serializer input
>> clock is 3.5 times or 7 times the LVDS pixel clock.
>> You can check the clock tree in /sys/kernel/debug/clk/clk_summary.
>>
>> If you want to support connecting arbitrary monitors at all, you'll have
>> to move the LDB clock input to another PLL that can be set to the LVDS
>> serializer clock rate without disturbing other peripherals.
>> Due to a bug in the i.MX6Q LDB clock dividers, this has to be done once,
>> early during boot, using the assigned-clocks/assigned-clock-parents
>> device tree properties of the &clks node. To find example device trees,
>> see:
>>
>>    git grep -A3 assigned-clocks.*LDB_DI0_SEL arch/arm/boot/dts
>>
> I have this in my devicetree:
> &clks {
>      assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
>             <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
>     assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
>             <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> };
> That should be enough?
>>> So basically I have 2 questions:
>>> Is it possible to have both LVDS and HDMI enabled at once from the 
>>> same ipu?
>> Yes, if the resolution isn't too high. The IPU pixel clock / bandwidth
>> limitations depend on whether both DIs are active.
>> Also only one of the displays will have overlay plane support, if that
>> is relevant to you, since there's only one DP that can do composition in
>> each IPU.
> Any way to tell if the IPU pixel clock is too high?
> My LVDS display:
> static const struct drm_display_mode xin_sun_xf1011280800_mode = {
>         .clock       = 71100,
>         .hdisplay    = 1280,
>         .hsync_start = 1280 + 40,
>         .hsync_end   = 1280 + 40 + 80,
>         .htotal      = 1280 + 40 + 80 + 40,
>         .vdisplay    = 800,
>         .vsync_start = 800 + 10,
>         .vsync_end   = 800 + 10 + 10,
>         .vtotal      = 800 + 10 + 10 + 3,
>         .vrefresh    = 60,
>         .flags       = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
> }
> HDMI would be fine in 720p mode.
>
>>
>>> Can i move the HDMI output to the other ipu and how?
>> Yes, see arch/arm/boot/dts/imx6q-utilite-pro.dts for an example: After
>> severing the OF graph links between the IPU1 DIs and the HDMI encoder
>> in the device tree, the HDMI output can only be driven by IPU2:
>>
>>    /delete-node/&ipu1_di0_hdmi;
>>    /delete-node/&hdmi_mux_0;
>>    /delete-node/&ipu1_di1_hdmi;
>>    /delete-node/&hdmi_mux_1;
> Thanks if I add this I get LVDS output and a blank HDMI output.
> I have only one fb device. It it possible to get a second one for IPU2?
>
> My prefered option would be the HDMI and LVDS mirrored.
I finally managed to get HDMI and LVDS mirrored.
I added this to my devicetree:
/delete-node/&ipu2_di0_hdmi;
/delete-node/&hdmi_mux_2;
/delete-node/&ipu2_di1_hdmi;
/delete-node/&hdmi_mux_3;
/delete-node/&ipu1_di0_lvds0;
/delete-node/&ipu1_di0_lvds1;
/delete-node/&lvds0_mux_0;
/delete-node/&lvds1_mux_0;
/delete-node/&ipu1_di1_lvds0;
/delete-node/&ipu1_di1_lvds1;
/delete-node/&lvds0_mux_1;
/delete-node/&lvds1_mux_1;

Thanks for your help :-)
/Sean
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