[PATCH 0/8] Misc i915_drv.h cleanups

[PATCH 0/8] Misc i915_drv.h cleanups

[Michal Wajdeczko]

Our main header is huge. Lets try to make some cleanup.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Michal Wajdeczko (8):
  drm/i915: Move uint_fixed_16_16_t to i915_types.h
  drm/i915: Move some utility functions to i915_util.h
  drm/i915: Move display related definitions to dedicated header
  drm/i915: Move opregion definitions to dedicated intel_opregion.h
  drm/i915: Move intel_device_info definitions to its own header
  drm/i915: Update intel_device_info_runtime_init() parameter
  drm/i915: Add pretty printer for runtime part of intel_device_info
  drm/i915: Dump device info at once

 drivers/gpu/drm/i915/i915_drv.c          |  15 +-
 drivers/gpu/drm/i915/i915_drv.h          | 633 +------------------------------
 drivers/gpu/drm/i915/i915_types.h        | 168 ++++++++
 drivers/gpu/drm/i915/i915_utils.h        |  15 +
 drivers/gpu/drm/i915/intel_device_info.c |  55 ++-
 drivers/gpu/drm/i915/intel_device_info.h | 175 +++++++++
 drivers/gpu/drm/i915/intel_display.h     | 312 +++++++++++++++
 drivers/gpu/drm/i915/intel_opregion.c    |   2 +
 drivers/gpu/drm/i915/intel_opregion.h    |  99 +++++
 9 files changed, 817 insertions(+), 657 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_types.h
 create mode 100644 drivers/gpu/drm/i915/intel_device_info.h
 create mode 100644 drivers/gpu/drm/i915/intel_display.h
 create mode 100644 drivers/gpu/drm/i915/intel_opregion.h

-- 
1.9.1

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[PATCH 1/8] drm/i915: Move uint_fixed_16_16_t to i915_types.h

[Michal Wajdeczko]

Our uint_fixed_16_16_t definition and related helper functions
deserve dedicated header. While here cleanup types and indent.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   | 139 +------------------------------
 drivers/gpu/drm/i915/i915_types.h | 168 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 169 insertions(+), 138 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_types.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ca2a619..1e2217c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -55,6 +55,7 @@
 #include "i915_params.h"
 #include "i915_reg.h"
 #include "i915_utils.h"
+#include "i915_types.h"
 
 #include "intel_uncore.h"
 #include "intel_bios.h"
@@ -105,144 +106,6 @@
 #define i915_inject_load_failure() \
 	__i915_inject_load_failure(__func__, __LINE__)
 
-typedef struct {
-	uint32_t val;
-} uint_fixed_16_16_t;
-
-#define FP_16_16_MAX ({ \
-	uint_fixed_16_16_t fp; \
-	fp.val = UINT_MAX; \
-	fp; \
-})
-
-static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
-{
-	if (val.val == 0)
-		return true;
-	return false;
-}
-
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
-{
-	uint_fixed_16_16_t fp;
-
-	WARN_ON(val > U16_MAX);
-
-	fp.val = val << 16;
-	return fp;
-}
-
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
-{
-	return DIV_ROUND_UP(fp.val, 1 << 16);
-}
-
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
-{
-	return fp.val >> 16;
-}
-
-static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
-						 uint_fixed_16_16_t min2)
-{
-	uint_fixed_16_16_t min;
-
-	min.val = min(min1.val, min2.val);
-	return min;
-}
-
-static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
-						 uint_fixed_16_16_t max2)
-{
-	uint_fixed_16_16_t max;
-
-	max.val = max(max1.val, max2.val);
-	return max;
-}
-
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
-{
-	uint_fixed_16_16_t fp;
-	WARN_ON(val > U32_MAX);
-	fp.val = (uint32_t) val;
-	return fp;
-}
-
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
-					    uint_fixed_16_16_t d)
-{
-	return DIV_ROUND_UP(val.val, d.val);
-}
-
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
-						uint_fixed_16_16_t mul)
-{
-	uint64_t intermediate_val;
-
-	intermediate_val = (uint64_t) val * mul.val;
-	intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
-	WARN_ON(intermediate_val > U32_MAX);
-	return (uint32_t) intermediate_val;
-}
-
-static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
-					     uint_fixed_16_16_t mul)
-{
-	uint64_t intermediate_val;
-
-	intermediate_val = (uint64_t) val.val * mul.val;
-	intermediate_val = intermediate_val >> 16;
-	return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
-{
-	uint64_t interm_val;
-
-	interm_val = (uint64_t)val << 16;
-	interm_val = DIV_ROUND_UP_ULL(interm_val, d);
-	return clamp_u64_to_fixed16(interm_val);
-}
-
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
-						uint_fixed_16_16_t d)
-{
-	uint64_t interm_val;
-
-	interm_val = (uint64_t)val << 16;
-	interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
-	WARN_ON(interm_val > U32_MAX);
-	return (uint32_t) interm_val;
-}
-
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
-						     uint_fixed_16_16_t mul)
-{
-	uint64_t intermediate_val;
-
-	intermediate_val = (uint64_t) val * mul.val;
-	return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
-					     uint_fixed_16_16_t add2)
-{
-	uint64_t interm_sum;
-
-	interm_sum = (uint64_t) add1.val + add2.val;
-	return clamp_u64_to_fixed16(interm_sum);
-}
-
-static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
-						 uint32_t add2)
-{
-	uint64_t interm_sum;
-	uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
-
-	interm_sum = (uint64_t) add1.val + interm_add2.val;
-	return clamp_u64_to_fixed16(interm_sum);
-}
-
 static inline const char *yesno(bool v)
 {
 	return v ? "yes" : "no";
diff --git a/drivers/gpu/drm/i915/i915_types.h b/drivers/gpu/drm/i915/i915_types.h
new file mode 100644
index 0000000..f123c9d
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_types.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright © 2014-2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef _I915_TYPES_H_
+#define _I915_TYPES_H_
+
+#include <linux/kernel.h>
+
+typedef struct {
+	u32 val;
+} uint_fixed_16_16_t;
+
+#define FP_16_16_MAX ({ \
+	uint_fixed_16_16_t fp; \
+	fp.val = UINT_MAX; \
+	fp; \
+})
+
+static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
+{
+	if (val.val == 0)
+		return true;
+	return false;
+}
+
+static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
+{
+	uint_fixed_16_16_t fp;
+
+	WARN_ON(val > U16_MAX);
+
+	fp.val = val << 16;
+	return fp;
+}
+
+static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
+{
+	return DIV_ROUND_UP(fp.val, 1 << 16);
+}
+
+static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp)
+{
+	return fp.val >> 16;
+}
+
+static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
+					     uint_fixed_16_16_t min2)
+{
+	uint_fixed_16_16_t min;
+
+	min.val = min(min1.val, min2.val);
+	return min;
+}
+
+static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
+					     uint_fixed_16_16_t max2)
+{
+	uint_fixed_16_16_t max;
+
+	max.val = max(max1.val, max2.val);
+	return max;
+}
+
+static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
+{
+	uint_fixed_16_16_t fp;
+	WARN_ON(val > U32_MAX);
+	fp.val = (u32) val;
+	return fp;
+}
+
+static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val,
+				       uint_fixed_16_16_t d)
+{
+	return DIV_ROUND_UP(val.val, d.val);
+}
+
+static inline u32 mul_round_up_u32_fixed16(u32 val,
+					   uint_fixed_16_16_t mul)
+{
+	u64 intermediate_val;
+
+	intermediate_val = (u64) val * mul.val;
+	intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
+	WARN_ON(intermediate_val > U32_MAX);
+	return (u32) intermediate_val;
+}
+
+static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
+					     uint_fixed_16_16_t mul)
+{
+	u64 intermediate_val;
+
+	intermediate_val = (u64) val.val * mul.val;
+	intermediate_val = intermediate_val >> 16;
+	return clamp_u64_to_fixed16(intermediate_val);
+}
+
+static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d)
+{
+	u64 interm_val;
+
+	interm_val = (u64)val << 16;
+	interm_val = DIV_ROUND_UP_ULL(interm_val, d);
+	return clamp_u64_to_fixed16(interm_val);
+}
+
+static inline u32 div_round_up_u32_fixed16(u32 val,
+					   uint_fixed_16_16_t d)
+{
+	u64 interm_val;
+
+	interm_val = (u64)val << 16;
+	interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
+	WARN_ON(interm_val > U32_MAX);
+	return (u32) interm_val;
+}
+
+static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val,
+						 uint_fixed_16_16_t mul)
+{
+	u64 intermediate_val;
+
+	intermediate_val = (u64) val * mul.val;
+	return clamp_u64_to_fixed16(intermediate_val);
+}
+
+static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
+					     uint_fixed_16_16_t add2)
+{
+	u64 interm_sum;
+
+	interm_sum = (u64) add1.val + add2.val;
+	return clamp_u64_to_fixed16(interm_sum);
+}
+
+static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
+						 u32 add2)
+{
+	u64 interm_sum;
+	uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
+
+	interm_sum = (u64) add1.val + interm_add2.val;
+	return clamp_u64_to_fixed16(interm_sum);
+}
+
+#endif
-- 
1.9.1

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[PATCH 2/8] drm/i915: Move some utility functions to i915_util.h

[Michal Wajdeczko]

We have dedicated header file for utility functions and macros.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   | 15 ---------------
 drivers/gpu/drm/i915/i915_utils.h | 15 +++++++++++++++
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1e2217c..8cbaadf 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -106,21 +106,6 @@
 #define i915_inject_load_failure() \
 	__i915_inject_load_failure(__func__, __LINE__)
 
-static inline const char *yesno(bool v)
-{
-	return v ? "yes" : "no";
-}
-
-static inline const char *onoff(bool v)
-{
-	return v ? "on" : "off";
-}
-
-static inline const char *enableddisabled(bool v)
-{
-	return v ? "enabled" : "disabled";
-}
-
 enum pipe {
 	INVALID_PIPE = -1,
 	PIPE_A = 0,
diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
index 8d07764..51dbfe5 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -140,4 +140,19 @@ static inline void drain_delayed_work(struct delayed_work *dw)
 	} while (delayed_work_pending(dw));
 }
 
+static inline const char *yesno(bool v)
+{
+	return v ? "yes" : "no";
+}
+
+static inline const char *onoff(bool v)
+{
+	return v ? "on" : "off";
+}
+
+static inline const char *enableddisabled(bool v)
+{
+	return v ? "enabled" : "disabled";
+}
+
 #endif /* !__I915_UTILS_H */
-- 
1.9.1

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[PATCH 3/8] drm/i915: Move display related definitions to dedicated header

[Michal Wajdeczko]

We already have separate files for display related code, there
is no reason to keep all display definitions in master header.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      | 283 +------------------------------
 drivers/gpu/drm/i915/intel_display.h | 312 +++++++++++++++++++++++++++++++++++
 2 files changed, 313 insertions(+), 282 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_display.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8cbaadf..e8ea21c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -63,6 +63,7 @@
 #include "intel_uc.h"
 #include "intel_lrc.h"
 #include "intel_ringbuffer.h"
+#include "intel_display.h"
 
 #include "i915_gem.h"
 #include "i915_gem_context.h"
@@ -106,159 +107,6 @@
 #define i915_inject_load_failure() \
 	__i915_inject_load_failure(__func__, __LINE__)
 
-enum pipe {
-	INVALID_PIPE = -1,
-	PIPE_A = 0,
-	PIPE_B,
-	PIPE_C,
-	_PIPE_EDP,
-	I915_MAX_PIPES = _PIPE_EDP
-};
-#define pipe_name(p) ((p) + 'A')
-
-enum transcoder {
-	TRANSCODER_A = 0,
-	TRANSCODER_B,
-	TRANSCODER_C,
-	TRANSCODER_EDP,
-	TRANSCODER_DSI_A,
-	TRANSCODER_DSI_C,
-	I915_MAX_TRANSCODERS
-};
-
-static inline const char *transcoder_name(enum transcoder transcoder)
-{
-	switch (transcoder) {
-	case TRANSCODER_A:
-		return "A";
-	case TRANSCODER_B:
-		return "B";
-	case TRANSCODER_C:
-		return "C";
-	case TRANSCODER_EDP:
-		return "EDP";
-	case TRANSCODER_DSI_A:
-		return "DSI A";
-	case TRANSCODER_DSI_C:
-		return "DSI C";
-	default:
-		return "<invalid>";
-	}
-}
-
-static inline bool transcoder_is_dsi(enum transcoder transcoder)
-{
-	return transcoder == TRANSCODER_DSI_A || transcoder == TRANSCODER_DSI_C;
-}
-
-/*
- * Global legacy plane identifier. Valid only for primary/sprite
- * planes on pre-g4x, and only for primary planes on g4x-bdw.
- */
-enum i9xx_plane_id {
-	PLANE_A,
-	PLANE_B,
-	PLANE_C,
-};
-#define plane_name(p) ((p) + 'A')
-
-#define sprite_name(p, s) ((p) * INTEL_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
-
-/*
- * Per-pipe plane identifier.
- * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
- * number of planes per CRTC.  Not all platforms really have this many planes,
- * which means some arrays of size I915_MAX_PLANES may have unused entries
- * between the topmost sprite plane and the cursor plane.
- *
- * This is expected to be passed to various register macros
- * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
- */
-enum plane_id {
-	PLANE_PRIMARY,
-	PLANE_SPRITE0,
-	PLANE_SPRITE1,
-	PLANE_SPRITE2,
-	PLANE_CURSOR,
-	I915_MAX_PLANES,
-};
-
-#define for_each_plane_id_on_crtc(__crtc, __p) \
-	for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
-		for_each_if ((__crtc)->plane_ids_mask & BIT(__p))
-
-enum port {
-	PORT_NONE = -1,
-	PORT_A = 0,
-	PORT_B,
-	PORT_C,
-	PORT_D,
-	PORT_E,
-	I915_MAX_PORTS
-};
-#define port_name(p) ((p) + 'A')
-
-#define I915_NUM_PHYS_VLV 2
-
-enum dpio_channel {
-	DPIO_CH0,
-	DPIO_CH1
-};
-
-enum dpio_phy {
-	DPIO_PHY0,
-	DPIO_PHY1,
-	DPIO_PHY2,
-};
-
-enum intel_display_power_domain {
-	POWER_DOMAIN_PIPE_A,
-	POWER_DOMAIN_PIPE_B,
-	POWER_DOMAIN_PIPE_C,
-	POWER_DOMAIN_PIPE_A_PANEL_FITTER,
-	POWER_DOMAIN_PIPE_B_PANEL_FITTER,
-	POWER_DOMAIN_PIPE_C_PANEL_FITTER,
-	POWER_DOMAIN_TRANSCODER_A,
-	POWER_DOMAIN_TRANSCODER_B,
-	POWER_DOMAIN_TRANSCODER_C,
-	POWER_DOMAIN_TRANSCODER_EDP,
-	POWER_DOMAIN_TRANSCODER_DSI_A,
-	POWER_DOMAIN_TRANSCODER_DSI_C,
-	POWER_DOMAIN_PORT_DDI_A_LANES,
-	POWER_DOMAIN_PORT_DDI_B_LANES,
-	POWER_DOMAIN_PORT_DDI_C_LANES,
-	POWER_DOMAIN_PORT_DDI_D_LANES,
-	POWER_DOMAIN_PORT_DDI_E_LANES,
-	POWER_DOMAIN_PORT_DDI_A_IO,
-	POWER_DOMAIN_PORT_DDI_B_IO,
-	POWER_DOMAIN_PORT_DDI_C_IO,
-	POWER_DOMAIN_PORT_DDI_D_IO,
-	POWER_DOMAIN_PORT_DDI_E_IO,
-	POWER_DOMAIN_PORT_DSI,
-	POWER_DOMAIN_PORT_CRT,
-	POWER_DOMAIN_PORT_OTHER,
-	POWER_DOMAIN_VGA,
-	POWER_DOMAIN_AUDIO,
-	POWER_DOMAIN_PLLS,
-	POWER_DOMAIN_AUX_A,
-	POWER_DOMAIN_AUX_B,
-	POWER_DOMAIN_AUX_C,
-	POWER_DOMAIN_AUX_D,
-	POWER_DOMAIN_GMBUS,
-	POWER_DOMAIN_MODESET,
-	POWER_DOMAIN_GT_IRQ,
-	POWER_DOMAIN_INIT,
-
-	POWER_DOMAIN_NUM,
-};
-
-#define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
-#define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \
-		((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER)
-#define POWER_DOMAIN_TRANSCODER(tran) \
-	((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \
-	 (tran) + POWER_DOMAIN_TRANSCODER_A)
-
 enum hpd_pin {
 	HPD_NONE = 0,
 	HPD_TV = HPD_NONE,     /* TV is known to be unreliable */
@@ -320,121 +168,6 @@ struct i915_hotplug {
 	 I915_GEM_DOMAIN_INSTRUCTION | \
 	 I915_GEM_DOMAIN_VERTEX)
 
-#define for_each_pipe(__dev_priv, __p) \
-	for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++)
-#define for_each_pipe_masked(__dev_priv, __p, __mask) \
-	for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++) \
-		for_each_if ((__mask) & (1 << (__p)))
-#define for_each_universal_plane(__dev_priv, __pipe, __p)		\
-	for ((__p) = 0;							\
-	     (__p) < INTEL_INFO(__dev_priv)->num_sprites[(__pipe)] + 1;	\
-	     (__p)++)
-#define for_each_sprite(__dev_priv, __p, __s)				\
-	for ((__s) = 0;							\
-	     (__s) < INTEL_INFO(__dev_priv)->num_sprites[(__p)];	\
-	     (__s)++)
-
-#define for_each_port_masked(__port, __ports_mask) \
-	for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++)	\
-		for_each_if ((__ports_mask) & (1 << (__port)))
-
-#define for_each_crtc(dev, crtc) \
-	list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
-
-#define for_each_intel_plane(dev, intel_plane) \
-	list_for_each_entry(intel_plane,			\
-			    &(dev)->mode_config.plane_list,	\
-			    base.head)
-
-#define for_each_intel_plane_mask(dev, intel_plane, plane_mask)		\
-	list_for_each_entry(intel_plane,				\
-			    &(dev)->mode_config.plane_list,		\
-			    base.head)					\
-		for_each_if ((plane_mask) &				\
-			     (1 << drm_plane_index(&intel_plane->base)))
-
-#define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane)	\
-	list_for_each_entry(intel_plane,				\
-			    &(dev)->mode_config.plane_list,		\
-			    base.head)					\
-		for_each_if ((intel_plane)->pipe == (intel_crtc)->pipe)
-
-#define for_each_intel_crtc(dev, intel_crtc)				\
-	list_for_each_entry(intel_crtc,					\
-			    &(dev)->mode_config.crtc_list,		\
-			    base.head)
-
-#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask)		\
-	list_for_each_entry(intel_crtc,					\
-			    &(dev)->mode_config.crtc_list,		\
-			    base.head)					\
-		for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base)))
-
-#define for_each_intel_encoder(dev, intel_encoder)		\
-	list_for_each_entry(intel_encoder,			\
-			    &(dev)->mode_config.encoder_list,	\
-			    base.head)
-
-#define for_each_intel_connector_iter(intel_connector, iter) \
-	while ((intel_connector = to_intel_connector(drm_connector_list_iter_next(iter))))
-
-#define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \
-	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
-		for_each_if ((intel_encoder)->base.crtc == (__crtc))
-
-#define for_each_connector_on_encoder(dev, __encoder, intel_connector) \
-	list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \
-		for_each_if ((intel_connector)->base.encoder == (__encoder))
-
-#define for_each_power_domain(domain, mask)				\
-	for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++)	\
-		for_each_if (BIT_ULL(domain) & (mask))
-
-#define for_each_power_well(__dev_priv, __power_well)				\
-	for ((__power_well) = (__dev_priv)->power_domains.power_wells;	\
-	     (__power_well) - (__dev_priv)->power_domains.power_wells <	\
-		(__dev_priv)->power_domains.power_well_count;		\
-	     (__power_well)++)
-
-#define for_each_power_well_rev(__dev_priv, __power_well)			\
-	for ((__power_well) = (__dev_priv)->power_domains.power_wells +		\
-			      (__dev_priv)->power_domains.power_well_count - 1;	\
-	     (__power_well) - (__dev_priv)->power_domains.power_wells >= 0;	\
-	     (__power_well)--)
-
-#define for_each_power_domain_well(__dev_priv, __power_well, __domain_mask)	\
-	for_each_power_well(__dev_priv, __power_well)				\
-		for_each_if ((__power_well)->domains & (__domain_mask))
-
-#define for_each_power_domain_well_rev(__dev_priv, __power_well, __domain_mask) \
-	for_each_power_well_rev(__dev_priv, __power_well)		        \
-		for_each_if ((__power_well)->domains & (__domain_mask))
-
-#define for_each_new_intel_plane_in_state(__state, plane, new_plane_state, __i) \
-	for ((__i) = 0; \
-	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
-		     ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
-		      (new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
-	     (__i)++) \
-		for_each_if (plane)
-
-#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
-	for ((__i) = 0; \
-	     (__i) < (__state)->base.dev->mode_config.num_crtc && \
-		     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
-		      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
-	     (__i)++) \
-		for_each_if (crtc)
-
-#define for_each_oldnew_intel_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \
-	for ((__i) = 0; \
-	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
-		     ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
-		      (old_plane_state) = to_intel_plane_state((__state)->base.planes[__i].old_state), \
-		      (new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
-	     (__i)++) \
-		for_each_if (plane)
-
 struct drm_i915_private;
 struct i915_mm_struct;
 struct i915_mmu_object;
@@ -471,20 +204,6 @@ struct drm_i915_file_private {
 	atomic_t context_bans;
 };
 
-/* Used by dp and fdi links */
-struct intel_link_m_n {
-	uint32_t	tu;
-	uint32_t	gmch_m;
-	uint32_t	gmch_n;
-	uint32_t	link_m;
-	uint32_t	link_n;
-};
-
-void intel_link_compute_m_n(int bpp, int nlanes,
-			    int pixel_clock, int link_clock,
-			    struct intel_link_m_n *m_n,
-			    bool reduce_m_n);
-
 /* Interface history:
  *
  * 1.1: Original.
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
new file mode 100644
index 0000000..7451523
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -0,0 +1,312 @@
+/*
+ * Copyright © 2006-2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef _INTEL_DISPLAY_H_
+#define _INTEL_DISPLAY_H_
+
+enum pipe {
+	INVALID_PIPE = -1,
+	PIPE_A = 0,
+	PIPE_B,
+	PIPE_C,
+	_PIPE_EDP,
+	I915_MAX_PIPES = _PIPE_EDP
+};
+#define pipe_name(p) ((p) + 'A')
+
+enum transcoder {
+	TRANSCODER_A = 0,
+	TRANSCODER_B,
+	TRANSCODER_C,
+	TRANSCODER_EDP,
+	TRANSCODER_DSI_A,
+	TRANSCODER_DSI_C,
+	I915_MAX_TRANSCODERS
+};
+
+static inline const char *transcoder_name(enum transcoder transcoder)
+{
+	switch (transcoder) {
+	case TRANSCODER_A:
+		return "A";
+	case TRANSCODER_B:
+		return "B";
+	case TRANSCODER_C:
+		return "C";
+	case TRANSCODER_EDP:
+		return "EDP";
+	case TRANSCODER_DSI_A:
+		return "DSI A";
+	case TRANSCODER_DSI_C:
+		return "DSI C";
+	default:
+		return "<invalid>";
+	}
+}
+
+static inline bool transcoder_is_dsi(enum transcoder transcoder)
+{
+	return transcoder == TRANSCODER_DSI_A || transcoder == TRANSCODER_DSI_C;
+}
+
+/*
+ * Global legacy plane identifier. Valid only for primary/sprite
+ * planes on pre-g4x, and only for primary planes on g4x-bdw.
+ */
+enum i9xx_plane_id {
+	PLANE_A,
+	PLANE_B,
+	PLANE_C,
+};
+#define plane_name(p) ((p) + 'A')
+
+#define sprite_name(p, s) ((p) * INTEL_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
+
+/*
+ * Per-pipe plane identifier.
+ * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
+ * number of planes per CRTC.  Not all platforms really have this many planes,
+ * which means some arrays of size I915_MAX_PLANES may have unused entries
+ * between the topmost sprite plane and the cursor plane.
+ *
+ * This is expected to be passed to various register macros
+ * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
+ */
+enum plane_id {
+	PLANE_PRIMARY,
+	PLANE_SPRITE0,
+	PLANE_SPRITE1,
+	PLANE_SPRITE2,
+	PLANE_CURSOR,
+	I915_MAX_PLANES,
+};
+
+#define for_each_plane_id_on_crtc(__crtc, __p) \
+	for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
+		for_each_if ((__crtc)->plane_ids_mask & BIT(__p))
+
+enum port {
+	PORT_NONE = -1,
+	PORT_A = 0,
+	PORT_B,
+	PORT_C,
+	PORT_D,
+	PORT_E,
+	I915_MAX_PORTS
+};
+#define port_name(p) ((p) + 'A')
+
+enum dpio_channel {
+	DPIO_CH0,
+	DPIO_CH1
+};
+
+enum dpio_phy {
+	DPIO_PHY0,
+	DPIO_PHY1,
+	DPIO_PHY2,
+};
+#define I915_NUM_PHYS_VLV 2
+
+enum intel_display_power_domain {
+	POWER_DOMAIN_PIPE_A,
+	POWER_DOMAIN_PIPE_B,
+	POWER_DOMAIN_PIPE_C,
+	POWER_DOMAIN_PIPE_A_PANEL_FITTER,
+	POWER_DOMAIN_PIPE_B_PANEL_FITTER,
+	POWER_DOMAIN_PIPE_C_PANEL_FITTER,
+	POWER_DOMAIN_TRANSCODER_A,
+	POWER_DOMAIN_TRANSCODER_B,
+	POWER_DOMAIN_TRANSCODER_C,
+	POWER_DOMAIN_TRANSCODER_EDP,
+	POWER_DOMAIN_TRANSCODER_DSI_A,
+	POWER_DOMAIN_TRANSCODER_DSI_C,
+	POWER_DOMAIN_PORT_DDI_A_LANES,
+	POWER_DOMAIN_PORT_DDI_B_LANES,
+	POWER_DOMAIN_PORT_DDI_C_LANES,
+	POWER_DOMAIN_PORT_DDI_D_LANES,
+	POWER_DOMAIN_PORT_DDI_E_LANES,
+	POWER_DOMAIN_PORT_DDI_A_IO,
+	POWER_DOMAIN_PORT_DDI_B_IO,
+	POWER_DOMAIN_PORT_DDI_C_IO,
+	POWER_DOMAIN_PORT_DDI_D_IO,
+	POWER_DOMAIN_PORT_DDI_E_IO,
+	POWER_DOMAIN_PORT_DSI,
+	POWER_DOMAIN_PORT_CRT,
+	POWER_DOMAIN_PORT_OTHER,
+	POWER_DOMAIN_VGA,
+	POWER_DOMAIN_AUDIO,
+	POWER_DOMAIN_PLLS,
+	POWER_DOMAIN_AUX_A,
+	POWER_DOMAIN_AUX_B,
+	POWER_DOMAIN_AUX_C,
+	POWER_DOMAIN_AUX_D,
+	POWER_DOMAIN_GMBUS,
+	POWER_DOMAIN_MODESET,
+	POWER_DOMAIN_GT_IRQ,
+	POWER_DOMAIN_INIT,
+
+	POWER_DOMAIN_NUM,
+};
+
+#define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
+#define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \
+		((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER)
+#define POWER_DOMAIN_TRANSCODER(tran) \
+	((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \
+	 (tran) + POWER_DOMAIN_TRANSCODER_A)
+
+/* Used by dp and fdi links */
+struct intel_link_m_n {
+	uint32_t	tu;
+	uint32_t	gmch_m;
+	uint32_t	gmch_n;
+	uint32_t	link_m;
+	uint32_t	link_n;
+};
+
+#define for_each_pipe(__dev_priv, __p) \
+	for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++)
+
+#define for_each_pipe_masked(__dev_priv, __p, __mask) \
+	for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++) \
+		for_each_if ((__mask) & (1 << (__p)))
+
+#define for_each_universal_plane(__dev_priv, __pipe, __p)		\
+	for ((__p) = 0;							\
+	     (__p) < INTEL_INFO(__dev_priv)->num_sprites[(__pipe)] + 1;	\
+	     (__p)++)
+
+#define for_each_sprite(__dev_priv, __p, __s)				\
+	for ((__s) = 0;							\
+	     (__s) < INTEL_INFO(__dev_priv)->num_sprites[(__p)];	\
+	     (__s)++)
+
+#define for_each_port_masked(__port, __ports_mask) \
+	for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++)	\
+		for_each_if ((__ports_mask) & (1 << (__port)))
+
+#define for_each_crtc(dev, crtc) \
+	list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
+
+#define for_each_intel_plane(dev, intel_plane) \
+	list_for_each_entry(intel_plane,			\
+			    &(dev)->mode_config.plane_list,	\
+			    base.head)
+
+#define for_each_intel_plane_mask(dev, intel_plane, plane_mask)		\
+	list_for_each_entry(intel_plane,				\
+			    &(dev)->mode_config.plane_list,		\
+			    base.head)					\
+		for_each_if ((plane_mask) &				\
+			     (1 << drm_plane_index(&intel_plane->base)))
+
+#define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane)	\
+	list_for_each_entry(intel_plane,				\
+			    &(dev)->mode_config.plane_list,		\
+			    base.head)					\
+		for_each_if ((intel_plane)->pipe == (intel_crtc)->pipe)
+
+#define for_each_intel_crtc(dev, intel_crtc)				\
+	list_for_each_entry(intel_crtc,					\
+			    &(dev)->mode_config.crtc_list,		\
+			    base.head)
+
+#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask)		\
+	list_for_each_entry(intel_crtc,					\
+			    &(dev)->mode_config.crtc_list,		\
+			    base.head)					\
+		for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base)))
+
+#define for_each_intel_encoder(dev, intel_encoder)		\
+	list_for_each_entry(intel_encoder,			\
+			    &(dev)->mode_config.encoder_list,	\
+			    base.head)
+
+#define for_each_intel_connector_iter(intel_connector, iter) \
+	while ((intel_connector = to_intel_connector(drm_connector_list_iter_next(iter))))
+
+#define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \
+	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
+		for_each_if ((intel_encoder)->base.crtc == (__crtc))
+
+#define for_each_connector_on_encoder(dev, __encoder, intel_connector) \
+	list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \
+		for_each_if ((intel_connector)->base.encoder == (__encoder))
+
+#define for_each_power_domain(domain, mask)				\
+	for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++)	\
+		for_each_if (BIT_ULL(domain) & (mask))
+
+#define for_each_power_well(__dev_priv, __power_well)				\
+	for ((__power_well) = (__dev_priv)->power_domains.power_wells;	\
+	     (__power_well) - (__dev_priv)->power_domains.power_wells <	\
+		(__dev_priv)->power_domains.power_well_count;		\
+	     (__power_well)++)
+
+#define for_each_power_well_rev(__dev_priv, __power_well)			\
+	for ((__power_well) = (__dev_priv)->power_domains.power_wells +		\
+			      (__dev_priv)->power_domains.power_well_count - 1;	\
+	     (__power_well) - (__dev_priv)->power_domains.power_wells >= 0;	\
+	     (__power_well)--)
+
+#define for_each_power_domain_well(__dev_priv, __power_well, __domain_mask)	\
+	for_each_power_well(__dev_priv, __power_well)				\
+		for_each_if ((__power_well)->domains & (__domain_mask))
+
+#define for_each_power_domain_well_rev(__dev_priv, __power_well, __domain_mask) \
+	for_each_power_well_rev(__dev_priv, __power_well)		        \
+		for_each_if ((__power_well)->domains & (__domain_mask))
+
+#define for_each_new_intel_plane_in_state(__state, plane, new_plane_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
+		     ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
+		      (new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
+	     (__i)++) \
+		for_each_if (plane)
+
+#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.dev->mode_config.num_crtc && \
+		     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+		      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)++) \
+		for_each_if (crtc)
+
+#define for_each_oldnew_intel_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
+		     ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
+		      (old_plane_state) = to_intel_plane_state((__state)->base.planes[__i].old_state), \
+		      (new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
+	     (__i)++) \
+		for_each_if (plane)
+
+void intel_link_compute_m_n(int bpp, int nlanes,
+			    int pixel_clock, int link_clock,
+			    struct intel_link_m_n *m_n,
+			    bool reduce_m_n);
+
+#endif
-- 
1.9.1

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Intel-gfx@lists.freedesktop.org
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[PATCH 4/8] drm/i915: Move opregion definitions to dedicated intel_opregion.h

[Michal Wajdeczko]

We already have dedicated file for opregion related code, dedicated
header will make our life easier.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       | 57 +-------------------
 drivers/gpu/drm/i915/intel_opregion.c |  2 +
 drivers/gpu/drm/i915/intel_opregion.h | 99 +++++++++++++++++++++++++++++++++++
 3 files changed, 102 insertions(+), 56 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_opregion.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e8ea21c..9f8a2b7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -57,6 +57,7 @@
 #include "i915_utils.h"
 #include "i915_types.h"
 
+#include "intel_opregion.h"
 #include "intel_uncore.h"
 #include "intel_bios.h"
 #include "intel_dpll_mgr.h"
@@ -218,27 +219,6 @@ struct drm_i915_file_private {
 #define DRIVER_MINOR		6
 #define DRIVER_PATCHLEVEL	0
 
-struct opregion_header;
-struct opregion_acpi;
-struct opregion_swsci;
-struct opregion_asle;
-
-struct intel_opregion {
-	struct opregion_header *header;
-	struct opregion_acpi *acpi;
-	struct opregion_swsci *swsci;
-	u32 swsci_gbda_sub_functions;
-	u32 swsci_sbcb_sub_functions;
-	struct opregion_asle *asle;
-	void *rvda;
-	void *vbt_firmware;
-	const void *vbt;
-	u32 vbt_size;
-	u32 *lid_state;
-	struct work_struct asle_work;
-};
-#define OPREGION_SIZE            (8*1024)
-
 struct intel_overlay;
 struct intel_overlay_error_state;
 
@@ -3679,41 +3659,6 @@ bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
 bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
 				enum port port);
 
-
-/* intel_opregion.c */
-#ifdef CONFIG_ACPI
-extern int intel_opregion_setup(struct drm_i915_private *dev_priv);
-extern void intel_opregion_register(struct drm_i915_private *dev_priv);
-extern void intel_opregion_unregister(struct drm_i915_private *dev_priv);
-extern void intel_opregion_asle_intr(struct drm_i915_private *dev_priv);
-extern int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
-					 bool enable);
-extern int intel_opregion_notify_adapter(struct drm_i915_private *dev_priv,
-					 pci_power_t state);
-extern int intel_opregion_get_panel_type(struct drm_i915_private *dev_priv);
-#else
-static inline int intel_opregion_setup(struct drm_i915_private *dev) { return 0; }
-static inline void intel_opregion_register(struct drm_i915_private *dev_priv) { }
-static inline void intel_opregion_unregister(struct drm_i915_private *dev_priv) { }
-static inline void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
-{
-}
-static inline int
-intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, bool enable)
-{
-	return 0;
-}
-static inline int
-intel_opregion_notify_adapter(struct drm_i915_private *dev, pci_power_t state)
-{
-	return 0;
-}
-static inline int intel_opregion_get_panel_type(struct drm_i915_private *dev)
-{
-	return -ENODEV;
-}
-#endif
-
 /* intel_acpi.c */
 #ifdef CONFIG_ACPI
 extern void intel_register_dsm_handler(void);
diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index fc65f5e..c58e5f5 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -32,6 +32,8 @@
 
 #include <drm/drmP.h>
 #include <drm/i915_drm.h>
+
+#include "intel_opregion.h"
 #include "i915_drv.h"
 #include "intel_drv.h"
 
diff --git a/drivers/gpu/drm/i915/intel_opregion.h b/drivers/gpu/drm/i915/intel_opregion.h
new file mode 100644
index 0000000..cf0b5c3
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_opregion.h
@@ -0,0 +1,99 @@
+/*
+ * Copyright © 2008-2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef _INTEL_OPREGION_H_
+#define _INTEL_OPREGION_H_
+
+#include <linux/workqueue.h>
+#include <linux/pci.h>
+
+struct drm_i915_private;
+struct intel_encoder;
+
+struct opregion_header;
+struct opregion_acpi;
+struct opregion_swsci;
+struct opregion_asle;
+
+struct intel_opregion {
+	struct opregion_header *header;
+	struct opregion_acpi *acpi;
+	struct opregion_swsci *swsci;
+	u32 swsci_gbda_sub_functions;
+	u32 swsci_sbcb_sub_functions;
+	struct opregion_asle *asle;
+	void *rvda;
+	void *vbt_firmware;
+	const void *vbt;
+	u32 vbt_size;
+	u32 *lid_state;
+	struct work_struct asle_work;
+};
+#define OPREGION_SIZE            (8*1024)
+
+#ifdef CONFIG_ACPI
+
+int intel_opregion_setup(struct drm_i915_private *dev_priv);
+void intel_opregion_register(struct drm_i915_private *dev_priv);
+void intel_opregion_unregister(struct drm_i915_private *dev_priv);
+void intel_opregion_asle_intr(struct drm_i915_private *dev_priv);
+int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
+				  bool enable);
+int intel_opregion_notify_adapter(struct drm_i915_private *dev_priv,
+				  pci_power_t state);
+extern int intel_opregion_get_panel_type(struct drm_i915_private *dev_priv);
+
+#else /* CONFIG_ACPI*/
+
+static inline int intel_opregion_setup(struct drm_i915_private *dev_priv)
+{
+	return 0;
+}
+static inline void intel_opregion_register(struct drm_i915_private *dev_priv)
+{
+}
+static inline void intel_opregion_unregister(struct drm_i915_private *dev_priv)
+{
+}
+static inline void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
+{
+}
+static inline int
+intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, bool enable)
+{
+	return 0;
+}
+static inline int
+intel_opregion_notify_adapter(struct drm_i915_private *dev, pci_power_t state)
+{
+	return 0;
+}
+static inline int intel_opregion_get_panel_type(struct drm_i915_private *dev)
+{
+	return -ENODEV;
+}
+
+#endif /* CONFIG_ACPI */
+
+#endif
-- 
1.9.1

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[PATCH 5/8] drm/i915: Move intel_device_info definitions to its own header

[Michal Wajdeczko]

We already keep intel_device_info functions in dedicated file.
Add matching header file and move related definitions there.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 139 +------------------------
 drivers/gpu/drm/i915/intel_device_info.c |   1 +
 drivers/gpu/drm/i915/intel_device_info.h | 173 +++++++++++++++++++++++++++++++
 3 files changed, 175 insertions(+), 138 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_device_info.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9f8a2b7..53d4b45 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -65,6 +65,7 @@
 #include "intel_lrc.h"
 #include "intel_ringbuffer.h"
 #include "intel_display.h"
+#include "intel_device_info.h"
 
 #include "i915_gem.h"
 #include "i915_gem_context.h"
@@ -311,137 +312,6 @@ struct intel_csr {
 	uint32_t allowed_dc_mask;
 };
 
-#define DEV_INFO_FOR_EACH_FLAG(func) \
-	func(is_mobile); \
-	func(is_lp); \
-	func(is_alpha_support); \
-	/* Keep has_* in alphabetical order */ \
-	func(has_64bit_reloc); \
-	func(has_aliasing_ppgtt); \
-	func(has_csr); \
-	func(has_ddi); \
-	func(has_dp_mst); \
-	func(has_reset_engine); \
-	func(has_fbc); \
-	func(has_fpga_dbg); \
-	func(has_full_ppgtt); \
-	func(has_full_48bit_ppgtt); \
-	func(has_gmch_display); \
-	func(has_guc); \
-	func(has_guc_ct); \
-	func(has_hotplug); \
-	func(has_l3_dpf); \
-	func(has_llc); \
-	func(has_logical_ring_contexts); \
-	func(has_logical_ring_preemption); \
-	func(has_overlay); \
-	func(has_pooled_eu); \
-	func(has_psr); \
-	func(has_rc6); \
-	func(has_rc6p); \
-	func(has_resource_streamer); \
-	func(has_runtime_pm); \
-	func(has_snoop); \
-	func(unfenced_needs_alignment); \
-	func(cursor_needs_physical); \
-	func(hws_needs_physical); \
-	func(overlay_needs_physical); \
-	func(supports_tv); \
-	func(has_ipc);
-
-struct sseu_dev_info {
-	u8 slice_mask;
-	u8 subslice_mask;
-	u8 eu_total;
-	u8 eu_per_subslice;
-	u8 min_eu_in_pool;
-	/* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
-	u8 subslice_7eu[3];
-	u8 has_slice_pg:1;
-	u8 has_subslice_pg:1;
-	u8 has_eu_pg:1;
-};
-
-static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
-{
-	return hweight8(sseu->slice_mask) * hweight8(sseu->subslice_mask);
-}
-
-/* Keep in gen based order, and chronological order within a gen */
-enum intel_platform {
-	INTEL_PLATFORM_UNINITIALIZED = 0,
-	INTEL_I830,
-	INTEL_I845G,
-	INTEL_I85X,
-	INTEL_I865G,
-	INTEL_I915G,
-	INTEL_I915GM,
-	INTEL_I945G,
-	INTEL_I945GM,
-	INTEL_G33,
-	INTEL_PINEVIEW,
-	INTEL_I965G,
-	INTEL_I965GM,
-	INTEL_G45,
-	INTEL_GM45,
-	INTEL_IRONLAKE,
-	INTEL_SANDYBRIDGE,
-	INTEL_IVYBRIDGE,
-	INTEL_VALLEYVIEW,
-	INTEL_HASWELL,
-	INTEL_BROADWELL,
-	INTEL_CHERRYVIEW,
-	INTEL_SKYLAKE,
-	INTEL_BROXTON,
-	INTEL_KABYLAKE,
-	INTEL_GEMINILAKE,
-	INTEL_COFFEELAKE,
-	INTEL_CANNONLAKE,
-	INTEL_MAX_PLATFORMS
-};
-
-struct intel_device_info {
-	u16 device_id;
-	u16 gen_mask;
-
-	u8 gen;
-	u8 gt; /* GT number, 0 if undefined */
-	u8 num_rings;
-	u8 ring_mask; /* Rings supported by the HW */
-
-	enum intel_platform platform;
-	u32 platform_mask;
-
-	u32 display_mmio_offset;
-
-	u8 num_pipes;
-	u8 num_sprites[I915_MAX_PIPES];
-	u8 num_scalers[I915_MAX_PIPES];
-
-	unsigned int page_sizes; /* page sizes supported by the HW */
-
-#define DEFINE_FLAG(name) u8 name:1
-	DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
-#undef DEFINE_FLAG
-	u16 ddb_size; /* in blocks */
-
-	/* Register offsets for the various display pipes and transcoders */
-	int pipe_offsets[I915_MAX_TRANSCODERS];
-	int trans_offsets[I915_MAX_TRANSCODERS];
-	int palette_offsets[I915_MAX_PIPES];
-	int cursor_offsets[I915_MAX_PIPES];
-
-	/* Slice/subslice/EU info */
-	struct sseu_dev_info sseu;
-
-	u32 cs_timestamp_frequency_khz;
-
-	struct color_luts {
-		u16 degamma_lut_size;
-		u16 gamma_lut_size;
-	} color;
-};
-
 struct intel_display_error_state;
 
 struct i915_gpu_state {
@@ -3675,13 +3545,6 @@ bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
 	return (struct intel_device_info *)&dev_priv->info;
 }
 
-const char *intel_platform_name(enum intel_platform platform);
-void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
-void intel_device_info_dump(const struct intel_device_info *info,
-			    struct drm_printer *p);
-void intel_device_info_dump_flags(const struct intel_device_info *info,
-				  struct drm_printer *p);
-
 /* modesetting */
 extern void intel_modeset_init_hw(struct drm_device *dev);
 extern int intel_modeset_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index be355cf..f205054 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -24,6 +24,7 @@
 
 #include <drm/drm_print.h>
 
+#include "intel_device_info.h"
 #include "i915_drv.h"
 
 #define PLATFORM_NAME(x) [INTEL_##x] = #x
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
new file mode 100644
index 0000000..a155ae2
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -0,0 +1,173 @@
+/*
+ * Copyright © 2014-2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef _INTEL_DEVICE_INFO_H_
+#define _INTEL_DEVICE_INFO_H_
+
+#include "intel_display.h"
+
+struct drm_printer;
+struct drm_i915_private;
+
+/* Keep in gen based order, and chronological order within a gen */
+enum intel_platform {
+	INTEL_PLATFORM_UNINITIALIZED = 0,
+	INTEL_I830,
+	INTEL_I845G,
+	INTEL_I85X,
+	INTEL_I865G,
+	INTEL_I915G,
+	INTEL_I915GM,
+	INTEL_I945G,
+	INTEL_I945GM,
+	INTEL_G33,
+	INTEL_PINEVIEW,
+	INTEL_I965G,
+	INTEL_I965GM,
+	INTEL_G45,
+	INTEL_GM45,
+	INTEL_IRONLAKE,
+	INTEL_SANDYBRIDGE,
+	INTEL_IVYBRIDGE,
+	INTEL_VALLEYVIEW,
+	INTEL_HASWELL,
+	INTEL_BROADWELL,
+	INTEL_CHERRYVIEW,
+	INTEL_SKYLAKE,
+	INTEL_BROXTON,
+	INTEL_KABYLAKE,
+	INTEL_GEMINILAKE,
+	INTEL_COFFEELAKE,
+	INTEL_CANNONLAKE,
+	INTEL_MAX_PLATFORMS
+};
+
+#define DEV_INFO_FOR_EACH_FLAG(func) \
+	func(is_mobile); \
+	func(is_lp); \
+	func(is_alpha_support); \
+	/* Keep has_* in alphabetical order */ \
+	func(has_64bit_reloc); \
+	func(has_aliasing_ppgtt); \
+	func(has_csr); \
+	func(has_ddi); \
+	func(has_dp_mst); \
+	func(has_reset_engine); \
+	func(has_fbc); \
+	func(has_fpga_dbg); \
+	func(has_full_ppgtt); \
+	func(has_full_48bit_ppgtt); \
+	func(has_gmch_display); \
+	func(has_guc); \
+	func(has_guc_ct); \
+	func(has_hotplug); \
+	func(has_l3_dpf); \
+	func(has_llc); \
+	func(has_logical_ring_contexts); \
+	func(has_logical_ring_preemption); \
+	func(has_overlay); \
+	func(has_pooled_eu); \
+	func(has_psr); \
+	func(has_rc6); \
+	func(has_rc6p); \
+	func(has_resource_streamer); \
+	func(has_runtime_pm); \
+	func(has_snoop); \
+	func(unfenced_needs_alignment); \
+	func(cursor_needs_physical); \
+	func(hws_needs_physical); \
+	func(overlay_needs_physical); \
+	func(supports_tv); \
+	func(has_ipc);
+
+struct sseu_dev_info {
+	u8 slice_mask;
+	u8 subslice_mask;
+	u8 eu_total;
+	u8 eu_per_subslice;
+	u8 min_eu_in_pool;
+	/* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
+	u8 subslice_7eu[3];
+	u8 has_slice_pg:1;
+	u8 has_subslice_pg:1;
+	u8 has_eu_pg:1;
+};
+
+struct intel_device_info {
+	u16 device_id;
+	u16 gen_mask;
+
+	u8 gen;
+	u8 gt; /* GT number, 0 if undefined */
+	u8 num_rings;
+	u8 ring_mask; /* Rings supported by the HW */
+
+	enum intel_platform platform;
+	u32 platform_mask;
+
+	u32 display_mmio_offset;
+
+	u8 num_pipes;
+	u8 num_sprites[I915_MAX_PIPES];
+	u8 num_scalers[I915_MAX_PIPES];
+
+	unsigned int page_sizes; /* page sizes supported by the HW */
+
+#define DEFINE_FLAG(name) u8 name:1
+	DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
+#undef DEFINE_FLAG
+	u16 ddb_size; /* in blocks */
+
+	/* Register offsets for the various display pipes and transcoders */
+	int pipe_offsets[I915_MAX_TRANSCODERS];
+	int trans_offsets[I915_MAX_TRANSCODERS];
+	int palette_offsets[I915_MAX_PIPES];
+	int cursor_offsets[I915_MAX_PIPES];
+
+	/* Slice/subslice/EU info */
+	struct sseu_dev_info sseu;
+
+	u32 cs_timestamp_frequency_khz;
+
+	struct color_luts {
+		u16 degamma_lut_size;
+		u16 gamma_lut_size;
+	} color;
+};
+
+
+static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
+{
+	return hweight8(sseu->slice_mask) * hweight8(sseu->subslice_mask);
+}
+
+const char *intel_platform_name(enum intel_platform platform);
+
+void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
+void intel_device_info_dump(const struct intel_device_info *info,
+			    struct drm_printer *p);
+void intel_device_info_dump_flags(const struct intel_device_info *info,
+				  struct drm_printer *p);
+
+#endif
-- 
1.9.1

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[PATCH 6/8] drm/i915: Update intel_device_info_runtime_init() parameter

[Michal Wajdeczko]

As we try to follow object-verb pattern in our functions, update
intel_device_info_runtime_init() parameter from dev_priv to info.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c          |  2 +-
 drivers/gpu/drm/i915/intel_device_info.c | 10 +++++++---
 drivers/gpu/drm/i915/intel_device_info.h |  2 +-
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6f14986..06eea8d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1088,7 +1088,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 	if (i915_inject_load_failure())
 		return -ENODEV;
 
-	intel_device_info_runtime_init(dev_priv);
+	intel_device_info_runtime_init(mkwrite_device_info(dev_priv));
 
 	intel_sanitize_options(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index f205054..8e050b5 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -431,7 +431,10 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
 	return 0;
 }
 
-/*
+/**
+ * intel_device_info_runtime_init - initialize runtime info
+ * @info: intel device info struct
+ *
  * Determine various intel_device_info fields at runtime.
  *
  * Use it when either:
@@ -444,9 +447,10 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
  *   - after the PCH has been detected,
  *   - before the first usage of the fields it can tweak.
  */
-void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
+void intel_device_info_runtime_init(struct intel_device_info *info)
 {
-	struct intel_device_info *info = mkwrite_device_info(dev_priv);
+	struct drm_i915_private *dev_priv =
+		container_of(info, struct drm_i915_private, info);
 	enum pipe pipe;
 
 	if (INTEL_GEN(dev_priv) >= 10) {
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index a155ae2..dd652e5 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -164,7 +164,7 @@ static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
 
 const char *intel_platform_name(enum intel_platform platform);
 
-void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
+void intel_device_info_runtime_init(struct intel_device_info *info);
 void intel_device_info_dump(const struct intel_device_info *info,
 			    struct drm_printer *p);
 void intel_device_info_dump_flags(const struct intel_device_info *info,
-- 
1.9.1

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[PATCH 7/8] drm/i915: Add pretty printer for runtime part of intel_device_info

[Michal Wajdeczko]

During initialization of the runtime part of the intel_device_info
we are dumping that part using DRM_DEBUG_DRIVERE mechanism.
As we already have pretty printer for const part of the info,
make similar function for the runtime part and use it separately.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c          |  5 ++++
 drivers/gpu/drm/i915/intel_device_info.c | 44 +++++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_device_info.h |  2 ++
 3 files changed, 33 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 06eea8d..5bf4f58 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1089,6 +1089,11 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 		return -ENODEV;
 
 	intel_device_info_runtime_init(mkwrite_device_info(dev_priv));
+	if (drm_debug & DRM_UT_DRIVER) {
+		struct drm_printer p = drm_debug_printer("i915 device info:");
+
+		intel_device_info_dump_runtime(&dev_priv->info, &p);
+	}
 
 	intel_sanitize_options(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 8e050b5..d28592e 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -78,6 +78,32 @@ void intel_device_info_dump_flags(const struct intel_device_info *info,
 #undef PRINT_FLAG
 }
 
+static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p)
+{
+	drm_printf(p, "slice mask: %04x\n", sseu->slice_mask);
+	drm_printf(p, "slice total: %u\n", hweight8(sseu->slice_mask));
+	drm_printf(p, "subslice total: %u\n", sseu_subslice_total(sseu));
+	drm_printf(p, "subslice mask %04x\n", sseu->subslice_mask);
+	drm_printf(p, "subslice per slice: %u\n",
+		   hweight8(sseu->subslice_mask));
+	drm_printf(p, "EU total: %u\n", sseu->eu_total);
+	drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice);
+	drm_printf(p, "has slice power gating: %s\n",
+		   yesno(sseu->has_slice_pg));
+	drm_printf(p, "has subslice power gating: %s\n",
+		   yesno(sseu->has_subslice_pg));
+	drm_printf(p, "has EU power gating: %s\n", yesno(sseu->has_eu_pg));
+}
+
+void intel_device_info_dump_runtime(const struct intel_device_info *info,
+				    struct drm_printer *p)
+{
+	sseu_dump(&info->sseu, p);
+
+	drm_printf(p, "CS timestamp frequency: %u kHz\n",
+		   info->cs_timestamp_frequency_khz);
+}
+
 void intel_device_info_dump(const struct intel_device_info *info,
 			    struct drm_printer *p)
 {
@@ -558,22 +584,4 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
 
 	/* Initialize command stream timestamp frequency */
 	info->cs_timestamp_frequency_khz = read_timestamp_frequency(dev_priv);
-
-	DRM_DEBUG_DRIVER("slice mask: %04x\n", info->sseu.slice_mask);
-	DRM_DEBUG_DRIVER("slice total: %u\n", hweight8(info->sseu.slice_mask));
-	DRM_DEBUG_DRIVER("subslice total: %u\n",
-			 sseu_subslice_total(&info->sseu));
-	DRM_DEBUG_DRIVER("subslice mask %04x\n", info->sseu.subslice_mask);
-	DRM_DEBUG_DRIVER("subslice per slice: %u\n",
-			 hweight8(info->sseu.subslice_mask));
-	DRM_DEBUG_DRIVER("EU total: %u\n", info->sseu.eu_total);
-	DRM_DEBUG_DRIVER("EU per subslice: %u\n", info->sseu.eu_per_subslice);
-	DRM_DEBUG_DRIVER("has slice power gating: %s\n",
-			 info->sseu.has_slice_pg ? "y" : "n");
-	DRM_DEBUG_DRIVER("has subslice power gating: %s\n",
-			 info->sseu.has_subslice_pg ? "y" : "n");
-	DRM_DEBUG_DRIVER("has EU power gating: %s\n",
-			 info->sseu.has_eu_pg ? "y" : "n");
-	DRM_DEBUG_DRIVER("CS timestamp frequency: %u kHz\n",
-			 info->cs_timestamp_frequency_khz);
 }
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index dd652e5..7e2e87c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -169,5 +169,7 @@ void intel_device_info_dump(const struct intel_device_info *info,
 			    struct drm_printer *p);
 void intel_device_info_dump_flags(const struct intel_device_info *info,
 				  struct drm_printer *p);
+void intel_device_info_dump_runtime(const struct intel_device_info *info,
+				    struct drm_printer *p);
 
 #endif
-- 
1.9.1

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[PATCH 8/8] drm/i915: Dump device info at once

[Michal Wajdeczko]

We are dumping device info separately for sw_only and runtime part
but to simplify the code we can also do it from one place once
we complete driver load.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5bf4f58..f3687e5 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -931,12 +931,6 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
 
 	intel_display_crc_init(dev_priv);
 
-	if (drm_debug & DRM_UT_DRIVER) {
-		struct drm_printer p = drm_debug_printer("i915 device info:");
-
-		intel_device_info_dump(&dev_priv->info, &p);
-	}
-
 	intel_detect_preproduction_hw(dev_priv);
 
 	return 0;
@@ -1089,11 +1083,6 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 		return -ENODEV;
 
 	intel_device_info_runtime_init(mkwrite_device_info(dev_priv));
-	if (drm_debug & DRM_UT_DRIVER) {
-		struct drm_printer p = drm_debug_printer("i915 device info:");
-
-		intel_device_info_dump_runtime(&dev_priv->info, &p);
-	}
 
 	intel_sanitize_options(dev_priv);
 
@@ -1388,6 +1377,13 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 
 	intel_init_ipc(dev_priv);
 
+	if (drm_debug & DRM_UT_DRIVER) {
+		struct drm_printer p = drm_debug_printer("i915 device info:");
+
+		intel_device_info_dump(&dev_priv->info, &p);
+		intel_device_info_dump_runtime(&dev_priv->info, &p);
+	}
+
 	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
 		DRM_INFO("DRM_I915_DEBUG enabled\n");
 	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
-- 
1.9.1

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Re: [PATCH 7/8] drm/i915: Add pretty printer for runtime part of intel_device_info

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:09)
> During initialization of the runtime part of the intel_device_info
> we are dumping that part using DRM_DEBUG_DRIVERE mechanism.
> As we already have pretty printer for const part of the info,
> make similar function for the runtime part and use it separately.

Exploit the convenience of the drm_printer and expose it via debugfs as
well. We already show the static part of device_info in
i915_capabilities, this will a nice complement. Or is that patch 8/8?...
-Chris
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Re: [PATCH 1/8] drm/i915: Move uint_fixed_16_16_t to i915_types.h

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:03)
> Our uint_fixed_16_16_t definition and related helper functions
> deserve dedicated header. While here cleanup types and indent.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   | 139 +------------------------------
>  drivers/gpu/drm/i915/i915_types.h | 168 ++++++++++++++++++++++++++++++++++++++
>  2 files changed, 169 insertions(+), 138 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/i915_types.h
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ca2a619..1e2217c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -55,6 +55,7 @@
>  #include "i915_params.h"
>  #include "i915_reg.h"
>  #include "i915_utils.h"
> +#include "i915_types.h"
>  
>  #include "intel_uncore.h"
>  #include "intel_bios.h"
> @@ -105,144 +106,6 @@
>  #define i915_inject_load_failure() \
>         __i915_inject_load_failure(__func__, __LINE__)
>  
> -typedef struct {
> -       uint32_t val;
> -} uint_fixed_16_16_t;

I would throw this into its own header (not something as generic as
i915_types.h, preferably not something that even ties this to i915) and
refuse to include it directly from i915_drv.h.
-Chris
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Re: [PATCH 2/8] drm/i915: Move some utility functions to i915_util.h

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:04)
> We have dedicated header file for utility functions and macros.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 3/8] drm/i915: Move display related definitions to dedicated header

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:05)
> We already have separate files for display related code, there
> is no reason to keep all display definitions in master header.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Looks a straight copy,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 4/8] drm/i915: Move opregion definitions to dedicated intel_opregion.h

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:06)
> We already have dedicated file for opregion related code, dedicated
> header will make our life easier.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h       | 57 +-------------------
>  drivers/gpu/drm/i915/intel_opregion.c |  2 +
>  drivers/gpu/drm/i915/intel_opregion.h | 99 +++++++++++++++++++++++++++++++++++
>  3 files changed, 102 insertions(+), 56 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_opregion.h
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e8ea21c..9f8a2b7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -57,6 +57,7 @@
>  #include "i915_utils.h"
>  #include "i915_types.h"
>  
> +#include "intel_opregion.h"
>  #include "intel_uncore.h"
>  #include "intel_bios.h"
>  #include "intel_dpll_mgr.h"

Preferably alphabetical.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 5/8] drm/i915: Move intel_device_info definitions to its own header

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:07)
> We already keep intel_device_info functions in dedicated file.
> Add matching header file and move related definitions there.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 139 +------------------------
>  drivers/gpu/drm/i915/intel_device_info.c |   1 +
>  drivers/gpu/drm/i915/intel_device_info.h | 173 +++++++++++++++++++++++++++++++
>  3 files changed, 175 insertions(+), 138 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_device_info.h
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9f8a2b7..53d4b45 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -65,6 +65,7 @@
>  #include "intel_lrc.h"
>  #include "intel_ringbuffer.h"
>  #include "intel_display.h"
> +#include "intel_device_info.h"

Alphabetical!
>  
>  #include "i915_gem.h"
>  #include "i915_gem_context.h"
> @@ -311,137 +312,6 @@ struct intel_csr {
>         uint32_t allowed_dc_mask;
>  };
>  
> -#define DEV_INFO_FOR_EACH_FLAG(func) \
> -       func(is_mobile); \
> -       func(is_lp); \
> -       func(is_alpha_support); \
> -       /* Keep has_* in alphabetical order */ \
> -       func(has_64bit_reloc); \
> -       func(has_aliasing_ppgtt); \
> -       func(has_csr); \
> -       func(has_ddi); \
> -       func(has_dp_mst); \
> -       func(has_reset_engine); \
> -       func(has_fbc); \
> -       func(has_fpga_dbg); \
> -       func(has_full_ppgtt); \
> -       func(has_full_48bit_ppgtt); \
> -       func(has_gmch_display); \
> -       func(has_guc); \
> -       func(has_guc_ct); \
> -       func(has_hotplug); \
> -       func(has_l3_dpf); \
> -       func(has_llc); \
> -       func(has_logical_ring_contexts); \
> -       func(has_logical_ring_preemption); \
> -       func(has_overlay); \
> -       func(has_pooled_eu); \
> -       func(has_psr); \
> -       func(has_rc6); \
> -       func(has_rc6p); \
> -       func(has_resource_streamer); \
> -       func(has_runtime_pm); \
> -       func(has_snoop); \
> -       func(unfenced_needs_alignment); \
> -       func(cursor_needs_physical); \
> -       func(hws_needs_physical); \
> -       func(overlay_needs_physical); \
> -       func(supports_tv); \
> -       func(has_ipc);
> -
> -struct sseu_dev_info {
> -       u8 slice_mask;
> -       u8 subslice_mask;
> -       u8 eu_total;
> -       u8 eu_per_subslice;
> -       u8 min_eu_in_pool;
> -       /* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
> -       u8 subslice_7eu[3];
> -       u8 has_slice_pg:1;
> -       u8 has_subslice_pg:1;
> -       u8 has_eu_pg:1;
> -};
> -
> -static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
> -{
> -       return hweight8(sseu->slice_mask) * hweight8(sseu->subslice_mask);
> -}
> -
> -/* Keep in gen based order, and chronological order within a gen */
> -enum intel_platform {
> -       INTEL_PLATFORM_UNINITIALIZED = 0,
> -       INTEL_I830,
> -       INTEL_I845G,
> -       INTEL_I85X,
> -       INTEL_I865G,
> -       INTEL_I915G,
> -       INTEL_I915GM,
> -       INTEL_I945G,
> -       INTEL_I945GM,
> -       INTEL_G33,
> -       INTEL_PINEVIEW,
> -       INTEL_I965G,
> -       INTEL_I965GM,
> -       INTEL_G45,
> -       INTEL_GM45,
> -       INTEL_IRONLAKE,
> -       INTEL_SANDYBRIDGE,
> -       INTEL_IVYBRIDGE,
> -       INTEL_VALLEYVIEW,
> -       INTEL_HASWELL,
> -       INTEL_BROADWELL,
> -       INTEL_CHERRYVIEW,
> -       INTEL_SKYLAKE,
> -       INTEL_BROXTON,
> -       INTEL_KABYLAKE,
> -       INTEL_GEMINILAKE,
> -       INTEL_COFFEELAKE,
> -       INTEL_CANNONLAKE,
> -       INTEL_MAX_PLATFORMS
> -};
> -
> -struct intel_device_info {
> -       u16 device_id;
> -       u16 gen_mask;
> -
> -       u8 gen;
> -       u8 gt; /* GT number, 0 if undefined */
> -       u8 num_rings;
> -       u8 ring_mask; /* Rings supported by the HW */
> -
> -       enum intel_platform platform;
> -       u32 platform_mask;
> -
> -       u32 display_mmio_offset;
> -
> -       u8 num_pipes;
> -       u8 num_sprites[I915_MAX_PIPES];
> -       u8 num_scalers[I915_MAX_PIPES];
> -
> -       unsigned int page_sizes; /* page sizes supported by the HW */
> -
> -#define DEFINE_FLAG(name) u8 name:1
> -       DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
> -#undef DEFINE_FLAG
> -       u16 ddb_size; /* in blocks */
> -
> -       /* Register offsets for the various display pipes and transcoders */
> -       int pipe_offsets[I915_MAX_TRANSCODERS];
> -       int trans_offsets[I915_MAX_TRANSCODERS];
> -       int palette_offsets[I915_MAX_PIPES];
> -       int cursor_offsets[I915_MAX_PIPES];
> -
> -       /* Slice/subslice/EU info */
> -       struct sseu_dev_info sseu;
> -
> -       u32 cs_timestamp_frequency_khz;
> -
> -       struct color_luts {
> -               u16 degamma_lut_size;
> -               u16 gamma_lut_size;
> -       } color;
> -};
> -
>  struct intel_display_error_state;
>  
>  struct i915_gpu_state {
> @@ -3675,13 +3545,6 @@ bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
>         return (struct intel_device_info *)&dev_priv->info;
>  }
>  
> -const char *intel_platform_name(enum intel_platform platform);
> -void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
> -void intel_device_info_dump(const struct intel_device_info *info,
> -                           struct drm_printer *p);
> -void intel_device_info_dump_flags(const struct intel_device_info *info,
> -                                 struct drm_printer *p);
> -
>  /* modesetting */
>  extern void intel_modeset_init_hw(struct drm_device *dev);
>  extern int intel_modeset_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index be355cf..f205054 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -24,6 +24,7 @@
>  
>  #include <drm/drm_print.h>
>  
> +#include "intel_device_info.h"
>  #include "i915_drv.h"
>  
>  #define PLATFORM_NAME(x) [INTEL_##x] = #x
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> new file mode 100644
> index 0000000..a155ae2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -0,0 +1,173 @@
> +/*
> + * Copyright © 2014-2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef _INTEL_DEVICE_INFO_H_
> +#define _INTEL_DEVICE_INFO_H_
> +
> +#include "intel_display.h"

intel_display.h feels a bit broad. But that looks to be MAX_PIPES and
MAX_TRANSCODE, which seems fair.

Should we not include our base headers as well?

> +
> +struct drm_printer;
> +struct drm_i915_private;
> +
> +/* Keep in gen based order, and chronological order within a gen */
> +enum intel_platform {
> +       INTEL_PLATFORM_UNINITIALIZED = 0,

Next patch it's probably worth adding the gen boundaries.

/* gen2 */
> +       INTEL_I830,
> +       INTEL_I845G,
> +       INTEL_I85X,
> +       INTEL_I865G,
/* gen3 */
> +       INTEL_I915G,
> +       INTEL_I915GM,
> +       INTEL_I945G,
> +       INTEL_I945GM,
> +       INTEL_G33,
> +       INTEL_PINEVIEW,
/* gen4 */
> +       INTEL_I965G,
> +       INTEL_I965GM,
> +       INTEL_G45,
> +       INTEL_GM45,
/* gen5 */
> +       INTEL_IRONLAKE,
/* gen6 */
> +       INTEL_SANDYBRIDGE,
/* gen7 */
> +       INTEL_IVYBRIDGE,
> +       INTEL_VALLEYVIEW,
> +       INTEL_HASWELL,
/* gen8 */
> +       INTEL_BROADWELL,
> +       INTEL_CHERRYVIEW,
/* gen9 */
> +       INTEL_SKYLAKE,
> +       INTEL_BROXTON,
> +       INTEL_KABYLAKE,
> +       INTEL_GEMINILAKE,
> +       INTEL_COFFEELAKE,
/* gen10 */
> +       INTEL_CANNONLAKE,
> +       INTEL_MAX_PLATFORMS
> +};
> +
> +#define DEV_INFO_FOR_EACH_FLAG(func) \
> +       func(is_mobile); \
> +       func(is_lp); \
> +       func(is_alpha_support); \
> +       /* Keep has_* in alphabetical order */ \
> +       func(has_64bit_reloc); \
> +       func(has_aliasing_ppgtt); \
> +       func(has_csr); \
> +       func(has_ddi); \
> +       func(has_dp_mst); \
> +       func(has_reset_engine); \
> +       func(has_fbc); \
> +       func(has_fpga_dbg); \
> +       func(has_full_ppgtt); \
> +       func(has_full_48bit_ppgtt); \
> +       func(has_gmch_display); \
> +       func(has_guc); \
> +       func(has_guc_ct); \
> +       func(has_hotplug); \
> +       func(has_l3_dpf); \
> +       func(has_llc); \
> +       func(has_logical_ring_contexts); \
> +       func(has_logical_ring_preemption); \
> +       func(has_overlay); \
> +       func(has_pooled_eu); \
> +       func(has_psr); \
> +       func(has_rc6); \
> +       func(has_rc6p); \
> +       func(has_resource_streamer); \
> +       func(has_runtime_pm); \
> +       func(has_snoop); \
> +       func(unfenced_needs_alignment); \
> +       func(cursor_needs_physical); \
> +       func(hws_needs_physical); \
> +       func(overlay_needs_physical); \
> +       func(supports_tv); \
> +       func(has_ipc);
> +
> +struct sseu_dev_info {
> +       u8 slice_mask;
> +       u8 subslice_mask;
> +       u8 eu_total;
> +       u8 eu_per_subslice;
> +       u8 min_eu_in_pool;
> +       /* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
> +       u8 subslice_7eu[3];
> +       u8 has_slice_pg:1;
> +       u8 has_subslice_pg:1;
> +       u8 has_eu_pg:1;
> +};
> +
> +struct intel_device_info {
> +       u16 device_id;
> +       u16 gen_mask;
> +
> +       u8 gen;
> +       u8 gt; /* GT number, 0 if undefined */
> +       u8 num_rings;
> +       u8 ring_mask; /* Rings supported by the HW */
> +
> +       enum intel_platform platform;
> +       u32 platform_mask;
> +
> +       u32 display_mmio_offset;
> +
> +       u8 num_pipes;
> +       u8 num_sprites[I915_MAX_PIPES];
> +       u8 num_scalers[I915_MAX_PIPES];
> +
> +       unsigned int page_sizes; /* page sizes supported by the HW */
> +
> +#define DEFINE_FLAG(name) u8 name:1
> +       DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
> +#undef DEFINE_FLAG
> +       u16 ddb_size; /* in blocks */
> +
> +       /* Register offsets for the various display pipes and transcoders */
> +       int pipe_offsets[I915_MAX_TRANSCODERS];
> +       int trans_offsets[I915_MAX_TRANSCODERS];
> +       int palette_offsets[I915_MAX_PIPES];
> +       int cursor_offsets[I915_MAX_PIPES];
> +
> +       /* Slice/subslice/EU info */
> +       struct sseu_dev_info sseu;
> +
> +       u32 cs_timestamp_frequency_khz;
> +
> +       struct color_luts {
> +               u16 degamma_lut_size;
> +               u16 gamma_lut_size;
> +       } color;
> +};
> +

Still only a single newline here.
> +
> +static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
> +{
> +       return hweight8(sseu->slice_mask) * hweight8(sseu->subslice_mask);
> +}
> +
> +const char *intel_platform_name(enum intel_platform platform);
> +
> +void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
> +void intel_device_info_dump(const struct intel_device_info *info,
> +                           struct drm_printer *p);
> +void intel_device_info_dump_flags(const struct intel_device_info *info,
> +                                 struct drm_printer *p);
> +

Nothing major,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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✗ Fi.CI.BAT: failure for Misc i915_drv.h cleanups

[Patchwork]

== Series Details ==

Series: Misc i915_drv.h cleanups
URL   : https://patchwork.freedesktop.org/series/35637/
State : failure

== Summary ==

Series 35637v1 Misc i915_drv.h cleanups
https://patchwork.freedesktop.org/api/1.0/series/35637/revisions/1/mbox/

Test debugfs_test:
        Subgroup read_all_entries:
                dmesg-warn -> DMESG-FAIL (fi-elk-e7500) fdo#103989
                dmesg-warn -> PASS       (fi-bdw-gvtdvm) fdo#103938 +1
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-bdw-5557u)
        Subgroup suspend-read-crc-pipe-c:
                pass       -> DMESG-WARN (fi-kbl-r) fdo#104172
Test kms_psr_sink_crc:
        Subgroup psr_basic:
                dmesg-warn -> PASS       (fi-skl-6700hq) fdo#101144

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#103938 https://bugs.freedesktop.org/show_bug.cgi?id=103938
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144

fi-bdw-5557u     total:245  pass:227  dwarn:0   dfail:0   fail:0   skip:17 
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:437s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:390s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:498s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:276s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:491s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:490s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:480s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:469s
fi-elk-e7500     total:224  pass:163  dwarn:14  dfail:1   fail:0   skip:45 
fi-gdg-551       total:288  pass:178  dwarn:1   dfail:0   fail:1   skip:108 time:262s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:525s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:403s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:415s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:384s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:480s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:422s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:476s
fi-kbl-7560u     total:288  pass:268  dwarn:1   dfail:0   fail:0   skip:19  time:521s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:467s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:525s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:586s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:440s
fi-skl-6600u     total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:533s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:552s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:506s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:500s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:442s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:414s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:588s
fi-cnl-y         total:217  pass:196  dwarn:0   dfail:0   fail:0   skip:20 

bb20a81b430cda7e7ffe62b05c03ca739b22bc12 drm-tip: 2017y-12m-20d-17h-50m-55s UTC integration manifest
5e7e634c6072 drm/i915: Dump device info at once
1d81ab1a97e1 drm/i915: Add pretty printer for runtime part of intel_device_info
843749801cba drm/i915: Update intel_device_info_runtime_init() parameter
14d48a5bc535 drm/i915: Move intel_device_info definitions to its own header
ba6210199dcb drm/i915: Move opregion definitions to dedicated intel_opregion.h
26094847d101 drm/i915: Move display related definitions to dedicated header
559e6d2ca993 drm/i915: Move some utility functions to i915_util.h
56d8b756774a drm/i915: Move uint_fixed_16_16_t to i915_types.h

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7550/issues.html
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Re: [PATCH 6/8] drm/i915: Update intel_device_info_runtime_init() parameter

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:08)
> As we try to follow object-verb pattern in our functions, update
> intel_device_info_runtime_init() parameter from dev_priv to info.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

The patch looks like churn, but on closer inspection it does make sense
from a consistency pov.

> ---
>  drivers/gpu/drm/i915/i915_drv.c          |  2 +-
>  drivers/gpu/drm/i915/intel_device_info.c | 10 +++++++---
>  drivers/gpu/drm/i915/intel_device_info.h |  2 +-
>  3 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 6f14986..06eea8d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1088,7 +1088,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
>         if (i915_inject_load_failure())
>                 return -ENODEV;
>  
> -       intel_device_info_runtime_init(dev_priv);
> +       intel_device_info_runtime_init(mkwrite_device_info(dev_priv));

Just too bad this is so ugly!

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 8/8] drm/i915: Dump device info at once

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-20 18:36:10)
> We are dumping device info separately for sw_only and runtime part
> but to simplify the code we can also do it from one place once
> we complete driver load.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 18 +++++++-----------
>  1 file changed, 7 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 5bf4f58..f3687e5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -931,12 +931,6 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
>  
>         intel_display_crc_init(dev_priv);
>  
> -       if (drm_debug & DRM_UT_DRIVER) {
> -               struct drm_printer p = drm_debug_printer("i915 device info:");
> -
> -               intel_device_info_dump(&dev_priv->info, &p);
> -       }
> -
>         intel_detect_preproduction_hw(dev_priv);
>  
>         return 0;
> @@ -1089,11 +1083,6 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
>                 return -ENODEV;
>  
>         intel_device_info_runtime_init(mkwrite_device_info(dev_priv));
> -       if (drm_debug & DRM_UT_DRIVER) {
> -               struct drm_printer p = drm_debug_printer("i915 device info:");
> -
> -               intel_device_info_dump_runtime(&dev_priv->info, &p);
> -       }
>  
>         intel_sanitize_options(dev_priv);
>  
> @@ -1388,6 +1377,13 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
>  
>         intel_init_ipc(dev_priv);
>  
> +       if (drm_debug & DRM_UT_DRIVER) {
> +               struct drm_printer p = drm_debug_printer("i915 device info:");
> +
> +               intel_device_info_dump(&dev_priv->info, &p);
> +               intel_device_info_dump_runtime(&dev_priv->info, &p);
> +       }

Ok. I'd suggest maybe we should move these "welcome messages" to a
i915_driver_welcome(). (Or some such.) That will give us a place to
add/hook more messages as the need arises.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 0/8] Misc i915_drv.h cleanups

[Jani Nikula]

On Wed, 20 Dec 2017, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote:
> Our main header is huge. Lets try to make some cleanup.

Overall seems fine, I think I agree with Chris' review. I do want
Rodrigo's ack wrt upcoming stuff that's bound to conflict with many of
the patches here. I don't want to cause unnecessary burden.

BR,
Jani.



>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>
> Michal Wajdeczko (8):
>   drm/i915: Move uint_fixed_16_16_t to i915_types.h
>   drm/i915: Move some utility functions to i915_util.h
>   drm/i915: Move display related definitions to dedicated header
>   drm/i915: Move opregion definitions to dedicated intel_opregion.h
>   drm/i915: Move intel_device_info definitions to its own header
>   drm/i915: Update intel_device_info_runtime_init() parameter
>   drm/i915: Add pretty printer for runtime part of intel_device_info
>   drm/i915: Dump device info at once
>
>  drivers/gpu/drm/i915/i915_drv.c          |  15 +-
>  drivers/gpu/drm/i915/i915_drv.h          | 633 +------------------------------
>  drivers/gpu/drm/i915/i915_types.h        | 168 ++++++++
>  drivers/gpu/drm/i915/i915_utils.h        |  15 +
>  drivers/gpu/drm/i915/intel_device_info.c |  55 ++-
>  drivers/gpu/drm/i915/intel_device_info.h | 175 +++++++++
>  drivers/gpu/drm/i915/intel_display.h     | 312 +++++++++++++++
>  drivers/gpu/drm/i915/intel_opregion.c    |   2 +
>  drivers/gpu/drm/i915/intel_opregion.h    |  99 +++++
>  9 files changed, 817 insertions(+), 657 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/i915_types.h
>  create mode 100644 drivers/gpu/drm/i915/intel_device_info.h
>  create mode 100644 drivers/gpu/drm/i915/intel_display.h
>  create mode 100644 drivers/gpu/drm/i915/intel_opregion.h

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 0/8] Misc i915_drv.h cleanups

[Rodrigo Vivi]

On Wed, Dec 20, 2017 at 07:24:52PM +0000, Jani Nikula wrote:
> On Wed, 20 Dec 2017, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote:
> > Our main header is huge. Lets try to make some cleanup.
> 
> Overall seems fine, I think I agree with Chris' review. I do want
> Rodrigo's ack wrt upcoming stuff that's bound to conflict with many of
> the patches here. I don't want to cause unnecessary burden.

With the reviews in place and addressing everything was raised there,

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(Please don't use this to by-pass reviews in this case)

My first thought was actually a "oh no! a lot of conflict on my way!"
but looking to the content itself it made sense... ;)

Thanks,
Rodrigo.

> 
> BR,
> Jani.
> 
> 
> 
> >
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >
> > Michal Wajdeczko (8):
> >   drm/i915: Move uint_fixed_16_16_t to i915_types.h
> >   drm/i915: Move some utility functions to i915_util.h
> >   drm/i915: Move display related definitions to dedicated header
> >   drm/i915: Move opregion definitions to dedicated intel_opregion.h
> >   drm/i915: Move intel_device_info definitions to its own header
> >   drm/i915: Update intel_device_info_runtime_init() parameter
> >   drm/i915: Add pretty printer for runtime part of intel_device_info
> >   drm/i915: Dump device info at once
> >
> >  drivers/gpu/drm/i915/i915_drv.c          |  15 +-
> >  drivers/gpu/drm/i915/i915_drv.h          | 633 +------------------------------
> >  drivers/gpu/drm/i915/i915_types.h        | 168 ++++++++
> >  drivers/gpu/drm/i915/i915_utils.h        |  15 +
> >  drivers/gpu/drm/i915/intel_device_info.c |  55 ++-
> >  drivers/gpu/drm/i915/intel_device_info.h | 175 +++++++++
> >  drivers/gpu/drm/i915/intel_display.h     | 312 +++++++++++++++
> >  drivers/gpu/drm/i915/intel_opregion.c    |   2 +
> >  drivers/gpu/drm/i915/intel_opregion.h    |  99 +++++
> >  9 files changed, 817 insertions(+), 657 deletions(-)
> >  create mode 100644 drivers/gpu/drm/i915/i915_types.h
> >  create mode 100644 drivers/gpu/drm/i915/intel_device_info.h
> >  create mode 100644 drivers/gpu/drm/i915/intel_display.h
> >  create mode 100644 drivers/gpu/drm/i915/intel_opregion.h
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 1/8] drm/i915: Move uint_fixed_16_16_t to i915_types.h

[Michal Wajdeczko]

On Wed, 20 Dec 2017 19:55:58 +0100, Chris Wilson  
<chris@chris-wilson.co.uk> wrote:

> Quoting Michal Wajdeczko (2017-12-20 18:36:03)
>> Our uint_fixed_16_16_t definition and related helper functions
>> deserve dedicated header. While here cleanup types and indent.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h   | 139 +------------------------------
>>  drivers/gpu/drm/i915/i915_types.h | 168  
>> ++++++++++++++++++++++++++++++++++++++
>>  2 files changed, 169 insertions(+), 138 deletions(-)
>>  create mode 100644 drivers/gpu/drm/i915/i915_types.h
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h  
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index ca2a619..1e2217c 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -55,6 +55,7 @@
>>  #include "i915_params.h"
>>  #include "i915_reg.h"
>>  #include "i915_utils.h"
>> +#include "i915_types.h"
>>
>>  #include "intel_uncore.h"
>>  #include "intel_bios.h"
>> @@ -105,144 +106,6 @@
>>  #define i915_inject_load_failure() \
>>         __i915_inject_load_failure(__func__, __LINE__)
>>
>> -typedef struct {
>> -       uint32_t val;
>> -} uint_fixed_16_16_t;
>
> I would throw this into its own header (not something as generic as
> i915_types.h, preferably not something that even ties this to i915) and

1) uint_fixed_16_16.h (like drm/amd/display/include/fixed31_32.h)

2) i915_fixed.h (like include/drm_fixed.h)

> refuse to include it directly from i915_drv.h.

But we have to do this as uint_fixed_16_16_t is used by struct  
skl_wm_params
(which is still defined in this header)

Michal
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Re: [PATCH 5/8] drm/i915: Move intel_device_info definitions to its own header

[Michal Wajdeczko]

On Wed, 20 Dec 2017 20:07:10 +0100, Chris Wilson  
<chris@chris-wilson.co.uk> wrote:

> Quoting Michal Wajdeczko (2017-12-20 18:36:07)
>> We already keep intel_device_info functions in dedicated file.
>> Add matching header file and move related definitions there.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h          | 139  
>> +------------------------
>>  drivers/gpu/drm/i915/intel_device_info.c |   1 +
>>  drivers/gpu/drm/i915/intel_device_info.h | 173  
>> +++++++++++++++++++++++++++++++
>>  3 files changed, 175 insertions(+), 138 deletions(-)
>>  create mode 100644 drivers/gpu/drm/i915/intel_device_info.h
>>
>> +/* Keep in gen based order, and chronological order within a gen */
>> +enum intel_platform {
>> +       INTEL_PLATFORM_UNINITIALIZED = 0,
>
> Next patch it's probably worth adding the gen boundaries.

Will add to v2 if this is ok.

>
> /* gen2 */
>> +       INTEL_I830,
>> +       INTEL_I845G,
>> +       INTEL_I85X,
>> +       INTEL_I865G,
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Re: [PATCH 1/8] drm/i915: Move uint_fixed_16_16_t to i915_types.h

[Chris Wilson]

Quoting Michal Wajdeczko (2017-12-21 11:37:11)
> On Wed, 20 Dec 2017 19:55:58 +0100, Chris Wilson  
> <chris@chris-wilson.co.uk> wrote:
> 
> > Quoting Michal Wajdeczko (2017-12-20 18:36:03)
> >> Our uint_fixed_16_16_t definition and related helper functions
> >> deserve dedicated header. While here cleanup types and indent.
> >>
> >> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/i915_drv.h   | 139 +------------------------------
> >>  drivers/gpu/drm/i915/i915_types.h | 168  
> >> ++++++++++++++++++++++++++++++++++++++
> >>  2 files changed, 169 insertions(+), 138 deletions(-)
> >>  create mode 100644 drivers/gpu/drm/i915/i915_types.h
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h  
> >> b/drivers/gpu/drm/i915/i915_drv.h
> >> index ca2a619..1e2217c 100644
> >> --- a/drivers/gpu/drm/i915/i915_drv.h
> >> +++ b/drivers/gpu/drm/i915/i915_drv.h
> >> @@ -55,6 +55,7 @@
> >>  #include "i915_params.h"
> >>  #include "i915_reg.h"
> >>  #include "i915_utils.h"
> >> +#include "i915_types.h"
> >>
> >>  #include "intel_uncore.h"
> >>  #include "intel_bios.h"
> >> @@ -105,144 +106,6 @@
> >>  #define i915_inject_load_failure() \
> >>         __i915_inject_load_failure(__func__, __LINE__)
> >>
> >> -typedef struct {
> >> -       uint32_t val;
> >> -} uint_fixed_16_16_t;
> >
> > I would throw this into its own header (not something as generic as
> > i915_types.h, preferably not something that even ties this to i915) and
> 
> 1) uint_fixed_16_16.h (like drm/amd/display/include/fixed31_32.h)

The type itself shouldn't be called uint_fixed_16_16_t.

Looking towards the future, include/linux/fixed16_16.h

> 2) i915_fixed.h (like include/drm_fixed.h)
> 
> > refuse to include it directly from i915_drv.h.
> 
> But we have to do this as uint_fixed_16_16_t is used by struct  
> skl_wm_params
> (which is still defined in this header)

Boo. But not forever as skl_wm_values isn't used by i915_drv.h!
-Chris
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