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* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:08 ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang @ 2017-12-21  2:08 UTC (permalink / raw)
  To: joro, lorenzo.pieralisi, treding, mark.rutland, matthias.bgg,
	robh, robin.murphy
  Cc: p.zabel, devicetree, pebolle, kendrick.hsu, arnd, srv_heupstream,
	catalin.marinas, will.deacon, linux-kernel, tfiga, iommu,
	robh+dt, djkurtz, kernel, linux-mediatek, linux-arm-kernel,
	l.stach, yingjoe.chen, eddie.huang, youlin.pei, erin.lo,
	Honghui Zhang

From: Honghui Zhang <honghui.zhang@mediatek.com>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:08 ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang-NuS5LvNUpcJWk0Htik3J/w @ 2017-12-21  2:08 UTC (permalink / raw)
  To: joro-zLv9SwRftAIdnm+yROfE0A, lorenzo.pieralisi-5wv7dgnIgG8,
	treding-DDmLM1+adcrQT0dZR+AlfA, mark.rutland-5wv7dgnIgG8,
	matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w, robh-DgEjT+Ai2ygdnm+yROfE0A,
	robin.murphy-5wv7dgnIgG8
  Cc: catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
	youlin.pei-NuS5LvNUpcJWk0Htik3J/w,
	yingjoe.chen-NuS5LvNUpcJWk0Htik3J/w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	kendrick.hsu-NuS5LvNUpcJWk0Htik3J/w,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ, arnd-r2nGTMty4D4,
	tfiga-hpIqsD4AKlfQT0dZR+AlfA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	eddie.huang-NuS5LvNUpcJWk0Htik3J/w,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	pebolle-IWqWACnzNjzz+pZb47iToQ,
	srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
	erin.lo-NuS5LvNUpcJWk0Htik3J/w,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	djkurtz-hpIqsD4AKlfQT0dZR+AlfA, p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ,
	l.stach-bIcnvbaLZ9MEGnE8C9+IrQ

From: Honghui Zhang <honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:08 ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang at mediatek.com @ 2017-12-21  2:08 UTC (permalink / raw)
  To: linux-arm-kernel

From: Honghui Zhang <honghui.zhang@mediatek.com>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 1/2] PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
@ 2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang @ 2017-12-21  2:08 UTC (permalink / raw)
  To: joro, lorenzo.pieralisi, treding, mark.rutland, matthias.bgg,
	robh, robin.murphy
  Cc: p.zabel, devicetree, pebolle, kendrick.hsu, arnd, srv_heupstream,
	catalin.marinas, will.deacon, linux-kernel, tfiga, iommu,
	robh+dt, djkurtz, kernel, linux-mediatek, linux-arm-kernel,
	l.stach, yingjoe.chen, eddie.huang, youlin.pei, erin.lo,
	Honghui Zhang

From: Honghui Zhang <honghui.zhang@mediatek.com>

There maybe a same IRQ reentry scenario after IRQ received in current
IRQ handle flow:
	EP device		PCIe host driver	EP driver
1. issue an IRQ
			2. received IRQ
			3. clear IRQ status
			4. dispatch IRQ
						5. clear IRQ source
The IRQ status was not successfully cleared at step 2 since the IRQ
source was not cleared yet. So the PCIe host driver may receive the
same IRQ after step 5. Then there's an IRQ reentry occurred.
Even worse, if the reentry IRQ was not an IRQ that EP driver expected,
it may not handle the IRQ. Then we may run into the infinite loop from
step 2 to step 4.
Clear the IRQ status after IRQ have been dispatched to avoid the IRQ
reentry.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
---
 drivers/pci/host/pcie-mediatek.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index db93efd..3248771 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -605,11 +605,11 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)
 
 	while ((status = readl(port->base + PCIE_INT_STATUS)) & INTX_MASK) {
 		for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {
-			/* Clear the INTx */
-			writel(1 << bit, port->base + PCIE_INT_STATUS);
 			virq = irq_find_mapping(port->irq_domain,
 						bit - INTX_SHIFT);
 			generic_handle_irq(virq);
+			/* Clear the INTx */
+			writel(1 << bit, port->base + PCIE_INT_STATUS);
 		}
 	}
 
@@ -619,10 +619,10 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)
 
 			while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) {
 				for_each_set_bit(bit, &imsi_status, MTK_MSI_IRQS_NUM) {
-					/* Clear the MSI */
-					writel(1 << bit, port->base + PCIE_IMSI_STATUS);
 					virq = irq_find_mapping(port->msi_domain, bit);
 					generic_handle_irq(virq);
+					/* Clear the MSI */
+					writel(1 << bit, port->base + PCIE_IMSI_STATUS);
 				}
 			}
 			/* Clear MSI interrupt status */
-- 
2.6.4

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 1/2] PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
@ 2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang-NuS5LvNUpcJWk0Htik3J/w @ 2017-12-21  2:08 UTC (permalink / raw)
  To: joro-zLv9SwRftAIdnm+yROfE0A, lorenzo.pieralisi-5wv7dgnIgG8,
	treding-DDmLM1+adcrQT0dZR+AlfA, mark.rutland-5wv7dgnIgG8,
	matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w, robh-DgEjT+Ai2ygdnm+yROfE0A,
	robin.murphy-5wv7dgnIgG8
  Cc: p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	pebolle-IWqWACnzNjzz+pZb47iToQ,
	kendrick.hsu-NuS5LvNUpcJWk0Htik3J/w, arnd-r2nGTMty4D4,
	srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
	catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	tfiga-hpIqsD4AKlfQT0dZR+AlfA,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A, djkurtz-hpIqsD4AKlfQT0dZR+AlfA,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	l.stach-bIcnvbaLZ9MEGnE8C9+IrQ,
	yingjoe.chen-NuS5LvNUpcJWk0Htik3J/w,
	eddie.huang-NuS5LvNUpcJWk0Htik3J/w,
	youlin.pei-NuS5LvNUpcJWk0Htik3J/w,
	erin.lo-NuS5LvNUpcJWk0Htik3J/w, Honghui Zhang

From: Honghui Zhang <honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>

There maybe a same IRQ reentry scenario after IRQ received in current
IRQ handle flow:
	EP device		PCIe host driver	EP driver
1. issue an IRQ
			2. received IRQ
			3. clear IRQ status
			4. dispatch IRQ
						5. clear IRQ source
The IRQ status was not successfully cleared at step 2 since the IRQ
source was not cleared yet. So the PCIe host driver may receive the
same IRQ after step 5. Then there's an IRQ reentry occurred.
Even worse, if the reentry IRQ was not an IRQ that EP driver expected,
it may not handle the IRQ. Then we may run into the infinite loop from
step 2 to step 4.
Clear the IRQ status after IRQ have been dispatched to avoid the IRQ
reentry.

Signed-off-by: Honghui Zhang <honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Acked-by: Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
 drivers/pci/host/pcie-mediatek.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index db93efd..3248771 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -605,11 +605,11 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)
 
 	while ((status = readl(port->base + PCIE_INT_STATUS)) & INTX_MASK) {
 		for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {
-			/* Clear the INTx */
-			writel(1 << bit, port->base + PCIE_INT_STATUS);
 			virq = irq_find_mapping(port->irq_domain,
 						bit - INTX_SHIFT);
 			generic_handle_irq(virq);
+			/* Clear the INTx */
+			writel(1 << bit, port->base + PCIE_INT_STATUS);
 		}
 	}
 
@@ -619,10 +619,10 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)
 
 			while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) {
 				for_each_set_bit(bit, &imsi_status, MTK_MSI_IRQS_NUM) {
-					/* Clear the MSI */
-					writel(1 << bit, port->base + PCIE_IMSI_STATUS);
 					virq = irq_find_mapping(port->msi_domain, bit);
 					generic_handle_irq(virq);
+					/* Clear the MSI */
+					writel(1 << bit, port->base + PCIE_IMSI_STATUS);
 				}
 			}
 			/* Clear MSI interrupt status */
-- 
2.6.4

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^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 1/2] PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
@ 2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang at mediatek.com @ 2017-12-21  2:08 UTC (permalink / raw)
  To: linux-arm-kernel

From: Honghui Zhang <honghui.zhang@mediatek.com>

There maybe a same IRQ reentry scenario after IRQ received in current
IRQ handle flow:
	EP device		PCIe host driver	EP driver
1. issue an IRQ
			2. received IRQ
			3. clear IRQ status
			4. dispatch IRQ
						5. clear IRQ source
The IRQ status was not successfully cleared at step 2 since the IRQ
source was not cleared yet. So the PCIe host driver may receive the
same IRQ after step 5. Then there's an IRQ reentry occurred.
Even worse, if the reentry IRQ was not an IRQ that EP driver expected,
it may not handle the IRQ. Then we may run into the infinite loop from
step 2 to step 4.
Clear the IRQ status after IRQ have been dispatched to avoid the IRQ
reentry.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
---
 drivers/pci/host/pcie-mediatek.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index db93efd..3248771 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -605,11 +605,11 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)
 
 	while ((status = readl(port->base + PCIE_INT_STATUS)) & INTX_MASK) {
 		for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {
-			/* Clear the INTx */
-			writel(1 << bit, port->base + PCIE_INT_STATUS);
 			virq = irq_find_mapping(port->irq_domain,
 						bit - INTX_SHIFT);
 			generic_handle_irq(virq);
+			/* Clear the INTx */
+			writel(1 << bit, port->base + PCIE_INT_STATUS);
 		}
 	}
 
@@ -619,10 +619,10 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data)
 
 			while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) {
 				for_each_set_bit(bit, &imsi_status, MTK_MSI_IRQS_NUM) {
-					/* Clear the MSI */
-					writel(1 << bit, port->base + PCIE_IMSI_STATUS);
 					virq = irq_find_mapping(port->msi_domain, bit);
 					generic_handle_irq(virq);
+					/* Clear the MSI */
+					writel(1 << bit, port->base + PCIE_IMSI_STATUS);
 				}
 			}
 			/* Clear MSI interrupt status */
-- 
2.6.4

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622
@ 2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang @ 2017-12-21  2:08 UTC (permalink / raw)
  To: joro, lorenzo.pieralisi, treding, mark.rutland, matthias.bgg,
	robh, robin.murphy
  Cc: p.zabel, devicetree, pebolle, kendrick.hsu, arnd, srv_heupstream,
	catalin.marinas, will.deacon, linux-kernel, tfiga, iommu,
	robh+dt, djkurtz, kernel, linux-mediatek, linux-arm-kernel,
	l.stach, yingjoe.chen, eddie.huang, youlin.pei, erin.lo,
	Honghui Zhang

From: Honghui Zhang <honghui.zhang@mediatek.com>

The host bridge of MT7622 has hardware code the class code to an
arbitrary, meaningless value, fix that.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
---
 drivers/pci/host/pcie-mediatek.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index 3248771..ae8d367 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -1174,3 +1174,15 @@ static struct platform_driver mtk_pcie_driver = {
 	},
 };
 builtin_platform_driver(mtk_pcie_driver);
+
+/* The host bridge of MT7622 advertises the wrong device class. */
+static void mtk_fixup_class(struct pci_dev *dev)
+{
+	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
+}
+
+/*
+ * The HW default value of vendor id and device id for mt7622 are 0x0e8d,
+ * 0x3258, which are arbitrary, meaningless values.
+ */
+DECLARE_PCI_FIXUP_EARLY(0x0e8d, 0x3258, mtk_fixup_class);
-- 
2.6.4

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622
@ 2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang-NuS5LvNUpcJWk0Htik3J/w @ 2017-12-21  2:08 UTC (permalink / raw)
  To: joro-zLv9SwRftAIdnm+yROfE0A, lorenzo.pieralisi-5wv7dgnIgG8,
	treding-DDmLM1+adcrQT0dZR+AlfA, mark.rutland-5wv7dgnIgG8,
	matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w, robh-DgEjT+Ai2ygdnm+yROfE0A,
	robin.murphy-5wv7dgnIgG8
  Cc: catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
	youlin.pei-NuS5LvNUpcJWk0Htik3J/w,
	yingjoe.chen-NuS5LvNUpcJWk0Htik3J/w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	kendrick.hsu-NuS5LvNUpcJWk0Htik3J/w,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ, arnd-r2nGTMty4D4,
	tfiga-hpIqsD4AKlfQT0dZR+AlfA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	eddie.huang-NuS5LvNUpcJWk0Htik3J/w,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	pebolle-IWqWACnzNjzz+pZb47iToQ,
	srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
	erin.lo-NuS5LvNUpcJWk0Htik3J/w,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	djkurtz-hpIqsD4AKlfQT0dZR+AlfA, p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ,
	l.stach-bIcnvbaLZ9MEGnE8C9+IrQ

From: Honghui Zhang <honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>

The host bridge of MT7622 has hardware code the class code to an
arbitrary, meaningless value, fix that.

Signed-off-by: Honghui Zhang <honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
 drivers/pci/host/pcie-mediatek.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index 3248771..ae8d367 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -1174,3 +1174,15 @@ static struct platform_driver mtk_pcie_driver = {
 	},
 };
 builtin_platform_driver(mtk_pcie_driver);
+
+/* The host bridge of MT7622 advertises the wrong device class. */
+static void mtk_fixup_class(struct pci_dev *dev)
+{
+	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
+}
+
+/*
+ * The HW default value of vendor id and device id for mt7622 are 0x0e8d,
+ * 0x3258, which are arbitrary, meaningless values.
+ */
+DECLARE_PCI_FIXUP_EARLY(0x0e8d, 0x3258, mtk_fixup_class);
-- 
2.6.4

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622
@ 2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang at mediatek.com @ 2017-12-21  2:08 UTC (permalink / raw)
  To: linux-arm-kernel

From: Honghui Zhang <honghui.zhang@mediatek.com>

The host bridge of MT7622 has hardware code the class code to an
arbitrary, meaningless value, fix that.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
---
 drivers/pci/host/pcie-mediatek.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index 3248771..ae8d367 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -1174,3 +1174,15 @@ static struct platform_driver mtk_pcie_driver = {
 	},
 };
 builtin_platform_driver(mtk_pcie_driver);
+
+/* The host bridge of MT7622 advertises the wrong device class. */
+static void mtk_fixup_class(struct pci_dev *dev)
+{
+	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
+}
+
+/*
+ * The HW default value of vendor id and device id for mt7622 are 0x0e8d,
+ * 0x3258, which are arbitrary, meaningless values.
+ */
+DECLARE_PCI_FIXUP_EARLY(0x0e8d, 0x3258, mtk_fixup_class);
-- 
2.6.4

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:13   ` Honghui Zhang
  0 siblings, 0 replies; 16+ messages in thread
From: Honghui Zhang @ 2017-12-21  2:13 UTC (permalink / raw)
  To: joro
  Cc: lorenzo.pieralisi, treding, mark.rutland, matthias.bgg, robh,
	robin.murphy, p.zabel, devicetree, pebolle, kendrick.hsu, arnd,
	srv_heupstream, catalin.marinas, will.deacon, linux-kernel,
	tfiga, iommu, robh+dt, djkurtz, kernel, linux-mediatek,
	linux-arm-kernel, l.stach, yingjoe.chen, eddie.huang, youlin.pei,
	erin.lo

On Thu, 2017-12-21 at 10:08 +0800, honghui.zhang@mediatek.com wrote:
> From: Honghui Zhang <honghui.zhang@mediatek.com>
> 
> Two fixups for mediatek's host bridge:
> The first patch fixup the IRQ handle routine to avoid IRQ reentry which
> may exist for both MT2712 and MT7622.
> The second patch fixup class type for MT7622.
> 

Sorry about the noise, to the wrong mail group, please ignore this.
thanks.

> Change Since v1:
>  - Add the second patch.
>  - Make the first patch's commit message more standard.
> 
> Honghui Zhang (2):
>   PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
>   PCI: mediatek: Fixup class type for MT7622
> 
>  drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:13   ` Honghui Zhang
  0 siblings, 0 replies; 16+ messages in thread
From: Honghui Zhang @ 2017-12-21  2:13 UTC (permalink / raw)
  To: joro-zLv9SwRftAIdnm+yROfE0A
  Cc: mark.rutland-5wv7dgnIgG8, catalin.marinas-5wv7dgnIgG8,
	will.deacon-5wv7dgnIgG8, youlin.pei-NuS5LvNUpcJWk0Htik3J/w,
	robh-DgEjT+Ai2ygdnm+yROfE0A, yingjoe.chen-NuS5LvNUpcJWk0Htik3J/w,
	treding-DDmLM1+adcrQT0dZR+AlfA,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	kendrick.hsu-NuS5LvNUpcJWk0Htik3J/w,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ, arnd-r2nGTMty4D4,
	tfiga-hpIqsD4AKlfQT0dZR+AlfA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w,
	eddie.huang-NuS5LvNUpcJWk0Htik3J/w,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	pebolle-IWqWACnzNjzz+pZb47iToQ,
	srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
	erin.lo-NuS5LvNUpcJWk0Htik3J/w,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	djkurtz-hpIqsD4AKlfQT0dZR+AlfA, p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ,
	l.stach-bIcnvbaLZ9MEGnE8C9+IrQ

On Thu, 2017-12-21 at 10:08 +0800, honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org wrote:
> From: Honghui Zhang <honghui.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> 
> Two fixups for mediatek's host bridge:
> The first patch fixup the IRQ handle routine to avoid IRQ reentry which
> may exist for both MT2712 and MT7622.
> The second patch fixup class type for MT7622.
> 

Sorry about the noise, to the wrong mail group, please ignore this.
thanks.

> Change Since v1:
>  - Add the second patch.
>  - Make the first patch's commit message more standard.
> 
> Honghui Zhang (2):
>   PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
>   PCI: mediatek: Fixup class type for MT7622
> 
>  drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:13   ` Honghui Zhang
  0 siblings, 0 replies; 16+ messages in thread
From: Honghui Zhang @ 2017-12-21  2:13 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, 2017-12-21 at 10:08 +0800, honghui.zhang at mediatek.com wrote:
> From: Honghui Zhang <honghui.zhang@mediatek.com>
> 
> Two fixups for mediatek's host bridge:
> The first patch fixup the IRQ handle routine to avoid IRQ reentry which
> may exist for both MT2712 and MT7622.
> The second patch fixup class type for MT7622.
> 

Sorry about the noise, to the wrong mail group, please ignore this.
thanks.

> Change Since v1:
>  - Add the second patch.
>  - Make the first patch's commit message more standard.
> 
> Honghui Zhang (2):
>   PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
>   PCI: mediatek: Fixup class type for MT7622
> 
>  drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:11 ` honghui.zhang
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang @ 2017-12-21  2:11 UTC (permalink / raw)
  To: bhelgaas, matthias.bgg, linux-arm-kernel, linux-mediatek,
	linux-pci, linux-kernel, devicetree, yingjoe.chen, eddie.huang,
	ryder.lee, lorenzo.pieralisi
  Cc: honghui.zhang, hongkun.cao, youlin.pei, yong.wu, yt.shen,
	sean.wang, xinping.qian

From: Honghui Zhang <honghui.zhang@mediatek.com>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:11 ` honghui.zhang
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang @ 2017-12-21  2:11 UTC (permalink / raw)
  To: bhelgaas, matthias.bgg, linux-arm-kernel, linux-mediatek,
	linux-pci, linux-kernel, devicetree, yingjoe.chen, eddie.huang,
	ryder.lee, lorenzo.pieralisi
  Cc: honghui.zhang, hongkun.cao, youlin.pei, yong.wu, yt.shen,
	sean.wang, xinping.qian

From: Honghui Zhang <honghui.zhang@mediatek.com>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:11 ` honghui.zhang
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang @ 2017-12-21  2:11 UTC (permalink / raw)
  To: bhelgaas, matthias.bgg, linux-arm-kernel, linux-mediatek,
	linux-pci, linux-kernel, devicetree, yingjoe.chen, eddie.huang,
	ryder.lee, lorenzo.pieralisi
  Cc: youlin.pei, hongkun.cao, sean.wang, xinping.qian, honghui.zhang,
	yt.shen, yong.wu

From: Honghui Zhang <honghui.zhang@mediatek.com>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code
@ 2017-12-21  2:11 ` honghui.zhang
  0 siblings, 0 replies; 16+ messages in thread
From: honghui.zhang at mediatek.com @ 2017-12-21  2:11 UTC (permalink / raw)
  To: linux-arm-kernel

From: Honghui Zhang <honghui.zhang@mediatek.com>

Two fixups for mediatek's host bridge:
The first patch fixup the IRQ handle routine to avoid IRQ reentry which
may exist for both MT2712 and MT7622.
The second patch fixup class type for MT7622.

Change Since v1:
 - Add the second patch.
 - Make the first patch's commit message more standard.

Honghui Zhang (2):
  PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry
  PCI: mediatek: Fixup class type for MT7622

 drivers/pci/host/pcie-mediatek.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

-- 
2.6.4

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2017-12-21  2:13 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-21  2:08 [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code honghui.zhang
2017-12-21  2:08 ` honghui.zhang at mediatek.com
2017-12-21  2:08 ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
2017-12-21  2:08 ` [PATCH v2 1/2] PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry honghui.zhang
2017-12-21  2:08   ` honghui.zhang at mediatek.com
2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
2017-12-21  2:08 ` [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622 honghui.zhang
2017-12-21  2:08   ` honghui.zhang at mediatek.com
2017-12-21  2:08   ` honghui.zhang-NuS5LvNUpcJWk0Htik3J/w
2017-12-21  2:13 ` [PATCH v2 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code Honghui Zhang
2017-12-21  2:13   ` Honghui Zhang
2017-12-21  2:13   ` Honghui Zhang
2017-12-21  2:11 honghui.zhang
2017-12-21  2:11 ` honghui.zhang at mediatek.com
2017-12-21  2:11 ` honghui.zhang
2017-12-21  2:11 ` honghui.zhang

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