From: Dong Aisheng <aisheng.dong@nxp.com> To: <linux-clk@vger.kernel.org> Cc: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <sboyd@codeaurora.org>, <mturquette@baylibre.com>, <shawnguo@kernel.org>, <Anson.Huang@nxp.com>, <ping.bai@nxp.com>, <linux-imx@nxp.com>, <fabio.estevam@nxp.com>, Dong Aisheng <aisheng.dong@nxp.com> Subject: [PATCH V3 02/10] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support Date: Fri, 19 Jan 2018 21:11:02 +0800 [thread overview] Message-ID: <1516367470-24340-3-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1516367470-24340-1-git-send-email-aisheng.dong@nxp.com> Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and denominator value in register are start from 0. This can be used to support frac dividers like below: Divider output clock = Divider input clock x [(frac +1) / (div +1)] where frac/div in register is: 000b - Divide by 1. 001b - Divide by 2. 010b - Divide by 3. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- ChangeLog: v2->v3: * no changes v1->v2: * improve comments suggested by Stephen --- drivers/clk/clk-fractional-divider.c | 10 ++++++++++ include/linux/clk-provider.h | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index fdf625f..7ccde6b 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -40,6 +40,11 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, m = (val & fd->mmask) >> fd->mshift; n = (val & fd->nmask) >> fd->nshift; + if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { + m++; + n++; + } + if (!n || !m) return parent_rate; @@ -103,6 +108,11 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), &m, &n); + if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { + m--; + n--; + } + if (fd->lock) spin_lock_irqsave(fd->lock, flags); else diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 68ccd36..cb55b67 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -566,6 +566,12 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw); * @lock: register lock * * Clock with adjustable fractional divider affecting its output frequency. + * + * Flags: + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the numerator and denominator + * is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED + * is set then the numerator and denominator are both the value read + * plus one. */ struct clk_fractional_divider { struct clk_hw hw; @@ -585,6 +591,8 @@ struct clk_fractional_divider { #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw) +#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0) + extern const struct clk_ops clk_fractional_divider_ops; struct clk *clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: aisheng.dong@nxp.com (Dong Aisheng) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V3 02/10] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support Date: Fri, 19 Jan 2018 21:11:02 +0800 [thread overview] Message-ID: <1516367470-24340-3-git-send-email-aisheng.dong@nxp.com> (raw) In-Reply-To: <1516367470-24340-1-git-send-email-aisheng.dong@nxp.com> Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and denominator value in register are start from 0. This can be used to support frac dividers like below: Divider output clock = Divider input clock x [(frac +1) / (div +1)] where frac/div in register is: 000b - Divide by 1. 001b - Divide by 2. 010b - Divide by 3. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- ChangeLog: v2->v3: * no changes v1->v2: * improve comments suggested by Stephen --- drivers/clk/clk-fractional-divider.c | 10 ++++++++++ include/linux/clk-provider.h | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index fdf625f..7ccde6b 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -40,6 +40,11 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, m = (val & fd->mmask) >> fd->mshift; n = (val & fd->nmask) >> fd->nshift; + if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { + m++; + n++; + } + if (!n || !m) return parent_rate; @@ -103,6 +108,11 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), &m, &n); + if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { + m--; + n--; + } + if (fd->lock) spin_lock_irqsave(fd->lock, flags); else diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 68ccd36..cb55b67 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -566,6 +566,12 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw); * @lock: register lock * * Clock with adjustable fractional divider affecting its output frequency. + * + * Flags: + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the numerator and denominator + * is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED + * is set then the numerator and denominator are both the value read + * plus one. */ struct clk_fractional_divider { struct clk_hw hw; @@ -585,6 +591,8 @@ struct clk_fractional_divider { #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw) +#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0) + extern const struct clk_ops clk_fractional_divider_ops; struct clk *clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, -- 2.7.4
next prev parent reply other threads:[~2018-01-19 13:11 UTC|newest] Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-01-19 13:11 [PATCH V3 00/10] clk: add imx7ulp clk support Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 01/10] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE " Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-23 11:03 ` Jerome Brunet 2018-01-23 11:03 ` Jerome Brunet 2018-01-23 12:21 ` Dong Aisheng 2018-01-23 12:21 ` Dong Aisheng 2018-01-23 13:10 ` Jerome Brunet 2018-01-23 13:10 ` Jerome Brunet 2018-01-23 13:10 ` Jerome Brunet 2018-01-19 13:11 ` Dong Aisheng [this message] 2018-01-19 13:11 ` [PATCH V3 02/10] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 03/10] clk: imx: add pllv4 support Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 04/10] clk: imx: add pfdv2 support Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 05/10] clk: imx: add composite clk support Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 06/10] dt-bindings: clock: add imx7ulp clock binding doc Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 07/10] clk: imx: make mux parent strings const Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 08/10] clk: imx: implement new clk_hw based APIs Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 09/10] clk: imx: add imx7ulp clk driver Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` [PATCH V3 10/10] add imx7ulp support Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:11 ` Dong Aisheng 2018-01-19 13:19 ` A.s. Dong 2018-01-19 13:19 ` A.s. Dong 2018-01-19 13:19 ` A.s. Dong 2018-01-25 13:22 ` Fabio Estevam 2018-01-25 13:22 ` Fabio Estevam 2018-01-25 13:46 ` A.s. Dong 2018-01-25 13:46 ` A.s. Dong 2018-01-25 13:46 ` A.s. Dong
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1516367470-24340-3-git-send-email-aisheng.dong@nxp.com \ --to=aisheng.dong@nxp.com \ --cc=Anson.Huang@nxp.com \ --cc=fabio.estevam@nxp.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-imx@nxp.com \ --cc=linux-kernel@vger.kernel.org \ --cc=mturquette@baylibre.com \ --cc=ping.bai@nxp.com \ --cc=sboyd@codeaurora.org \ --cc=shawnguo@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.