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From: Michael Clark <mjc@sifive.com>
To: qemu-devel@nongnu.org
Cc: Michael Clark <mjc@sifive.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	RISC-V Patches <patches@groups.riscv.org>
Subject: [Qemu-devel] [PATCH v5 06/23] Softfloat support for IEEE 754-201x minimumNumber/maximumNumber
Date: Thu,  8 Feb 2018 14:28:31 +1300	[thread overview]
Message-ID: <1518053328-34687-7-git-send-email-mjc@sifive.com> (raw)
In-Reply-To: <1518053328-34687-1-git-send-email-mjc@sifive.com>

QEMU currently implements IEEE 754-2008 minNum/maxNum. This patch adds
support for IEEE 754-201x minimumNumber/maximumNumber which is required
by the RISC-V port.

minNum(x, y) is defined as
- min(x, y) if neither is NaN
- if one of x and y is a number and one is qNaN, return the number
- if both are qNaN, or either is sNaN, return NaN

minimumNumber(x, y) is defined as
- min(x, y) if neither is NaN
- if one of x and y is a number and one is qNaN or sNaN, return the number
- if both are NaN, return the number

Both functions signal the invalid exception on sNaN inputs.

Signed-off-by: Michael Clark <mjc@sifive.com>
---
 fpu/softfloat.c         | 41 +++++++++++++++++++++++++++++++++++------
 include/fpu/softfloat.h |  4 ++++
 2 files changed, 39 insertions(+), 6 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 433c5da..5793cc9 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -7675,6 +7675,9 @@ int float128_compare_quiet(float128 a, float128 b, float_status *status)
  * minnummag() and maxnummag() functions correspond to minNumMag()
  * and minNumMag() from the IEEE-754 2008.
  */
+
+enum { ieee2008 = 1, ieee201x = 2 };
+
 #define MINMAX(s)                                                       \
 static inline float ## s float ## s ## _minmax(float ## s a, float ## s b,     \
                                                int ismin, int isieee,   \
@@ -7687,12 +7690,26 @@ static inline float ## s float ## s ## _minmax(float ## s a, float ## s b,     \
     b = float ## s ## _squash_input_denormal(b, status);                \
     if (float ## s ## _is_any_nan(a) ||                                 \
         float ## s ## _is_any_nan(b)) {                                 \
-        if (isieee) {                                                   \
+        if (isieee == ieee2008) {                                       \
             if (float ## s ## _is_quiet_nan(a, status) &&               \
                 !float ## s ##_is_any_nan(b)) {                         \
                 return b;                                               \
             } else if (float ## s ## _is_quiet_nan(b, status) &&        \
-                       !float ## s ## _is_any_nan(a)) {                \
+                       !float ## s ## _is_any_nan(a)) {                 \
+                return a;                                               \
+            }                                                           \
+        } else if (isieee == ieee201x) {                                \
+            if (float ## s ## _is_any_nan(a) &&                         \
+                !float ## s ##_is_any_nan(b)) {                         \
+                if (!float ## s ## _is_quiet_nan(a, status)) {          \
+                    float_raise(float_flag_invalid, status);            \
+                }                                                       \
+                return b;                                               \
+            } else if (float ## s ## _is_any_nan(b) &&                  \
+                       !float ## s ## _is_any_nan(a)) {                 \
+                if (!float ## s ## _is_quiet_nan(b, status)) {          \
+                    float_raise(float_flag_invalid, status);            \
+                }                                                       \
                 return a;                                               \
             }                                                           \
         }                                                               \
@@ -7743,25 +7760,37 @@ float ## s float ## s ## _max(float ## s a, float ## s b,               \
 float ## s float ## s ## _minnum(float ## s a, float ## s b,            \
                                  float_status *status)                  \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 1, 1, 0, status);                \
+    return float ## s ## _minmax(a, b, 1, ieee2008, 0, status);         \
 }                                                                       \
                                                                         \
 float ## s float ## s ## _maxnum(float ## s a, float ## s b,            \
                                  float_status *status)                  \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 0, 1, 0, status);                \
+    return float ## s ## _minmax(a, b, 0, ieee2008, 0, status);         \
+}                                                                       \
+                                                                        \
+float ## s float ## s ## _minimumnumber(float ## s a, float ## s b,     \
+                                 float_status *status)                  \
+{                                                                       \
+    return float ## s ## _minmax(a, b, 1, ieee201x, 0, status);         \
+}                                                                       \
+                                                                        \
+float ## s float ## s ## _maximumnumber(float ## s a, float ## s b,     \
+                                 float_status *status)                  \
+{                                                                       \
+    return float ## s ## _minmax(a, b, 0, ieee201x, 0, status);         \
 }                                                                       \
                                                                         \
 float ## s float ## s ## _minnummag(float ## s a, float ## s b,         \
                                     float_status *status)               \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 1, 1, 1, status);                \
+    return float ## s ## _minmax(a, b, 1, ieee2008, 1, status);         \
 }                                                                       \
                                                                         \
 float ## s float ## s ## _maxnummag(float ## s a, float ## s b,         \
                                     float_status *status)               \
 {                                                                       \
-    return float ## s ## _minmax(a, b, 0, 1, 1, status);                \
+    return float ## s ## _minmax(a, b, 0, ieee2008, 1, status);         \
 }
 
 MINMAX(32)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 0f96a0e..e0d0259 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -424,6 +424,8 @@ float32 float32_min(float32, float32, float_status *status);
 float32 float32_max(float32, float32, float_status *status);
 float32 float32_minnum(float32, float32, float_status *status);
 float32 float32_maxnum(float32, float32, float_status *status);
+float32 float32_minimumnumber(float32, float32, float_status *status);
+float32 float32_maximumnumber(float32, float32, float_status *status);
 float32 float32_minnummag(float32, float32, float_status *status);
 float32 float32_maxnummag(float32, float32, float_status *status);
 int float32_is_quiet_nan(float32, float_status *status);
@@ -536,6 +538,8 @@ float64 float64_min(float64, float64, float_status *status);
 float64 float64_max(float64, float64, float_status *status);
 float64 float64_minnum(float64, float64, float_status *status);
 float64 float64_maxnum(float64, float64, float_status *status);
+float64 float64_minimumnumber(float64, float64, float_status *status);
+float64 float64_maximumnumber(float64, float64, float_status *status);
 float64 float64_minnummag(float64, float64, float_status *status);
 float64 float64_maxnummag(float64, float64, float_status *status);
 int float64_is_quiet_nan(float64 a, float_status *status);
-- 
2.7.0

  parent reply	other threads:[~2018-02-08  1:30 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-08  1:28 [Qemu-devel] [PATCH v5 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 01/23] RISC-V Maintainers Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 02/23] RISC-V ELF Machine Definition Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 03/23] RISC-V CPU Core Definition Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 04/23] RISC-V Disassembler Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 05/23] RISC-V CPU Helpers Michael Clark
2018-02-08  1:28 ` Michael Clark [this message]
2018-02-08 14:35   ` [Qemu-devel] [PATCH v5 06/23] Softfloat support for IEEE 754-201x minimumNumber/maximumNumber Richard Henderson
2018-02-08 21:03     ` Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 07/23] RISC-V FPU Support Michael Clark
2018-02-08 14:38   ` Richard Henderson
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 08/23] RISC-V GDB Stub Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 09/23] RISC-V TCG Code Generation Michael Clark
2018-02-13 21:55   ` Emilio G. Cota
2018-02-13 22:10     ` Richard Henderson
2018-02-14  0:10       ` Emilio G. Cota
2018-02-14 19:14         ` Richard Henderson
2018-02-14 19:52           ` Emilio G. Cota
2018-02-14 21:13             ` Richard Henderson
2018-02-14 23:23               ` Emilio G. Cota
2018-02-13 21:57   ` Emilio G. Cota
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 10/23] RISC-V Physical Memory Protection Michael Clark
2018-02-08 14:40   ` Richard Henderson
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 11/23] RISC-V Linux User Emulation Michael Clark
2018-02-08 16:20   ` Richard Henderson
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 12/23] RISC-V HTIF Console Michael Clark
2018-02-08 16:35   ` Richard Henderson
2018-02-09  7:33     ` Michael Clark
2018-02-09  8:09       ` Michael Clark
2018-02-09  9:08         ` Michael Clark
2018-02-09 19:38           ` Richard Henderson
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 13/23] RISC-V HART Array Michael Clark
2018-02-08 16:37   ` Richard Henderson
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 14/23] SiFive RISC-V CLINT Block Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 15/23] SiFive RISC-V PLIC Block Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 16/23] RISC-V Spike Machines Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 17/23] RISC-V VirtIO Machine Michael Clark
2018-02-08 10:36   ` Igor Mammedov
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 18/23] SiFive RISC-V UART Device Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 19/23] SiFive RISC-V PRCI Block Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 20/23] SiFive RISC-V Test Finisher Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 21/23] SiFive Freedom E300 RISC-V Machine Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 22/23] SiFive Freedom U500 " Michael Clark
2018-02-08  1:28 ` [Qemu-devel] [PATCH v5 23/23] RISC-V Build Infrastructure Michael Clark
2018-02-08  1:55 ` [Qemu-devel] [PATCH v5 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-08  1:56   ` Michael Clark
2018-02-08  2:04 ` no-reply
2018-02-09 19:42 ` Richard Henderson
2018-02-10  0:04   ` Michael Clark
2018-02-17 13:30 ` Richard W.M. Jones

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