[PATCH v2 1/2] drm/amd/dc: Use pp interface to apply display cfg in DC

[PATCH v2 1/2] drm/amd/dc: Use pp interface to apply display cfg in DC

[Rex Zhu]

v2: drop the change for amdgpu_pm_computer_clocks in
amdgpu_pm.c

Change-Id: I362213550487c10746b058c9162b10df49777a47
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index 89342b4..a719c6d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -135,8 +135,7 @@ bool dm_pp_apply_display_requirements(
 				adev->powerplay.pp_handle,
 				&adev->pm.pm_display_cfg);
 
-		/* TODO: replace by a separate call to 'apply display cfg'? */
-		amdgpu_pm_compute_clocks(adev);
+		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);
 	}
 
 	return true;
-- 
1.9.1

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[PATCH v2 2/2] drm/amdgpu: Set pm_display_cfg in non-dc mode

[Rex Zhu]

v2: keep the powerplay support in amdgpu_pm_compute_clocks

those parameters are needed by powerplay
so we can remove the wrapper cgs interface for
get display info

Change-Id: Idd332a4dbd34f72767a64d205df2affdb456042b
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 21 +++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c  | 23 ++++++++---------------
 3 files changed, 30 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index e997ebbe43..ead04da 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -115,6 +115,27 @@ void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
 	pr_cont("\n");
 }
 
+u32 amdgpu_dpm_get_active_displays(struct amdgpu_device *adev)
+{
+	struct drm_device *ddev = adev->ddev;
+	struct drm_crtc *crtc;
+	struct amdgpu_crtc *amdgpu_crtc;
+
+	adev->pm.dpm.new_active_crtcs = 0;
+	adev->pm.dpm.new_active_crtc_count = 0;
+	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
+		list_for_each_entry(crtc,
+				    &ddev->mode_config.crtc_list, head) {
+			amdgpu_crtc = to_amdgpu_crtc(crtc);
+			if (amdgpu_crtc->enabled) {
+				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
+				adev->pm.dpm.new_active_crtc_count++;
+			}
+		}
+	}
+	return 0;
+}
+
 
 u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
 {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 643d008..85b14e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -482,6 +482,7 @@ void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
 				struct amdgpu_ps *rps);
 u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev);
 u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev);
+u32 amdgpu_dpm_get_active_displays(struct amdgpu_device *adev);
 bool amdgpu_is_uvd_state(u32 class, u32 class2);
 void amdgpu_calculate_u_and_p(u32 i, u32 r_c, u32 p_b,
 			      u32 *p, u32 *u);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 361975c..c4a490c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1658,9 +1658,6 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
 
 void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
 {
-	struct drm_device *ddev = adev->ddev;
-	struct drm_crtc *crtc;
-	struct amdgpu_crtc *amdgpu_crtc;
 	int i = 0;
 
 	if (!adev->pm.dpm_enabled)
@@ -1675,22 +1672,18 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
 			amdgpu_fence_wait_empty(ring);
 	}
 
+	mutex_lock(&adev->pm.mutex);
+	amdgpu_dpm_get_active_displays(adev);
+	mutex_unlock(&adev->pm.mutex);
+
+	adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtcs;
+	adev->pm.pm_display_cfg.vrefresh = amdgpu_dpm_get_vrefresh(adev);
+	adev->pm.pm_display_cfg.min_vblank_time = amdgpu_dpm_get_vblank_time(adev);
+
 	if (adev->powerplay.pp_funcs->dispatch_tasks) {
 		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);
 	} else {
 		mutex_lock(&adev->pm.mutex);
-		adev->pm.dpm.new_active_crtcs = 0;
-		adev->pm.dpm.new_active_crtc_count = 0;
-		if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
-			list_for_each_entry(crtc,
-					    &ddev->mode_config.crtc_list, head) {
-				amdgpu_crtc = to_amdgpu_crtc(crtc);
-				if (amdgpu_crtc->enabled) {
-					adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
-					adev->pm.dpm.new_active_crtc_count++;
-				}
-			}
-		}
 		/* update battery/ac status */
 		if (power_supply_is_system_supplied() > 0)
 			adev->pm.dpm.ac_power = true;
-- 
1.9.1

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Re: [PATCH v2 2/2] drm/amdgpu: Set pm_display_cfg in non-dc mode

[Huang Rui]

On Tue, Mar 27, 2018 at 11:32:30AM +0800, Rex Zhu wrote:
> v2: keep the powerplay support in amdgpu_pm_compute_clocks
> 
> those parameters are needed by powerplay
> so we can remove the wrapper cgs interface for
> get display info
> 
> Change-Id: Idd332a4dbd34f72767a64d205df2affdb456042b
> Acked-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>

Reviewed-by: Huang Rui <ray.huang@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 21 +++++++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c  | 23 ++++++++---------------
>  3 files changed, 30 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> index e997ebbe43..ead04da 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> @@ -115,6 +115,27 @@ void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
>  	pr_cont("\n");
>  }
>  
> +u32 amdgpu_dpm_get_active_displays(struct amdgpu_device *adev)
> +{
> +	struct drm_device *ddev = adev->ddev;
> +	struct drm_crtc *crtc;
> +	struct amdgpu_crtc *amdgpu_crtc;
> +
> +	adev->pm.dpm.new_active_crtcs = 0;
> +	adev->pm.dpm.new_active_crtc_count = 0;
> +	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
> +		list_for_each_entry(crtc,
> +				    &ddev->mode_config.crtc_list, head) {
> +			amdgpu_crtc = to_amdgpu_crtc(crtc);
> +			if (amdgpu_crtc->enabled) {
> +				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
> +				adev->pm.dpm.new_active_crtc_count++;
> +			}
> +		}
> +	}
> +	return 0;
> +}
> +
>  
>  u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
>  {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
> index 643d008..85b14e7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
> @@ -482,6 +482,7 @@ void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
>  				struct amdgpu_ps *rps);
>  u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev);
>  u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev);
> +u32 amdgpu_dpm_get_active_displays(struct amdgpu_device *adev);
>  bool amdgpu_is_uvd_state(u32 class, u32 class2);
>  void amdgpu_calculate_u_and_p(u32 i, u32 r_c, u32 p_b,
>  			      u32 *p, u32 *u);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> index 361975c..c4a490c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> @@ -1658,9 +1658,6 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
>  
>  void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
>  {
> -	struct drm_device *ddev = adev->ddev;
> -	struct drm_crtc *crtc;
> -	struct amdgpu_crtc *amdgpu_crtc;
>  	int i = 0;
>  
>  	if (!adev->pm.dpm_enabled)
> @@ -1675,22 +1672,18 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
>  			amdgpu_fence_wait_empty(ring);
>  	}
>  
> +	mutex_lock(&adev->pm.mutex);
> +	amdgpu_dpm_get_active_displays(adev);
> +	mutex_unlock(&adev->pm.mutex);
> +
> +	adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtcs;
> +	adev->pm.pm_display_cfg.vrefresh = amdgpu_dpm_get_vrefresh(adev);
> +	adev->pm.pm_display_cfg.min_vblank_time = amdgpu_dpm_get_vblank_time(adev);
> +
>  	if (adev->powerplay.pp_funcs->dispatch_tasks) {
>  		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);
>  	} else {
>  		mutex_lock(&adev->pm.mutex);
> -		adev->pm.dpm.new_active_crtcs = 0;
> -		adev->pm.dpm.new_active_crtc_count = 0;
> -		if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
> -			list_for_each_entry(crtc,
> -					    &ddev->mode_config.crtc_list, head) {
> -				amdgpu_crtc = to_amdgpu_crtc(crtc);
> -				if (amdgpu_crtc->enabled) {
> -					adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
> -					adev->pm.dpm.new_active_crtc_count++;
> -				}
> -			}
> -		}
>  		/* update battery/ac status */
>  		if (power_supply_is_system_supplied() > 0)
>  			adev->pm.dpm.ac_power = true;
> -- 
> 1.9.1
> 
> _______________________________________________
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