[PATCH 1/7] test/crypto: add macro for dpaa sec device name

[PATCH 1/7] test/crypto: add macro for dpaa sec device name

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Fixes: b674d6d0381a ("test/crypto: add dpaa crypto test cases")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 test/test/test_cryptodev.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test/test/test_cryptodev.h b/test/test/test_cryptodev.h
index 8cdc087..b74f3a1 100644
--- a/test/test/test_cryptodev.h
+++ b/test/test/test_cryptodev.h
@@ -59,6 +59,7 @@
 #define CRYPTODEV_NAME_ZUC_PMD		crypto_zuc
 #define CRYPTODEV_NAME_ARMV8_PMD	crypto_armv8
 #define CRYPTODEV_NAME_DPAA2_SEC_PMD	crypto_dpaa2_sec
+#define CRYPTODEV_NAME_DPAA_SEC_PMD	crypto_dpaa_sec
 #define CRYPTODEV_NAME_SCHEDULER_PMD	crypto_scheduler
 #define CRYPTODEV_NAME_MRVL_PMD		crypto_mrvl
 
-- 
2.7.4

[PATCH 2/7] app/crypto-perf: fix excess crypto device error

[Hemant Agrawal]

If number of available devices are more than logical core,
no need to through an error. Just use the less number of
devices.

Fixes: f8be1786b1b8 ("app/crypto-perf: introduce performance test application")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 app/test-crypto-perf/main.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/app/test-crypto-perf/main.c b/app/test-crypto-perf/main.c
index 019d835..dd666f4 100644
--- a/app/test-crypto-perf/main.c
+++ b/app/test-crypto-perf/main.c
@@ -80,12 +80,9 @@ cperf_initialize_cryptodev(struct cperf_options *opts, uint8_t *enabled_cdevs,
 
 	nb_lcores = rte_lcore_count() - 1;
 
-	if (enabled_cdev_count > nb_lcores) {
-		printf("Number of capable crypto devices (%d) "
-				"has to be less or equal to number of slave "
-				"cores (%d)\n", enabled_cdev_count, nb_lcores);
-		return -EINVAL;
-	}
+	/* Use less number of devices, if more area available than cores.*/
+	if (enabled_cdev_count > nb_lcores)
+		enabled_cdev_count = nb_lcores;
 
 	/* Create a mempool shared by all the devices */
 	uint32_t max_sess_size = 0, sess_size;
-- 
2.7.4

[PATCH 3/7] app/crypto-perf: enable it for non default mempool

[Hemant Agrawal]

The current code usages the default mempool ops while
creating the mempool for crypto usages. Adding the support
for best_mempool_ops to enable it for devices using
non default mempools.

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 app/test-crypto-perf/cperf_test_common.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/app/test-crypto-perf/cperf_test_common.c b/app/test-crypto-perf/cperf_test_common.c
index 21cb1c2..fa1dc49 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -3,6 +3,7 @@
  */
 
 #include <rte_malloc.h>
+#include <rte_mbuf_pool_ops.h>
 
 #include "cperf_test_common.h"
 
@@ -124,6 +125,7 @@ cperf_alloc_common_memory(const struct cperf_options *options,
 			uint32_t *dst_buf_offset,
 			struct rte_mempool **pool)
 {
+	const char *mp_ops_name;
 	char pool_name[32] = "";
 	int ret;
 
@@ -193,8 +195,10 @@ cperf_alloc_common_memory(const struct cperf_options *options,
 		return -1;
 	}
 
+	mp_ops_name = rte_mbuf_best_mempool_ops();
+
 	ret = rte_mempool_set_ops_byname(*pool,
-		RTE_MBUF_DEFAULT_MEMPOOL_OPS, NULL);
+		mp_ops_name, NULL);
 	if (ret != 0) {
 		RTE_LOG(ERR, USER1,
 			 "Error setting mempool handler for device %u\n",
-- 
2.7.4

[PATCH 4/7] crypto/dpaa_sec: add macro for device name

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h b/drivers/crypto/dpaa_sec/dpaa_sec.h
index f45b36c..b8f7bd2 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.h
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
@@ -7,6 +7,9 @@
 #ifndef _DPAA_SEC_H_
 #define _DPAA_SEC_H_
 
+#define CRYPTODEV_NAME_DPAA_SEC_PMD	crypto_dpaa_sec
+/**< NXP DPAA - SEC PMD device name */
+
 #define NUM_POOL_CHANNELS	4
 #define DPAA_SEC_BURST		7
 #define DPAA_SEC_ALG_UNSUPPORT	(-1)
-- 
2.7.4

[PATCH 5/7] crypto/dpaa_sec: fix to check the portal presence

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Adding a check to do portal configuration if not already
configured before packet enqueue. This check is only done
during dpaa_sec_attach_sess_q for initial packets,
so this change wont affect the data path and hence performance.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index c5191ce..eebb905 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1759,7 +1759,13 @@ dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess)
 		PMD_DRV_LOG(ERR, "Unable to prepare sec cdb");
 		return -1;
 	}
-
+	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
+		ret = rte_dpaa_portal_init((void *)0);
+		if (ret) {
+			PMD_DRV_LOG(ERR, "Failure in affining portal");
+			return ret;
+		}
+	}
 	ret = dpaa_sec_init_rx(sess->inq, dpaa_mem_vtop(&sess->cdb),
 			       qman_fq_fqid(&qp->outq));
 	if (ret)
-- 
2.7.4

[PATCH 6/7] crypto/dpaa_sec: fix incorrect NULL check

[Hemant Agrawal]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: akhil.goyal@nxp.com
Cc: stable@dpdk.org

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index eebb905..2df5e5c 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2252,11 +2252,12 @@ struct rte_security_ops dpaa_sec_security_ops = {
 static int
 dpaa_sec_uninit(struct rte_cryptodev *dev)
 {
-	struct dpaa_sec_dev_private *internals = dev->data->dev_private;
+	struct dpaa_sec_dev_private *internals;
 
 	if (dev == NULL)
 		return -ENODEV;
 
+	internals = dev->data->dev_private;
 	rte_free(dev->security_ctx);
 
 	rte_mempool_free(internals->ctx_pool);
-- 
2.7.4

[PATCH 7/7] crypto/dpaa_sec: move mempool allocation to config

[Hemant Agrawal]

From: Akhil Goyal <akhil.goyal@nxp.com>

Currently, the context mempools are allocated during device probe. Thus,
even if the DPAA SEC devices are not used, any application would still
allocate the memory required for working with the contexts.

This patch moves the allocation to configuration time so that when the
CAAM devices are configured, this allocation would be done.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Tested-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 49 ++++++++++++++++++++++++++------------
 1 file changed, 34 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 2df5e5c..c7f7cdf 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2169,11 +2169,32 @@ dpaa_sec_security_session_destroy(void *dev __rte_unused,
 
 
 static int
-dpaa_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
+dpaa_sec_dev_configure(struct rte_cryptodev *dev,
 		       struct rte_cryptodev_config *config __rte_unused)
 {
+
+	char str[20];
+	struct dpaa_sec_dev_private *internals;
+
 	PMD_INIT_FUNC_TRACE();
 
+	internals = dev->data->dev_private;
+	sprintf(str, "ctx_pool_%d", dev->data->dev_id);
+	if (!internals->ctx_pool) {
+		internals->ctx_pool = rte_mempool_create((const char *)str,
+							CTX_POOL_NUM_BUFS,
+							CTX_POOL_BUF_SIZE,
+							CTX_POOL_CACHE_SIZE, 0,
+							NULL, NULL, NULL, NULL,
+							SOCKET_ID_ANY, 0);
+		if (!internals->ctx_pool) {
+			RTE_LOG(ERR, PMD, "%s create failed\n", str);
+			return -ENOMEM;
+		}
+	} else
+		RTE_LOG(INFO, PMD, "mempool already created for dev_id : %d\n",
+			dev->data->dev_id);
+
 	return 0;
 }
 
@@ -2191,9 +2212,19 @@ dpaa_sec_dev_stop(struct rte_cryptodev *dev __rte_unused)
 }
 
 static int
-dpaa_sec_dev_close(struct rte_cryptodev *dev __rte_unused)
+dpaa_sec_dev_close(struct rte_cryptodev *dev)
 {
+	struct dpaa_sec_dev_private *internals;
+
 	PMD_INIT_FUNC_TRACE();
+
+	if (dev == NULL)
+		return -ENOMEM;
+
+	internals = dev->data->dev_private;
+	rte_mempool_free(internals->ctx_pool);
+	internals->ctx_pool = NULL;
+
 	return 0;
 }
 
@@ -2260,6 +2291,7 @@ dpaa_sec_uninit(struct rte_cryptodev *dev)
 	internals = dev->data->dev_private;
 	rte_free(dev->security_ctx);
 
+	/* In case close has been called, internals->ctx_pool would be NULL */
 	rte_mempool_free(internals->ctx_pool);
 	rte_free(internals);
 
@@ -2277,7 +2309,6 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
 	struct dpaa_sec_qp *qp;
 	uint32_t i, flags;
 	int ret;
-	char str[20];
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -2337,18 +2368,6 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
 		}
 	}
 
-	sprintf(str, "ctx_pool_%d", cryptodev->data->dev_id);
-	internals->ctx_pool = rte_mempool_create((const char *)str,
-			CTX_POOL_NUM_BUFS,
-			CTX_POOL_BUF_SIZE,
-			CTX_POOL_CACHE_SIZE, 0,
-			NULL, NULL, NULL, NULL,
-			SOCKET_ID_ANY, 0);
-	if (!internals->ctx_pool) {
-		RTE_LOG(ERR, PMD, "%s create failed\n", str);
-		goto init_error;
-	}
-
 	PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
 	return 0;
 
-- 
2.7.4

Re: [PATCH 2/7] app/crypto-perf: fix excess crypto device error

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Hemant Agrawal [mailto:hemant.agrawal@nxp.com]
> Sent: Tuesday, March 27, 2018 1:01 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> akhil.goyal@nxp.com
> Subject: [PATCH 2/7] app/crypto-perf: fix excess crypto device error
> 
> If number of available devices are more than logical core, no need to through an
> error. Just use the less number of devices.
> 
> Fixes: f8be1786b1b8 ("app/crypto-perf: introduce performance test
> application")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Re: [PATCH 1/7] test/crypto: add macro for dpaa sec device name

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Hemant Agrawal [mailto:hemant.agrawal@nxp.com]
> Sent: Tuesday, March 27, 2018 1:01 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> akhil.goyal@nxp.com
> Subject: [PATCH 1/7] test/crypto: add macro for dpaa sec device name
> 
> From: Ashish Jain <ashish.jain@nxp.com>
> 
> Fixes: b674d6d0381a ("test/crypto: add dpaa crypto test cases")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Ashish Jain <ashish.jain@nxp.com>

Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Re: [PATCH 3/7] app/crypto-perf: enable it for non default mempool

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Hemant Agrawal [mailto:hemant.agrawal@nxp.com]
> Sent: Tuesday, March 27, 2018 1:01 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> akhil.goyal@nxp.com
> Subject: [PATCH 3/7] app/crypto-perf: enable it for non default mempool
> 
> The current code usages the default mempool ops while creating the mempool
> for crypto usages. Adding the support for best_mempool_ops to enable it for
> devices using non default mempools.
> 
> Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Re: [PATCH 3/7] app/crypto-perf: enable it for non default mempool

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Hemant Agrawal [mailto:hemant.agrawal@nxp.com]
> Sent: Tuesday, March 27, 2018 1:01 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> akhil.goyal@nxp.com
> Subject: [PATCH 3/7] app/crypto-perf: enable it for non default mempool
> 
> The current code usages the default mempool ops while creating the mempool
> for crypto usages. Adding the support for best_mempool_ops to enable it for
> devices using non default mempools.
> 
> Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

FYI, I added " CFLAGS += -DALLOW_EXPERIMENTAL_API" in the app Makefile,
as that function is marked as experimental, and compilation was broken.

[PATCH v2 1/8] test/crypto: add macro for dpaa sec device name

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Fixes: b674d6d0381a ("test/crypto: add dpaa crypto test cases")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 test/test/test_cryptodev.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test/test/test_cryptodev.h b/test/test/test_cryptodev.h
index 8cdc087..b74f3a1 100644
--- a/test/test/test_cryptodev.h
+++ b/test/test/test_cryptodev.h
@@ -59,6 +59,7 @@
 #define CRYPTODEV_NAME_ZUC_PMD		crypto_zuc
 #define CRYPTODEV_NAME_ARMV8_PMD	crypto_armv8
 #define CRYPTODEV_NAME_DPAA2_SEC_PMD	crypto_dpaa2_sec
+#define CRYPTODEV_NAME_DPAA_SEC_PMD	crypto_dpaa_sec
 #define CRYPTODEV_NAME_SCHEDULER_PMD	crypto_scheduler
 #define CRYPTODEV_NAME_MRVL_PMD		crypto_mrvl
 
-- 
2.7.4

[PATCH v2 2/8] app/crypto-perf: fix excess crypto device error

[Hemant Agrawal]

If number of available devices are more than logical core,
no need to through an error. Just use the less number of
devices.

Fixes: f8be1786b1b8 ("app/crypto-perf: introduce performance test application")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 app/test-crypto-perf/main.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/app/test-crypto-perf/main.c b/app/test-crypto-perf/main.c
index 019d835..dd666f4 100644
--- a/app/test-crypto-perf/main.c
+++ b/app/test-crypto-perf/main.c
@@ -80,12 +80,9 @@ cperf_initialize_cryptodev(struct cperf_options *opts, uint8_t *enabled_cdevs,
 
 	nb_lcores = rte_lcore_count() - 1;
 
-	if (enabled_cdev_count > nb_lcores) {
-		printf("Number of capable crypto devices (%d) "
-				"has to be less or equal to number of slave "
-				"cores (%d)\n", enabled_cdev_count, nb_lcores);
-		return -EINVAL;
-	}
+	/* Use less number of devices, if more area available than cores.*/
+	if (enabled_cdev_count > nb_lcores)
+		enabled_cdev_count = nb_lcores;
 
 	/* Create a mempool shared by all the devices */
 	uint32_t max_sess_size = 0, sess_size;
-- 
2.7.4

[PATCH v2 3/8] app/crypto-perf: enable it for non default mempool

[Hemant Agrawal]

The current code usages the default mempool ops while
creating the mempool for crypto usages. Adding the support
for best_mempool_ops to enable it for devices using
non default mempools.

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
v2: update make to allow experimental APIs

 app/test-crypto-perf/Makefile            | 1 +
 app/test-crypto-perf/cperf_test_common.c | 6 +++++-
 app/test-crypto-perf/meson.build         | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/app/test-crypto-perf/Makefile b/app/test-crypto-perf/Makefile
index 3935aec..28a0cd0 100644
--- a/app/test-crypto-perf/Makefile
+++ b/app/test-crypto-perf/Makefile
@@ -7,6 +7,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
 APP = dpdk-test-crypto-perf
 
 CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
 
 # all source are stored in SRCS-y
 SRCS-y := main.c
diff --git a/app/test-crypto-perf/cperf_test_common.c b/app/test-crypto-perf/cperf_test_common.c
index 21cb1c2..fa1dc49 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -3,6 +3,7 @@
  */
 
 #include <rte_malloc.h>
+#include <rte_mbuf_pool_ops.h>
 
 #include "cperf_test_common.h"
 
@@ -124,6 +125,7 @@ cperf_alloc_common_memory(const struct cperf_options *options,
 			uint32_t *dst_buf_offset,
 			struct rte_mempool **pool)
 {
+	const char *mp_ops_name;
 	char pool_name[32] = "";
 	int ret;
 
@@ -193,8 +195,10 @@ cperf_alloc_common_memory(const struct cperf_options *options,
 		return -1;
 	}
 
+	mp_ops_name = rte_mbuf_best_mempool_ops();
+
 	ret = rte_mempool_set_ops_byname(*pool,
-		RTE_MBUF_DEFAULT_MEMPOOL_OPS, NULL);
+		mp_ops_name, NULL);
 	if (ret != 0) {
 		RTE_LOG(ERR, USER1,
 			 "Error setting mempool handler for device %u\n",
diff --git a/app/test-crypto-perf/meson.build b/app/test-crypto-perf/meson.build
index 6eb22a5..eacd7a0 100644
--- a/app/test-crypto-perf/meson.build
+++ b/app/test-crypto-perf/meson.build
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2018 Intel Corporation
 
+allow_experimental_apis = true
 sources = files('cperf_ops.c',
 		'cperf_options_parsing.c',
 		'cperf_test_common.c',
-- 
2.7.4

[PATCH v2 4/8] crypto/dpaa_sec: add macro for device name

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h b/drivers/crypto/dpaa_sec/dpaa_sec.h
index f45b36c..b8f7bd2 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.h
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
@@ -7,6 +7,9 @@
 #ifndef _DPAA_SEC_H_
 #define _DPAA_SEC_H_
 
+#define CRYPTODEV_NAME_DPAA_SEC_PMD	crypto_dpaa_sec
+/**< NXP DPAA - SEC PMD device name */
+
 #define NUM_POOL_CHANNELS	4
 #define DPAA_SEC_BURST		7
 #define DPAA_SEC_ALG_UNSUPPORT	(-1)
-- 
2.7.4

[PATCH v2 5/8] crypto/dpaa_sec: fix to check the portal presence

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Adding a check to do portal configuration if not already
configured before packet enqueue. This check is only done
during dpaa_sec_attach_sess_q for initial packets,
so this change wont affect the data path and hence performance.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index c5191ce..eebb905 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1759,7 +1759,13 @@ dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess)
 		PMD_DRV_LOG(ERR, "Unable to prepare sec cdb");
 		return -1;
 	}
-
+	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
+		ret = rte_dpaa_portal_init((void *)0);
+		if (ret) {
+			PMD_DRV_LOG(ERR, "Failure in affining portal");
+			return ret;
+		}
+	}
 	ret = dpaa_sec_init_rx(sess->inq, dpaa_mem_vtop(&sess->cdb),
 			       qman_fq_fqid(&qp->outq));
 	if (ret)
-- 
2.7.4

[PATCH v2 6/8] crypto/dpaa_sec: fix incorrect NULL check

[Hemant Agrawal]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: akhil.goyal@nxp.com
Cc: stable@dpdk.org

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index eebb905..2df5e5c 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2252,11 +2252,12 @@ struct rte_security_ops dpaa_sec_security_ops = {
 static int
 dpaa_sec_uninit(struct rte_cryptodev *dev)
 {
-	struct dpaa_sec_dev_private *internals = dev->data->dev_private;
+	struct dpaa_sec_dev_private *internals;
 
 	if (dev == NULL)
 		return -ENODEV;
 
+	internals = dev->data->dev_private;
 	rte_free(dev->security_ctx);
 
 	rte_mempool_free(internals->ctx_pool);
-- 
2.7.4

[PATCH v2 7/8] crypto/dpaa_sec: move mempool allocation to config

[Hemant Agrawal]

From: Akhil Goyal <akhil.goyal@nxp.com>

Currently, the context mempools are allocated during device probe. Thus,
even if the DPAA SEC devices are not used, any application would still
allocate the memory required for working with the contexts.

This patch moves the allocation to configuration time so that when the
CAAM devices are configured, this allocation would be done.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Tested-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 49 ++++++++++++++++++++++++++------------
 1 file changed, 34 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 2df5e5c..c7f7cdf 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2169,11 +2169,32 @@ dpaa_sec_security_session_destroy(void *dev __rte_unused,
 
 
 static int
-dpaa_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
+dpaa_sec_dev_configure(struct rte_cryptodev *dev,
 		       struct rte_cryptodev_config *config __rte_unused)
 {
+
+	char str[20];
+	struct dpaa_sec_dev_private *internals;
+
 	PMD_INIT_FUNC_TRACE();
 
+	internals = dev->data->dev_private;
+	sprintf(str, "ctx_pool_%d", dev->data->dev_id);
+	if (!internals->ctx_pool) {
+		internals->ctx_pool = rte_mempool_create((const char *)str,
+							CTX_POOL_NUM_BUFS,
+							CTX_POOL_BUF_SIZE,
+							CTX_POOL_CACHE_SIZE, 0,
+							NULL, NULL, NULL, NULL,
+							SOCKET_ID_ANY, 0);
+		if (!internals->ctx_pool) {
+			RTE_LOG(ERR, PMD, "%s create failed\n", str);
+			return -ENOMEM;
+		}
+	} else
+		RTE_LOG(INFO, PMD, "mempool already created for dev_id : %d\n",
+			dev->data->dev_id);
+
 	return 0;
 }
 
@@ -2191,9 +2212,19 @@ dpaa_sec_dev_stop(struct rte_cryptodev *dev __rte_unused)
 }
 
 static int
-dpaa_sec_dev_close(struct rte_cryptodev *dev __rte_unused)
+dpaa_sec_dev_close(struct rte_cryptodev *dev)
 {
+	struct dpaa_sec_dev_private *internals;
+
 	PMD_INIT_FUNC_TRACE();
+
+	if (dev == NULL)
+		return -ENOMEM;
+
+	internals = dev->data->dev_private;
+	rte_mempool_free(internals->ctx_pool);
+	internals->ctx_pool = NULL;
+
 	return 0;
 }
 
@@ -2260,6 +2291,7 @@ dpaa_sec_uninit(struct rte_cryptodev *dev)
 	internals = dev->data->dev_private;
 	rte_free(dev->security_ctx);
 
+	/* In case close has been called, internals->ctx_pool would be NULL */
 	rte_mempool_free(internals->ctx_pool);
 	rte_free(internals);
 
@@ -2277,7 +2309,6 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
 	struct dpaa_sec_qp *qp;
 	uint32_t i, flags;
 	int ret;
-	char str[20];
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -2337,18 +2368,6 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
 		}
 	}
 
-	sprintf(str, "ctx_pool_%d", cryptodev->data->dev_id);
-	internals->ctx_pool = rte_mempool_create((const char *)str,
-			CTX_POOL_NUM_BUFS,
-			CTX_POOL_BUF_SIZE,
-			CTX_POOL_CACHE_SIZE, 0,
-			NULL, NULL, NULL, NULL,
-			SOCKET_ID_ANY, 0);
-	if (!internals->ctx_pool) {
-		RTE_LOG(ERR, PMD, "%s create failed\n", str);
-		goto init_error;
-	}
-
 	PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
 	return 0;
 
-- 
2.7.4

[PATCH v2 8/8] crypto/dpaa2_sec: fix OP storage for physical IOVA mode

[Hemant Agrawal]

op storage in fle is just for reference for post dq.
So, don't convert it to iova mode.

Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 --
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 16 ++++++++--------
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 4a19d42..ac72049 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -305,7 +305,6 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
  */
 
 #define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_iova)
-#define DPAA2_OP_VADDR_TO_IOVA(op) (op->phys_addr)
 
 /**
  * macro to convert Virtual address to IOVA
@@ -326,7 +325,6 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
 #else	/* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */
 
 #define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_addr)
-#define DPAA2_OP_VADDR_TO_IOVA(op) (op)
 #define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr)
 #define DPAA2_IOVA_TO_VADDR(_iova) (_iova)
 #define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 9a74845..50a301d 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -117,7 +117,7 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (size_t)priv);
 
 	op_fle = fle + 1;
@@ -268,7 +268,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_POOL_BUF_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
@@ -413,7 +413,7 @@ build_authenc_sg_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 
 	op_fle = fle + 1;
@@ -562,7 +562,7 @@ build_authenc_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_POOL_BUF_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
@@ -691,7 +691,7 @@ static inline int build_auth_sg_fd(
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
 	/* first FLE entry used to store mbuf and session ctxt */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	op_fle = fle + 1;
 	ip_fle = fle + 2;
@@ -772,7 +772,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	 * to get the MBUF Addr from the previous FLE.
 	 * We can have a better approach to use the inline Mbuf
 	 */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 
@@ -864,7 +864,7 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
 	/* first FLE entry used to store mbuf and session ctxt */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 
 	op_fle = fle + 1;
@@ -986,7 +986,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	 * to get the MBUF Addr from the previous FLE.
 	 * We can have a better approach to use the inline Mbuf
 	 */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
-- 
2.7.4

Re: [PATCH v2 8/8] crypto/dpaa2_sec: fix OP storage for physical IOVA mode

[De Lara Guarch, Pablo]

Hi Hemant,

> -----Original Message-----
> From: Hemant Agrawal [mailto:hemant.agrawal@nxp.com]
> Sent: Monday, April 2, 2018 8:37 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> akhil.goyal@nxp.com
> Subject: [PATCH v2 8/8] crypto/dpaa2_sec: fix OP storage for physical IOVA
> mode
> 
> op storage in fle is just for reference for post dq.
> So, don't convert it to iova mode.
> 
> Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>

I am getting a compilation issue when building with gcc 32 bits:

drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c: In function 'build_authenc_gcm_sg_fd':
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h:204:33: error:
cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
  (fle)->addr_hi = upper_32_bits((uint64_t)addr);  \
                                 ^
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h:23:40:
note: in definition of macro 'upper_32_bits'
 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
                                        ^
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c:120:2:
note: in expansion of macro 'DPAA2_SET_FLE_ADDR'
  DPAA2_SET_FLE_ADDR(fle, op);
  ^~~~~~~~~~~~~~~~~~


Pablo

[PATCH] sec

[Hemant Agrawal]

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 50a301d..b31f64c 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -117,7 +117,7 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (size_t)priv);
 
 	op_fle = fle + 1;
@@ -268,7 +268,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_POOL_BUF_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
@@ -413,7 +413,7 @@ build_authenc_sg_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 
 	op_fle = fle + 1;
@@ -562,7 +562,7 @@ build_authenc_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_POOL_BUF_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
@@ -691,7 +691,7 @@ static inline int build_auth_sg_fd(
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
 	/* first FLE entry used to store mbuf and session ctxt */
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	op_fle = fle + 1;
 	ip_fle = fle + 2;
@@ -772,7 +772,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	 * to get the MBUF Addr from the previous FLE.
 	 * We can have a better approach to use the inline Mbuf
 	 */
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 
@@ -864,7 +864,7 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
 	/* first FLE entry used to store mbuf and session ctxt */
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 
 	op_fle = fle + 1;
@@ -986,7 +986,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	 * to get the MBUF Addr from the previous FLE.
 	 * We can have a better approach to use the inline Mbuf
 	 */
-	DPAA2_SET_FLE_ADDR(fle, op);
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
-- 
2.7.4

[PATCH v3 1/8] test/crypto: add macro for dpaa sec device name

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Fixes: b674d6d0381a ("test/crypto: add dpaa crypto test cases")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 test/test/test_cryptodev.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test/test/test_cryptodev.h b/test/test/test_cryptodev.h
index 8cdc087..b74f3a1 100644
--- a/test/test/test_cryptodev.h
+++ b/test/test/test_cryptodev.h
@@ -59,6 +59,7 @@
 #define CRYPTODEV_NAME_ZUC_PMD		crypto_zuc
 #define CRYPTODEV_NAME_ARMV8_PMD	crypto_armv8
 #define CRYPTODEV_NAME_DPAA2_SEC_PMD	crypto_dpaa2_sec
+#define CRYPTODEV_NAME_DPAA_SEC_PMD	crypto_dpaa_sec
 #define CRYPTODEV_NAME_SCHEDULER_PMD	crypto_scheduler
 #define CRYPTODEV_NAME_MRVL_PMD		crypto_mrvl
 
-- 
2.7.4

[PATCH v3 2/8] app/crypto-perf: fix excess crypto device error

[Hemant Agrawal]

If number of available devices are more than logical core,
no need to through an error. Just use the less number of
devices.

Fixes: f8be1786b1b8 ("app/crypto-perf: introduce performance test application")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 app/test-crypto-perf/main.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/app/test-crypto-perf/main.c b/app/test-crypto-perf/main.c
index 019d835..dd666f4 100644
--- a/app/test-crypto-perf/main.c
+++ b/app/test-crypto-perf/main.c
@@ -80,12 +80,9 @@ cperf_initialize_cryptodev(struct cperf_options *opts, uint8_t *enabled_cdevs,
 
 	nb_lcores = rte_lcore_count() - 1;
 
-	if (enabled_cdev_count > nb_lcores) {
-		printf("Number of capable crypto devices (%d) "
-				"has to be less or equal to number of slave "
-				"cores (%d)\n", enabled_cdev_count, nb_lcores);
-		return -EINVAL;
-	}
+	/* Use less number of devices, if more area available than cores.*/
+	if (enabled_cdev_count > nb_lcores)
+		enabled_cdev_count = nb_lcores;
 
 	/* Create a mempool shared by all the devices */
 	uint32_t max_sess_size = 0, sess_size;
-- 
2.7.4

[PATCH v3 3/8] app/crypto-perf: enable it for non default mempool

[Hemant Agrawal]

The current code usages the default mempool ops while
creating the mempool for crypto usages. Adding the support
for best_mempool_ops to enable it for devices using
non default mempools.

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 app/test-crypto-perf/Makefile            | 1 +
 app/test-crypto-perf/cperf_test_common.c | 6 +++++-
 app/test-crypto-perf/meson.build         | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/app/test-crypto-perf/Makefile b/app/test-crypto-perf/Makefile
index 3935aec..28a0cd0 100644
--- a/app/test-crypto-perf/Makefile
+++ b/app/test-crypto-perf/Makefile
@@ -7,6 +7,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
 APP = dpdk-test-crypto-perf
 
 CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
 
 # all source are stored in SRCS-y
 SRCS-y := main.c
diff --git a/app/test-crypto-perf/cperf_test_common.c b/app/test-crypto-perf/cperf_test_common.c
index 21cb1c2..fa1dc49 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -3,6 +3,7 @@
  */
 
 #include <rte_malloc.h>
+#include <rte_mbuf_pool_ops.h>
 
 #include "cperf_test_common.h"
 
@@ -124,6 +125,7 @@ cperf_alloc_common_memory(const struct cperf_options *options,
 			uint32_t *dst_buf_offset,
 			struct rte_mempool **pool)
 {
+	const char *mp_ops_name;
 	char pool_name[32] = "";
 	int ret;
 
@@ -193,8 +195,10 @@ cperf_alloc_common_memory(const struct cperf_options *options,
 		return -1;
 	}
 
+	mp_ops_name = rte_mbuf_best_mempool_ops();
+
 	ret = rte_mempool_set_ops_byname(*pool,
-		RTE_MBUF_DEFAULT_MEMPOOL_OPS, NULL);
+		mp_ops_name, NULL);
 	if (ret != 0) {
 		RTE_LOG(ERR, USER1,
 			 "Error setting mempool handler for device %u\n",
diff --git a/app/test-crypto-perf/meson.build b/app/test-crypto-perf/meson.build
index 6eb22a5..eacd7a0 100644
--- a/app/test-crypto-perf/meson.build
+++ b/app/test-crypto-perf/meson.build
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2018 Intel Corporation
 
+allow_experimental_apis = true
 sources = files('cperf_ops.c',
 		'cperf_options_parsing.c',
 		'cperf_test_common.c',
-- 
2.7.4

[PATCH v3 4/8] crypto/dpaa_sec: add macro for device name

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h b/drivers/crypto/dpaa_sec/dpaa_sec.h
index f45b36c..b8f7bd2 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.h
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
@@ -7,6 +7,9 @@
 #ifndef _DPAA_SEC_H_
 #define _DPAA_SEC_H_
 
+#define CRYPTODEV_NAME_DPAA_SEC_PMD	crypto_dpaa_sec
+/**< NXP DPAA - SEC PMD device name */
+
 #define NUM_POOL_CHANNELS	4
 #define DPAA_SEC_BURST		7
 #define DPAA_SEC_ALG_UNSUPPORT	(-1)
-- 
2.7.4

[PATCH v3 5/8] crypto/dpaa_sec: fix to check the portal presence

[Hemant Agrawal]

From: Ashish Jain <ashish.jain@nxp.com>

Adding a check to do portal configuration if not already
configured before packet enqueue. This check is only done
during dpaa_sec_attach_sess_q for initial packets,
so this change wont affect the data path and hence performance.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index c5191ce..eebb905 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1759,7 +1759,13 @@ dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess)
 		PMD_DRV_LOG(ERR, "Unable to prepare sec cdb");
 		return -1;
 	}
-
+	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
+		ret = rte_dpaa_portal_init((void *)0);
+		if (ret) {
+			PMD_DRV_LOG(ERR, "Failure in affining portal");
+			return ret;
+		}
+	}
 	ret = dpaa_sec_init_rx(sess->inq, dpaa_mem_vtop(&sess->cdb),
 			       qman_fq_fqid(&qp->outq));
 	if (ret)
-- 
2.7.4

[PATCH v3 6/8] crypto/dpaa_sec: fix incorrect NULL check

[Hemant Agrawal]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: akhil.goyal@nxp.com
Cc: stable@dpdk.org

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index eebb905..2df5e5c 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2252,11 +2252,12 @@ struct rte_security_ops dpaa_sec_security_ops = {
 static int
 dpaa_sec_uninit(struct rte_cryptodev *dev)
 {
-	struct dpaa_sec_dev_private *internals = dev->data->dev_private;
+	struct dpaa_sec_dev_private *internals;
 
 	if (dev == NULL)
 		return -ENODEV;
 
+	internals = dev->data->dev_private;
 	rte_free(dev->security_ctx);
 
 	rte_mempool_free(internals->ctx_pool);
-- 
2.7.4

[PATCH v3 7/8] crypto/dpaa_sec: move mempool allocation to config

[Hemant Agrawal]

From: Akhil Goyal <akhil.goyal@nxp.com>

Currently, the context mempools are allocated during device probe. Thus,
even if the DPAA SEC devices are not used, any application would still
allocate the memory required for working with the contexts.

This patch moves the allocation to configuration time so that when the
CAAM devices are configured, this allocation would be done.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Tested-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 49 ++++++++++++++++++++++++++------------
 1 file changed, 34 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 2df5e5c..c7f7cdf 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2169,11 +2169,32 @@ dpaa_sec_security_session_destroy(void *dev __rte_unused,
 
 
 static int
-dpaa_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
+dpaa_sec_dev_configure(struct rte_cryptodev *dev,
 		       struct rte_cryptodev_config *config __rte_unused)
 {
+
+	char str[20];
+	struct dpaa_sec_dev_private *internals;
+
 	PMD_INIT_FUNC_TRACE();
 
+	internals = dev->data->dev_private;
+	sprintf(str, "ctx_pool_%d", dev->data->dev_id);
+	if (!internals->ctx_pool) {
+		internals->ctx_pool = rte_mempool_create((const char *)str,
+							CTX_POOL_NUM_BUFS,
+							CTX_POOL_BUF_SIZE,
+							CTX_POOL_CACHE_SIZE, 0,
+							NULL, NULL, NULL, NULL,
+							SOCKET_ID_ANY, 0);
+		if (!internals->ctx_pool) {
+			RTE_LOG(ERR, PMD, "%s create failed\n", str);
+			return -ENOMEM;
+		}
+	} else
+		RTE_LOG(INFO, PMD, "mempool already created for dev_id : %d\n",
+			dev->data->dev_id);
+
 	return 0;
 }
 
@@ -2191,9 +2212,19 @@ dpaa_sec_dev_stop(struct rte_cryptodev *dev __rte_unused)
 }
 
 static int
-dpaa_sec_dev_close(struct rte_cryptodev *dev __rte_unused)
+dpaa_sec_dev_close(struct rte_cryptodev *dev)
 {
+	struct dpaa_sec_dev_private *internals;
+
 	PMD_INIT_FUNC_TRACE();
+
+	if (dev == NULL)
+		return -ENOMEM;
+
+	internals = dev->data->dev_private;
+	rte_mempool_free(internals->ctx_pool);
+	internals->ctx_pool = NULL;
+
 	return 0;
 }
 
@@ -2260,6 +2291,7 @@ dpaa_sec_uninit(struct rte_cryptodev *dev)
 	internals = dev->data->dev_private;
 	rte_free(dev->security_ctx);
 
+	/* In case close has been called, internals->ctx_pool would be NULL */
 	rte_mempool_free(internals->ctx_pool);
 	rte_free(internals);
 
@@ -2277,7 +2309,6 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
 	struct dpaa_sec_qp *qp;
 	uint32_t i, flags;
 	int ret;
-	char str[20];
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -2337,18 +2368,6 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
 		}
 	}
 
-	sprintf(str, "ctx_pool_%d", cryptodev->data->dev_id);
-	internals->ctx_pool = rte_mempool_create((const char *)str,
-			CTX_POOL_NUM_BUFS,
-			CTX_POOL_BUF_SIZE,
-			CTX_POOL_CACHE_SIZE, 0,
-			NULL, NULL, NULL, NULL,
-			SOCKET_ID_ANY, 0);
-	if (!internals->ctx_pool) {
-		RTE_LOG(ERR, PMD, "%s create failed\n", str);
-		goto init_error;
-	}
-
 	PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
 	return 0;
 
-- 
2.7.4

[PATCH v3 8/8] crypto/dpaa2_sec: fix OP storage for physical IOVA mode

[Hemant Agrawal]

op storage in fle is just for reference for post dq.
So, don't convert it to iova mode.

Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 --
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 16 ++++++++--------
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 4a19d42..ac72049 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -305,7 +305,6 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
  */
 
 #define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_iova)
-#define DPAA2_OP_VADDR_TO_IOVA(op) (op->phys_addr)
 
 /**
  * macro to convert Virtual address to IOVA
@@ -326,7 +325,6 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
 #else	/* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */
 
 #define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_addr)
-#define DPAA2_OP_VADDR_TO_IOVA(op) (op)
 #define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr)
 #define DPAA2_IOVA_TO_VADDR(_iova) (_iova)
 #define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 9a74845..b31f64c 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -117,7 +117,7 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (size_t)priv);
 
 	op_fle = fle + 1;
@@ -268,7 +268,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_POOL_BUF_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
@@ -413,7 +413,7 @@ build_authenc_sg_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 
 	op_fle = fle + 1;
@@ -562,7 +562,7 @@ build_authenc_fd(dpaa2_sec_session *sess,
 		return -1;
 	}
 	memset(fle, 0, FLE_POOL_BUF_SIZE);
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
@@ -691,7 +691,7 @@ static inline int build_auth_sg_fd(
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
 	/* first FLE entry used to store mbuf and session ctxt */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	op_fle = fle + 1;
 	ip_fle = fle + 2;
@@ -772,7 +772,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	 * to get the MBUF Addr from the previous FLE.
 	 * We can have a better approach to use the inline Mbuf
 	 */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 
@@ -864,7 +864,7 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	}
 	memset(fle, 0, FLE_SG_MEM_SIZE);
 	/* first FLE entry used to store mbuf and session ctxt */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 
 	op_fle = fle + 1;
@@ -986,7 +986,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 	 * to get the MBUF Addr from the previous FLE.
 	 * We can have a better approach to use the inline Mbuf
 	 */
-	DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
+	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
 	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 	fle = fle + 1;
 	sge = fle + 2;
-- 
2.7.4

Re: [PATCH] sec

[Hemant Agrawal]

Please ignore it.

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Hemant Agrawal
> Sent: Monday, April 02, 2018 9:03 PM
> To: dev@dpdk.org
> Cc: pablo.de.lara.guarch@intel.com; Akhil Goyal <akhil.goyal@nxp.com>; dpdk-
> up <dpdk-up@NXP1.onmicrosoft.com>
> Subject: [dpdk-dev] [PATCH] sec
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
>  drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> index 50a301d..b31f64c 100644
> --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> @@ -117,7 +117,7 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
>  		return -1;
>  	}
>  	memset(fle, 0, FLE_SG_MEM_SIZE);
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (size_t)priv);
> 
>  	op_fle = fle + 1;
> @@ -268,7 +268,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
>  		return -1;
>  	}
>  	memset(fle, 0, FLE_POOL_BUF_SIZE);
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
>  	fle = fle + 1;
>  	sge = fle + 2;
> @@ -413,7 +413,7 @@ build_authenc_sg_fd(dpaa2_sec_session *sess,
>  		return -1;
>  	}
>  	memset(fle, 0, FLE_SG_MEM_SIZE);
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
> 
>  	op_fle = fle + 1;
> @@ -562,7 +562,7 @@ build_authenc_fd(dpaa2_sec_session *sess,
>  		return -1;
>  	}
>  	memset(fle, 0, FLE_POOL_BUF_SIZE);
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
>  	fle = fle + 1;
>  	sge = fle + 2;
> @@ -691,7 +691,7 @@ static inline int build_auth_sg_fd(
>  	}
>  	memset(fle, 0, FLE_SG_MEM_SIZE);
>  	/* first FLE entry used to store mbuf and session ctxt */
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
>  	op_fle = fle + 1;
>  	ip_fle = fle + 2;
> @@ -772,7 +772,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct
> rte_crypto_op *op,
>  	 * to get the MBUF Addr from the previous FLE.
>  	 * We can have a better approach to use the inline Mbuf
>  	 */
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
>  	fle = fle + 1;
> 
> @@ -864,7 +864,7 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct
> rte_crypto_op *op,
>  	}
>  	memset(fle, 0, FLE_SG_MEM_SIZE);
>  	/* first FLE entry used to store mbuf and session ctxt */
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
> 
>  	op_fle = fle + 1;
> @@ -986,7 +986,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct
> rte_crypto_op *op,
>  	 * to get the MBUF Addr from the previous FLE.
>  	 * We can have a better approach to use the inline Mbuf
>  	 */
> -	DPAA2_SET_FLE_ADDR(fle, op);
> +	DPAA2_SET_FLE_ADDR(fle, (size_t)op);
>  	DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
>  	fle = fle + 1;
>  	sge = fle + 2;
> --
> 2.7.4

Re: [PATCH v3 1/8] test/crypto: add macro for dpaa sec device name

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Hemant Agrawal [mailto:hemant.agrawal@nxp.com]
> Sent: Monday, April 2, 2018 4:33 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> akhil.goyal@nxp.com; dpdk-up@NXP1.onmicrosoft.com
> Subject: [PATCH v3 1/8] test/crypto: add macro for dpaa sec device name
> 
> From: Ashish Jain <ashish.jain@nxp.com>
> 
> Fixes: b674d6d0381a ("test/crypto: add dpaa crypto test cases")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Series applied to dpdk-next-crypto.
Thanks,

Pablo