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From: Youquan Song <youquan.song@intel.com>
To: stable@vger.kernel.org, gregkh@linuxfoundation.org
Cc: tim.c.chen@linux.intel.com, ashok.raj@intel.com,
	dave.hansen@intel.com, yi.y.sun@linux.intel.com,
	youquan.song@intel.com, youquan.song@linux.intel.com,
	Andy Lutomirski <luto@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Arjan van de Ven <arjan@linux.intel.com>,
	Borislav Petkov <bp@alien8.de>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Mel Gorman <mgorman@suse.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Rik van Riel <riel@redhat.com>,
	linux-mm@kvack.org
Subject: [PATCH 11/24] x86/mm: Give each mm TLB flush generation a unique ID
Date: Tue, 17 Apr 2018 00:27:07 -0400	[thread overview]
Message-ID: <1523939240-16508-11-git-send-email-youquan.song@intel.com> (raw)
In-Reply-To: <1523939240-16508-1-git-send-email-youquan.song@intel.com>

From: Andy Lutomirski <luto@kernel.org>

(cherry picked from commit f39681ed0f48498b80455095376f11535feea332)

This adds two new variables to mmu_context_t: ctx_id and tlb_gen.
ctx_id uniquely identifies the mm_struct and will never be reused.
For a given mm_struct (and hence ctx_id), tlb_gen is a monotonic
count of the number of times that a TLB flush has been requested.
The pair (ctx_id, tlb_gen) can be used as an identifier for TLB
flush actions and will be used in subsequent patches to reliably
determine whether all needed TLB flushes have occurred on a given
CPU.

This patch is split out for ease of review.  By itself, it has no
real effect other than creating and updating the new variables.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Nadav Amit <nadav.amit@gmail.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/413a91c24dab3ed0caa5f4e4d017d87b0857f920.1498751203.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Youquan Song <youquan.song@linux.intel.com> [v4.4 backport]
---
 arch/x86/include/asm/mmu.h         | 15 +++++++++++++--
 arch/x86/include/asm/mmu_context.h |  4 ++++
 arch/x86/kernel/ldt.c              |  1 +
 arch/x86/mm/tlb.c                  |  2 ++
 4 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h
index 7680b76..3359dfe 100644
--- a/arch/x86/include/asm/mmu.h
+++ b/arch/x86/include/asm/mmu.h
@@ -3,12 +3,18 @@
 
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
+#include <linux/atomic.h>
 
 /*
- * The x86 doesn't have a mmu context, but
- * we put the segment information here.
+ * x86 has arch-specific MMU state beyond what lives in mm_struct.
  */
 typedef struct {
+	/*
+	 * ctx_id uniquely identifies this mm_struct.  A ctx_id will never
+	 * be reused, and zero is not a valid ctx_id.
+	 */
+	u64 ctx_id;
+
 #ifdef CONFIG_MODIFY_LDT_SYSCALL
 	struct ldt_struct *ldt;
 #endif
@@ -24,6 +30,11 @@ typedef struct {
 	atomic_t perf_rdpmc_allowed;	/* nonzero if rdpmc is allowed */
 } mm_context_t;
 
+#define INIT_MM_CONTEXT(mm)						\
+	.context = {							\
+		.ctx_id = 1,						\
+	}
+
 void leave_mm(int cpu);
 
 #endif /* _ASM_X86_MMU_H */
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 9bfc5fd..24bc41a 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -11,6 +11,9 @@
 #include <asm/tlbflush.h>
 #include <asm/paravirt.h>
 #include <asm/mpx.h>
+
+extern atomic64_t last_mm_ctx_id;
+
 #ifndef CONFIG_PARAVIRT
 static inline void paravirt_activate_mm(struct mm_struct *prev,
 					struct mm_struct *next)
@@ -58,6 +61,7 @@ void destroy_context(struct mm_struct *mm);
 static inline int init_new_context(struct task_struct *tsk,
 				   struct mm_struct *mm)
 {
+	mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id);
 	return 0;
 }
 static inline void destroy_context(struct mm_struct *mm) {}
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index bc42936..323590e 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -125,6 +125,7 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 	struct mm_struct *old_mm;
 	int retval = 0;
 
+	mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id);
 	mutex_init(&mm->context.lock);
 	old_mm = current->mm;
 	if (!old_mm) {
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 7cad01af..efec198 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -29,6 +29,8 @@
  *	Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi
  */
 
+atomic64_t last_mm_ctx_id = ATOMIC64_INIT(1);
+
 struct flush_tlb_info {
 	struct mm_struct *flush_mm;
 	unsigned long flush_start;
-- 
1.8.3.1

  parent reply	other threads:[~2018-04-17  4:27 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-17  4:26 [PATCH 01/24] x86/cpufeatures: Add CPUID_7_EDX CPUID leaf Youquan Song
2018-04-16 18:27 ` Greg KH
2018-04-17  4:26 ` [PATCH 02/24] x86/cpufeatures: Add Intel feature bits for Speculation Control Youquan Song
2018-04-17  4:26 ` [PATCH 03/24] x86/cpufeatures: Add AMD " Youquan Song
2018-04-17  4:27 ` [PATCH 04/24] x86/msr: Add definitions for new speculation control MSRs Youquan Song
2018-04-17  4:27 ` [PATCH 05/24] x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown Youquan Song
2018-04-17  4:27 ` [PATCH 06/24] x86/cpufeature: Blacklist SPEC_CTRL/PRED_CMD on early Spectre v2 microcodes Youquan Song
2018-04-17  4:27 ` [PATCH 07/24] x86/speculation: Add basic IBPB (Indirect Branch Prediction Barrier) support Youquan Song
2018-04-17  4:27 ` [PATCH 08/24] x86/cpufeatures: Clean up Spectre v2 related CPUID flags Youquan Song
2018-04-17  4:27 ` [PATCH 09/24] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on Intel Youquan Song
2018-04-17  4:27 ` [PATCH 10/24] x86/speculation: Add <asm/msr-index.h> dependency Youquan Song
2018-04-17  4:27 ` Youquan Song [this message]
2018-04-17  4:27 ` [PATCH 12/24] x86/speculation: Use Indirect Branch Prediction Barrier in context switch Youquan Song
2018-04-17  4:27 ` [PATCH 13/24] x86/speculation: Use IBRS if available before calling into firmware Youquan Song
2018-04-17  4:27 ` [PATCH 14/24] x86/speculation: Move firmware_restrict_branch_speculation_*() from C to CPP Youquan Song
2018-04-17  4:27 ` [PATCH 15/24] KVM: nVMX: Eliminate vmcs02 pool Youquan Song
2018-04-17  4:27 ` [PATCH 16/24] KVM: VMX: introduce alloc_loaded_vmcs Youquan Song
2018-04-17  4:27 ` [PATCH 17/24] KVM: VMX: make MSR bitmaps per-VCPU Youquan Song
2018-04-17  4:27 ` [PATCH 18/24] KVM/x86: Add IBPB support Youquan Song
2018-04-17  4:27 ` [PATCH 19/24] KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES Youquan Song
2018-04-17  4:27 ` [PATCH 20/24] KVM/VMX: Allow direct access to MSR_IA32_SPEC_CTRL Youquan Song
2018-04-17  4:27 ` [PATCH 21/24] KVM/SVM: " Youquan Song
2018-04-17  4:27 ` [PATCH 22/24] KVM/x86: Remove indirect MSR op calls from SPEC_CTRL Youquan Song
2018-04-17  4:27 ` [PATCH 23/24] KVM/VMX: Optimize vmx_vcpu_run() and svm_vcpu_run() by marking the RDMSR path as unlikely() Youquan Song
2018-04-17  4:27 ` [PATCH 24/24] x86/spectre_v2: Don't check microcode versions when running under hypervisors Youquan Song
2018-04-18  3:18 [PATCH 00/24] Backport Speculation Control support for 4.4 Youquan Song
2018-04-18  3:18 ` [PATCH 11/24] x86/mm: Give each mm TLB flush generation a unique ID Youquan Song

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