[U-Boot] [PATCH 0/8] rockchip: conver to use ARM arch timer for armv7 SoCs

[U-Boot] [PATCH 0/8] rockchip: conver to use ARM arch timer for armv7 SoCs

[Kever Yang]

This patch set can be consider to be split out of previous patch
set " rockchip: clean up board file for rockchip SoCs"

This patch set depends on patch set for rk3188 use DM timer.



Kever Yang (8):
  rockchip: add STIMER_BASE for Rockchip SoCs
  rockchip: rk322x: sdram: use udelay instead of rockchip_udelay
  rockchip: rk322x: use ARM arch timer instead of rk_timer
  rockchip: rk3036: sdram: use udelay instead of rockchip_udelay
  rockchip: rk3036: use ARM arch timer instead of rk_timer
  rockchip: rk3288: use ARM arch timer instead of rk_timer
  rockchip: rk3128: use ARM arch timer instead of rk_timer
  rockchip: remove unused rk_timer.c

 arch/arm/mach-rockchip/Kconfig               | 16 ++++++++++
 arch/arm/mach-rockchip/Makefile              |  6 ----
 arch/arm/mach-rockchip/rk3036-board-spl.c    | 19 +++++++++--
 arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 19 ++++++-----
 arch/arm/mach-rockchip/rk3128-board.c        |  2 --
 arch/arm/mach-rockchip/rk322x-board-spl.c    | 19 +++++++++--
 arch/arm/mach-rockchip/rk3288-board-spl.c    | 18 +++++++++--
 arch/arm/mach-rockchip/rk3288-board-tpl.c    | 18 +++++++++--
 arch/arm/mach-rockchip/rk_timer.c            | 48 ----------------------------
 drivers/ram/rockchip/sdram_rk322x.c          | 29 ++++++++---------
 include/configs/rk3036_common.h              |  6 ++--
 include/configs/rk3128_common.h              |  6 ++--
 include/configs/rk322x_common.h              |  6 ++--
 include/configs/rk3288_common.h              |  6 ++--
 14 files changed, 116 insertions(+), 102 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk_timer.c

-- 
1.9.1

[U-Boot] [PATCH 1/8] rockchip: add STIMER_BASE for Rockchip SoCs

[Kever Yang]

Most of Rockchip SoCs have ARM arch/generic timer whose clock source
is from one of secure timer(if the soc supports Trust environment).

STIMER can only access in secure mode, so it should be init before
the proper U-Boot(usually in non-secure mode).
Add a MACRO for timer base addr so that we can init with a common
function in SPL/TPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/Kconfig | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0adaed4..55d3d5c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -191,6 +191,22 @@ config ROCKCHIP_BOOT_MODE_REG
 	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
 	  according to the value from this register.
 
+config ROCKCHIP_STIMER_BASE
+	hex "Rockchip Secure timer base address"
+	default 0x200440a0 if ROCKCHIP_RK3036
+	default 0x20018020 if ROCKCHIP_RK3126
+	default 0x200440a0 if ROCKCHIP_RK3128
+	default 0x110d0020 if ROCKCHIP_RK322X
+	default 0xff810020 if ROCKCHIP_RK3288
+	default 0xff1d0020 if ROCKCHIP_RK3328
+	default 0xff830020 if ROCKCHIP_RK3368
+	default 0xff8680a0 if ROCKCHIP_RK3399
+	default 0x10350020 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
+	  works after this timer work.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0
-- 
1.9.1

[U-Boot] [PATCH 2/8] rockchip: rk322x: sdram: use udelay instead of rockchip_udelay

[Kever Yang]

Use system api for udelay instead of vendor defined api,
and rockchip_udelay() will be removed.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 drivers/ram/rockchip/sdram_rk322x.c | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index a82f993..0a7da95 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -17,7 +17,6 @@
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk322x.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/sdram_common.h>
 #include <asm/types.h>
@@ -97,26 +96,26 @@ void phy_pctrl_reset(struct rk322x_cru *cru,
 			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
 			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
 
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
 						  1 << DDRPHY_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
 						  1 << DDRCTRL_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	clrbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_RESET_MASK << SOFT_RESET_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 	setbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_DERESET_ANALOG);
-	rockchip_udelay(5);
+	udelay(5);
 	setbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_DERESET_DIGITAL);
 
-	rockchip_udelay(1);
+	udelay(1);
 }
 
 void phy_dll_bypass_set(struct rk322x_ddr_phy *ddr_phy, u32 freq)
@@ -155,7 +154,7 @@ static void send_command(struct rk322x_ddr_pctl *pctl,
 			 u32 rank, u32 cmd, u32 arg)
 {
 	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
-	rockchip_udelay(1);
+	udelay(1);
 	while (readl(&pctl->mcmd) & START_CMD)
 		;
 }
@@ -168,7 +167,7 @@ static void memory_init(struct chan_info *chan,
 
 	if (dramtype == DDR3) {
 		send_command(pctl, 3, DESELECT_CMD, 0);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, PREA_CMD, 0);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
@@ -197,17 +196,17 @@ static void memory_init(struct chan_info *chan,
 			     (0x63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0 & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(10);
+		udelay(10);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0xff & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0xff & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, MRS_CMD,
 			     (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (sdram_params->phy_timing.mr[1] &
@@ -244,7 +243,7 @@ static u32 data_training(struct chan_info *chan)
 			DQS_SQU_CAL_SEL_CS0);
 	setbits_le32(&ddr_phy->ddrphy_reg[2], DQS_SQU_CAL_START);
 
-	rockchip_udelay(30);
+	udelay(30);
 	ret = readl(&ddr_phy->ddrphy_reg[0xff]);
 
 	clrbits_le32(&ddr_phy->ddrphy_reg[2],
@@ -368,9 +367,9 @@ static void phy_softreset(struct dram_info *dram)
 
 	writel(GRF_DDRPHY_BUFFEREN_CORE_EN, &grf->soc_con[0]);
 	clrbits_le32(&ddr_phy->ddrphy_reg[0], 0x3 << 2);
-	rockchip_udelay(1);
+	udelay(1);
 	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 2);
-	rockchip_udelay(5);
+	udelay(5);
 	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 3);
 	writel(GRF_DDRPHY_BUFFEREN_CORE_DIS, &grf->soc_con[0]);
 }
-- 
1.9.1

[U-Boot] [PATCH 3/8] rockchip: rk322x: use ARM arch timer instead of rk_timer

[Kever Yang]

We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/Makefile           |  2 +-
 arch/arm/mach-rockchip/rk322x-board-spl.c | 19 ++++++++++++++++---
 include/configs/rk322x_common.h           |  6 +++---
 3 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 096dbac..c1eeefb 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -40,7 +40,7 @@ endif
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
 ifndef CONFIG_ARM64
-ifndef CONFIG_ROCKCHIP_RK3188
+ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X),)
 obj-y += rk_timer.o
 endif
 endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
index d3d0446..b5b178f 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -14,7 +14,6 @@
 #include <asm/arch/cru_rk322x.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 
 u32 spl_boot_device(void)
@@ -62,6 +61,17 @@ void board_debug_uart_init(void)
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 }
 
+void rockchip_stimer_init(void)
+{
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
 #define SGRF_DDR_CON0 0x10150000
 void board_init_f(ulong dummy)
 {
@@ -85,8 +95,11 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	rockchip_timer_init();
-	printf("timer init done\n");
+	/* Init secure timer */
+	rockchip_stimer_init();
+	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+	timer_init();
+
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index b437b85..8f8a1ef 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -14,9 +14,9 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x110c00a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
+#define COUNTER_FREQUENCY		24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
-- 
1.9.1

[U-Boot] [PATCH 4/8] rockchip: rk3036: sdram: use udelay instead of rockchip_udelay

[Kever Yang]

Use system api for udelay instead of vendor defined api,
and rockchip_udelay() will be removed.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index e5393ec..ce3f09a 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -10,7 +10,6 @@
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 
 /*
@@ -346,7 +345,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 
 	/* waiting for pll lock */
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		rockchip_udelay(1);
+		udelay(1);
 
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
@@ -374,25 +373,25 @@ void phy_pctrl_reset(struct rk3036_sdram_priv *priv)
 			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
 			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
 
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&priv->cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
 						  1 << DDRPHY_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&priv->cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
 						  1 << DDRCTRL_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	clrsetbits_le32(&ddr_phy->ddrphy_reg1,
 			SOFT_RESET_MASK << SOFT_RESET_SHIFT,
 			0 << SOFT_RESET_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 	clrsetbits_le32(&ddr_phy->ddrphy_reg1,
 			SOFT_RESET_MASK << SOFT_RESET_SHIFT,
 			3 << SOFT_RESET_SHIFT);
 
-	rockchip_udelay(1);
+	udelay(1);
 }
 
 void phy_dll_bypass_set(struct rk3036_sdram_priv *priv, unsigned int freq)
@@ -445,7 +444,7 @@ static void send_command(struct rk3036_ddr_pctl *pctl,
 			 u32 rank, u32 cmd, u32 arg)
 {
 	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
-	rockchip_udelay(1);
+	udelay(1);
 	while (readl(&pctl->mcmd) & START_CMD)
 		;
 }
@@ -455,7 +454,7 @@ static void memory_init(struct rk3036_sdram_priv *priv)
 	struct rk3036_ddr_pctl *pctl = priv->pctl;
 
 	send_command(pctl, 3, DESELECT_CMD, 0);
-	rockchip_udelay(1);
+	udelay(1);
 	send_command(pctl, 3, PREA_CMD, 0);
 	send_command(pctl, 3, MRS_CMD,
 		     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
@@ -493,7 +492,7 @@ static void data_training(struct rk3036_sdram_priv *priv)
 	clrsetbits_le32(&ddr_phy->ddrphy_reg2, 0x03,
 			DQS_SQU_CAL_NORMAL_MODE | DQS_SQU_CAL_START);
 
-	rockchip_udelay(1);
+	udelay(1);
 	while ((readl(&ddr_phy->ddrphy_reg62) & CAL_DONE_MASK) !=
 		(HIGH_8BIT_CAL_DONE | LOW_8BIT_CAL_DONE)) {
 		;
-- 
1.9.1

[U-Boot] [PATCH 5/8] rockchip: rk3036: use ARM arch timer instead of rk_timer

[Kever Yang]

We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track the boot time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/Makefile           |  2 +-
 arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +++++++++++++++++--
 include/configs/rk3036_common.h           |  6 +++---
 3 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index c1eeefb..02aa58a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -40,7 +40,7 @@ endif
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
 ifndef CONFIG_ARM64
-ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X),)
+ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036),)
 obj-y += rk_timer.o
 endif
 endif
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 550e3a1..4b4016b 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -11,7 +11,6 @@
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -20,6 +19,17 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define DEBUG_UART_BASE	0x20068000
 
+void rockchip_stimer_init(void)
+{
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
 void board_init_f(ulong dummy)
 {
 #ifdef EARLY_DEBUG
@@ -36,7 +46,12 @@ void board_init_f(ulong dummy)
 		     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
 	debug_uart_init();
 #endif
-	rockchip_timer_init();
+
+	/* Init secure timer */
+	rockchip_stimer_init();
+	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+	timer_init();
+
 	sdram_init();
 
 	/* return to maskrom */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f39a272..7d83f81 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -14,9 +14,9 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
+#define COUNTER_FREQUENCY		24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_MEM32
-- 
1.9.1

[U-Boot] [PATCH 6/8] rockchip: rk3288: use ARM arch timer instead of rk_timer

[Kever Yang]

We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/Makefile           |  2 +-
 arch/arm/mach-rockchip/rk3288-board-spl.c | 18 ++++++++++++++++--
 arch/arm/mach-rockchip/rk3288-board-tpl.c | 18 ++++++++++++++++--
 include/configs/rk3288_common.h           |  6 +++---
 4 files changed, 36 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 02aa58a..86efd7b 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -40,7 +40,7 @@ endif
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
 ifndef CONFIG_ARM64
-ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036),)
+ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036)$(CONFIG_ROCKCHIP_RK3288),)
 obj-y += rk_timer.o
 endif
 endif
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index f3ea624..8f22549 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -23,7 +23,6 @@
 #include <asm/arch/sdram.h>
 #include <asm/arch/sdram_common.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/arch/timer.h>
 #include <dm/pinctrl.h>
 #include <dm/root.h>
 #include <dm/test.h>
@@ -143,6 +142,17 @@ static int phycore_init(void)
 }
 #endif
 
+void rockchip_stimer_init(void)
+{
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *pinctrl;
@@ -175,7 +185,11 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	rockchip_timer_init();
+	/* Init secure timer */
+	rockchip_stimer_init();
+	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+	timer_init();
+
 	configure_l2ctlr();
 
 	ret = rockchip_get_clk(&dev);
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
index 150beea..e34142c 100644
--- a/arch/arm/mach-rockchip/rk3288-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
@@ -17,10 +17,20 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/arch/timer.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void rockchip_stimer_init(void)
+{
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
 #define GRF_BASE		0xff770000
 void board_init_f(ulong dummy)
 {
@@ -51,7 +61,11 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	rockchip_timer_init();
+	/* Init secure timer */
+	rockchip_stimer_init();
+	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+	timer_init();
+
 	configure_l2ctlr();
 
 	ret = rockchip_get_clk(&dev);
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 78595b8..98cc9be 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -15,9 +15,9 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define	CONFIG_SYS_TIMER_BASE		0xff810020 /* TIMER7 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
+#define COUNTER_FREQUENCY		24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_SYS_NS16550_MEM32
 
-- 
1.9.1

[U-Boot] [PATCH 7/8] rockchip: rk3128: use ARM arch timer instead of rk_timer

[Kever Yang]

We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/Makefile       | 6 ------
 arch/arm/mach-rockchip/rk3128-board.c | 2 --
 include/configs/rk3128_common.h       | 6 +++---
 3 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 86efd7b..e1e2d54 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -39,12 +39,6 @@ endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
-ifndef CONFIG_ARM64
-ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036)$(CONFIG_ROCKCHIP_RK3288),)
-obj-y += rk_timer.o
-endif
-endif
-
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
 ifndef CONFIG_TPL_BUILD
diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 2e8393d..85c9288 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -34,8 +34,6 @@ int board_init(void)
 {
 	int ret = 0;
 
-	rockchip_timer_init();
-
 	ret = regulators_enable_boot_on(false);
 	if (ret) {
 		debug("%s: Cannot enable boot on regulator\n", __func__);
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index bd8019c..e7e137b 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -15,9 +15,9 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
+#define COUNTER_FREQUENCY		24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_SYS_NS16550_MEM32
 
-- 
1.9.1

[U-Boot] [PATCH 8/8] rockchip: remove unused rk_timer.c

[Kever Yang]

All other SoCs have conver to use ARM arch timer or Rockchip DM timer,
so we can remove rk_timer.c now.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/rk_timer.c | 48 ---------------------------------------
 1 file changed, 48 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk_timer.c

diff --git a/arch/arm/mach-rockchip/rk_timer.c b/arch/arm/mach-rockchip/rk_timer.c
deleted file mode 100644
index 853b986..0000000
--- a/arch/arm/mach-rockchip/rk_timer.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/timer.h>
-#include <asm/io.h>
-#include <linux/types.h>
-
-struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;
-
-static uint64_t rockchip_get_ticks(void)
-{
-	uint64_t timebase_h, timebase_l;
-
-	timebase_l = readl(&timer_ptr->timer_curr_value0);
-	timebase_h = readl(&timer_ptr->timer_curr_value1);
-
-	return timebase_h << 32 | timebase_l;
-}
-
-static uint64_t usec_to_tick(unsigned int usec)
-{
-	uint64_t tick = usec;
-	tick *= CONFIG_SYS_TIMER_RATE / (1000 * 1000);
-	return tick;
-}
-
-void rockchip_udelay(unsigned int usec)
-{
-	uint64_t tmp;
-
-	/* get timestamp */
-	tmp = rockchip_get_ticks() + usec_to_tick(usec);
-
-	/* loop till event */
-	while (rockchip_get_ticks() < tmp+1)
-		;
-}
-
-void rockchip_timer_init(void)
-{
-	writel(0xffffffff, &timer_ptr->timer_load_count0);
-	writel(0xffffffff, &timer_ptr->timer_load_count1);
-	writel(1, &timer_ptr->timer_ctrl_reg);
-}
-- 
1.9.1

[U-Boot] [U-Boot, 2/8] rockchip: rk322x: sdram: use udelay instead of rockchip_udelay

[Philipp Tomsich]

> Use system api for udelay instead of vendor defined api,
> and rockchip_udelay() will be removed.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  drivers/ram/rockchip/sdram_rk322x.c | 29 ++++++++++++++---------------
>  1 file changed, 14 insertions(+), 15 deletions(-)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot, 7/8] rockchip: rk3128: use ARM arch timer instead of rk_timer

[Philipp Tomsich]

> We prefer to use ARM arch timer instead of rockchip timer, so that
> we are using the same timer for SPL, U-Boot and Kernel, which will
> make things simple and easy to track to boot time.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  arch/arm/mach-rockchip/Makefile       | 6 ------
>  arch/arm/mach-rockchip/rk3128-board.c | 2 --
>  include/configs/rk3128_common.h       | 6 +++---
>  3 files changed, 3 insertions(+), 11 deletions(-)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot, 4/8] rockchip: rk3036: sdram: use udelay instead of rockchip_udelay

[Philipp Tomsich]

> Use system api for udelay instead of vendor defined api,
> and rockchip_udelay() will be removed.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 19 +++++++++----------
>  1 file changed, 9 insertions(+), 10 deletions(-)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot,8/8] rockchip: remove unused rk_timer.c

[Philipp Tomsich]

> All other SoCs have conver to use ARM arch timer or Rockchip DM timer,
> so we can remove rk_timer.c now.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
> 
>  arch/arm/mach-rockchip/rk_timer.c | 48 ---------------------------------------
>  1 file changed, 48 deletions(-)
>  delete mode 100644 arch/arm/mach-rockchip/rk_timer.c
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [U-Boot, 1/8] rockchip: add STIMER_BASE for Rockchip SoCs

[Philipp Tomsich]

On Wed, 18 Apr 2018, Kever Yang wrote:

> Most of Rockchip SoCs have ARM arch/generic timer whose clock source
> is from one of secure timer(if the soc supports Trust environment).
>
> STIMER can only access in secure mode, so it should be init before
> the proper U-Boot(usually in non-secure mode).
> Add a MACRO for timer base addr so that we can init with a common
> function in SPL/TPL.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

See below for required changes.

> ---
>
> arch/arm/mach-rockchip/Kconfig | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 0adaed4..55d3d5c 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -191,6 +191,22 @@ config ROCKCHIP_BOOT_MODE_REG
> 	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
> 	  according to the value from this register.
>
> +config ROCKCHIP_STIMER_BASE
> +	hex "Rockchip Secure timer base address"
> +	default 0x200440a0 if ROCKCHIP_RK3036
> +	default 0x20018020 if ROCKCHIP_RK3126
> +	default 0x200440a0 if ROCKCHIP_RK3128
> +	default 0x110d0020 if ROCKCHIP_RK322X
> +	default 0xff810020 if ROCKCHIP_RK3288
> +	default 0xff1d0020 if ROCKCHIP_RK3328
> +	default 0xff830020 if ROCKCHIP_RK3368
> +	default 0xff8680a0 if ROCKCHIP_RK3399
> +	default 0x10350020 if ROCKCHIP_RV1108
> +	default 0
> +	help
> +	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
> +	  works after this timer work.

NAK.
This is not a user-configurable/selectable option, but rather a function 
of the chip used.
This belongs into a header file in arch/arm/include/asm/arch-rockchip.

> +
> config ROCKCHIP_SPL_RESERVE_IRAM
> 	hex "Size of IRAM reserved in SPL"
> 	default 0
>

[U-Boot] [U-Boot, 3/8] rockchip: rk322x: use ARM arch timer instead of rk_timer

[Philipp Tomsich]

On Wed, 18 Apr 2018, Kever Yang wrote:

> We prefer to use ARM arch timer instead of rockchip timer, so that
> we are using the same timer for SPL, U-Boot and Kernel, which will
> make things simple and easy to track to boot time.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

See below for requested changes.

> ---
>
> arch/arm/mach-rockchip/Makefile           |  2 +-
> arch/arm/mach-rockchip/rk322x-board-spl.c | 19 ++++++++++++++++---
> include/configs/rk322x_common.h           |  6 +++---
> 3 files changed, 20 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
> index 096dbac..c1eeefb 100644
> --- a/arch/arm/mach-rockchip/Makefile
> +++ b/arch/arm/mach-rockchip/Makefile
> @@ -40,7 +40,7 @@ endif
> obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
>
> ifndef CONFIG_ARM64
> -ifndef CONFIG_ROCKCHIP_RK3188
> +ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X),)

Please have a config-option for the rk_timer and force (i.e. SELECT) it 
for these chips. I am not keen on a list that grows like this...

> obj-y += rk_timer.o
> endif
> endif
> diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
> index d3d0446..b5b178f 100644
> --- a/arch/arm/mach-rockchip/rk322x-board-spl.c
> +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
> @@ -14,7 +14,6 @@
> #include <asm/arch/cru_rk322x.h>
> #include <asm/arch/grf_rk322x.h>
> #include <asm/arch/hardware.h>
> -#include <asm/arch/timer.h>
> #include <asm/arch/uart.h>
>
> u32 spl_boot_device(void)
> @@ -62,6 +61,17 @@ void board_debug_uart_init(void)
> 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
> }
>
> +void rockchip_stimer_init(void)
> +{
> +	asm volatile("mcr p15, 0, %0, c14, c0, 0"
> +		     : : "r"(COUNTER_FREQUENCY));
> +
> +	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> +	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
> +}

NAK. See comment on patch #1.

> +
> #define SGRF_DDR_CON0 0x10150000

Can we have this as a const uint32_t * ?

> void board_init_f(ulong dummy)
> {
> @@ -85,8 +95,11 @@ void board_init_f(ulong dummy)
> 		hang();
> 	}
>
> -	rockchip_timer_init();
> -	printf("timer init done\n");
> +	/* Init secure timer */
> +	rockchip_stimer_init();
> +	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
> +	timer_init();
> +
> 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> 	if (ret) {
> 		printf("DRAM init failed: %d\n", ret);
> diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
> index b437b85..8f8a1ef 100644
> --- a/include/configs/rk322x_common.h
> +++ b/include/configs/rk322x_common.h
> @@ -14,9 +14,9 @@
> #define CONFIG_SYS_CBSIZE		1024
> #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
>
> -#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
> -#define CONFIG_SYS_TIMER_BASE		0x110c00a0 /* TIMER5 */
> -#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
> +#define COUNTER_FREQUENCY		24000000
> +#define CONFIG_SYS_ARCH_TIMER
> +#define CONFIG_SYS_HZ_CLOCK		24000000
>
> #define CONFIG_SYS_NS16550_MEM32
> #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
>

[U-Boot] [U-Boot, 5/8] rockchip: rk3036: use ARM arch timer instead of rk_timer

[Philipp Tomsich]

On Wed, 18 Apr 2018, Kever Yang wrote:

> We prefer to use ARM arch timer instead of rockchip timer, so that
> we are using the same timer for SPL, U-Boot and Kernel, which will
> make things simple and easy to track the boot time.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
> arch/arm/mach-rockchip/Makefile           |  2 +-
> arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +++++++++++++++++--
> include/configs/rk3036_common.h           |  6 +++---
> 3 files changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
> index c1eeefb..02aa58a 100644
> --- a/arch/arm/mach-rockchip/Makefile
> +++ b/arch/arm/mach-rockchip/Makefile
> @@ -40,7 +40,7 @@ endif
> obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
>
> ifndef CONFIG_ARM64
> -ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X),)
> +ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036),)

Same as for the previous patch.
Now it has become apparent, that this list is growing...

> obj-y += rk_timer.o
> endif
> endif
> diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
> index 550e3a1..4b4016b 100644
> --- a/arch/arm/mach-rockchip/rk3036-board-spl.c
> +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
> @@ -11,7 +11,6 @@
> #include <asm/arch/grf_rk3036.h>
> #include <asm/arch/hardware.h>
> #include <asm/arch/sdram_rk3036.h>
> -#include <asm/arch/timer.h>
> #include <asm/arch/uart.h>
>
> DECLARE_GLOBAL_DATA_PTR;
> @@ -20,6 +19,17 @@ DECLARE_GLOBAL_DATA_PTR;
>
> #define DEBUG_UART_BASE	0x20068000

Please make this a const uint32_t * ... or even better: use a pointer to a 
structure representing the peripheral's register layout.

>
> +void rockchip_stimer_init(void)
> +{
> +	asm volatile("mcr p15, 0, %0, c14, c0, 0"
> +		     : : "r"(COUNTER_FREQUENCY));
> +
> +	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);

Unless we really want a 0, we should clrbits the specific bits involved 
via symbolic constants.

> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> +	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);

This should be a symbolic 'enable' bit that gets written.
I'd prefer a setbits on this, as we only want a single bit.

Once again (I had this in the comments on the first revision a few weeks 
back already): the STIMER_BASE is not user-configurable.

> +}
> +
> void board_init_f(ulong dummy)
> {
> #ifdef EARLY_DEBUG
> @@ -36,7 +46,12 @@ void board_init_f(ulong dummy)
> 		     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
> 	debug_uart_init();
> #endif
> -	rockchip_timer_init();
> +
> +	/* Init secure timer */
> +	rockchip_stimer_init();
> +	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
> +	timer_init();
> +
> 	sdram_init();
>
> 	/* return to maskrom */
> diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
> index f39a272..7d83f81 100644
> --- a/include/configs/rk3036_common.h
> +++ b/include/configs/rk3036_common.h
> @@ -14,9 +14,9 @@
> #define CONFIG_SYS_CBSIZE		1024
> #define CONFIG_SKIP_LOWLEVEL_INIT
>
> -#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
> -#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
> -#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
> +#define COUNTER_FREQUENCY		24000000
> +#define CONFIG_SYS_ARCH_TIMER
> +#define CONFIG_SYS_HZ_CLOCK		24000000
>
> #define CONFIG_SYS_NS16550
> #define CONFIG_SYS_NS16550_MEM32
>

[U-Boot] [U-Boot, 6/8] rockchip: rk3288: use ARM arch timer instead of rk_timer

[Philipp Tomsich]

On Wed, 18 Apr 2018, Kever Yang wrote:

> We prefer to use ARM arch timer instead of rockchip timer, so that
> we are using the same timer for SPL, U-Boot and Kernel, which will
> make things simple and easy to track to boot time.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

Same comments as for the other patches apply.

Thanks,
Philipp.

> ---
>
> arch/arm/mach-rockchip/Makefile           |  2 +-
> arch/arm/mach-rockchip/rk3288-board-spl.c | 18 ++++++++++++++++--
> arch/arm/mach-rockchip/rk3288-board-tpl.c | 18 ++++++++++++++++--
> include/configs/rk3288_common.h           |  6 +++---
> 4 files changed, 36 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
> index 02aa58a..86efd7b 100644
> --- a/arch/arm/mach-rockchip/Makefile
> +++ b/arch/arm/mach-rockchip/Makefile
> @@ -40,7 +40,7 @@ endif
> obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
>
> ifndef CONFIG_ARM64
> -ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036),)
> +ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036)$(CONFIG_ROCKCHIP_RK3288),)
> obj-y += rk_timer.o
> endif
> endif
> diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
> index f3ea624..8f22549 100644
> --- a/arch/arm/mach-rockchip/rk3288-board-spl.c
> +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
> @@ -23,7 +23,6 @@
> #include <asm/arch/sdram.h>
> #include <asm/arch/sdram_common.h>
> #include <asm/arch/sys_proto.h>
> -#include <asm/arch/timer.h>
> #include <dm/pinctrl.h>
> #include <dm/root.h>
> #include <dm/test.h>
> @@ -143,6 +142,17 @@ static int phycore_init(void)
> }
> #endif
>
> +void rockchip_stimer_init(void)
> +{
> +	asm volatile("mcr p15, 0, %0, c14, c0, 0"
> +		     : : "r"(COUNTER_FREQUENCY));
> +
> +	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> +	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
> +}
> +
> void board_init_f(ulong dummy)
> {
> 	struct udevice *pinctrl;
> @@ -175,7 +185,11 @@ void board_init_f(ulong dummy)
> 		hang();
> 	}
>
> -	rockchip_timer_init();
> +	/* Init secure timer */
> +	rockchip_stimer_init();
> +	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
> +	timer_init();
> +
> 	configure_l2ctlr();
>
> 	ret = rockchip_get_clk(&dev);
> diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
> index 150beea..e34142c 100644
> --- a/arch/arm/mach-rockchip/rk3288-board-tpl.c
> +++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
> @@ -17,10 +17,20 @@
> #include <asm/arch/periph.h>
> #include <asm/arch/pmu_rk3288.h>
> #include <asm/arch/sys_proto.h>
> -#include <asm/arch/timer.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +void rockchip_stimer_init(void)
> +{
> +	asm volatile("mcr p15, 0, %0, c14, c0, 0"
> +		     : : "r"(COUNTER_FREQUENCY));
> +
> +	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
> +	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
> +	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
> +}
> +
> #define GRF_BASE		0xff770000
> void board_init_f(ulong dummy)
> {
> @@ -51,7 +61,11 @@ void board_init_f(ulong dummy)
> 		hang();
> 	}
>
> -	rockchip_timer_init();
> +	/* Init secure timer */
> +	rockchip_stimer_init();
> +	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
> +	timer_init();
> +
> 	configure_l2ctlr();
>
> 	ret = rockchip_get_clk(&dev);
> diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
> index 78595b8..98cc9be 100644
> --- a/include/configs/rk3288_common.h
> +++ b/include/configs/rk3288_common.h
> @@ -15,9 +15,9 @@
> #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
> #define CONFIG_SYS_CBSIZE		1024
>
> -#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
> -#define	CONFIG_SYS_TIMER_BASE		0xff810020 /* TIMER7 */
> -#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
> +#define COUNTER_FREQUENCY		24000000
> +#define CONFIG_SYS_ARCH_TIMER
> +#define CONFIG_SYS_HZ_CLOCK		24000000
>
> #define CONFIG_SYS_NS16550_MEM32
>
>

[U-Boot] [U-Boot, 1/8] rockchip: add STIMER_BASE for Rockchip SoCs

[Kever Yang]

Hi Philipp,


On 08/30/2018 05:11 PM, Philipp Tomsich wrote:
>
>
> On Wed, 18 Apr 2018, Kever Yang wrote:
>
>> Most of Rockchip SoCs have ARM arch/generic timer whose clock source
>> is from one of secure timer(if the soc supports Trust environment).
>>
>> STIMER can only access in secure mode, so it should be init before
>> the proper U-Boot(usually in non-secure mode).
>> Add a MACRO for timer base addr so that we can init with a common
>> function in SPL/TPL.
>>
>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>
> See below for required changes.
>
>> ---
>>
>> arch/arm/mach-rockchip/Kconfig | 16 ++++++++++++++++
>> 1 file changed, 16 insertions(+)
>>
>> diff --git a/arch/arm/mach-rockchip/Kconfig
>> b/arch/arm/mach-rockchip/Kconfig
>> index 0adaed4..55d3d5c 100644
>> --- a/arch/arm/mach-rockchip/Kconfig
>> +++ b/arch/arm/mach-rockchip/Kconfig
>> @@ -191,6 +191,22 @@ config ROCKCHIP_BOOT_MODE_REG
>>       The Soc will enter to different boot mode(defined in
>> asm/arch/boot_mode.h)
>>       according to the value from this register.
>>
>> +config ROCKCHIP_STIMER_BASE
>> +    hex "Rockchip Secure timer base address"
>> +    default 0x200440a0 if ROCKCHIP_RK3036
>> +    default 0x20018020 if ROCKCHIP_RK3126
>> +    default 0x200440a0 if ROCKCHIP_RK3128
>> +    default 0x110d0020 if ROCKCHIP_RK322X
>> +    default 0xff810020 if ROCKCHIP_RK3288
>> +    default 0xff1d0020 if ROCKCHIP_RK3328
>> +    default 0xff830020 if ROCKCHIP_RK3368
>> +    default 0xff8680a0 if ROCKCHIP_RK3399
>> +    default 0x10350020 if ROCKCHIP_RV1108
>> +    default 0
>> +    help
>> +      The secure timer inited in SPL/TPL in secure word, ARM generic
>> timer
>> +      works after this timer work.
>
> NAK.
> This is not a user-configurable/selectable option, but rather a
> function of the chip used.
> This belongs into a header file in arch/arm/include/asm/arch-rockchip.

Yes, you are correct in one way, but I think if this goes to header
file, it will separate in different
header file for different SoCs, or with a lot if MACRO like "#if
defined(CONFIG_ROCKCHIP_RK3288) #elif"
in one header file.

Make ROCKCHIP_STIMER_BASE in Kconfig and use like ROCKCHIP_BOOT_MODE_REG
seems like a better idea to make things simple.

Actually there are many other configs like this:
- DEBUG_UART_BASE
- IRAM_START
- DRAM_START

One more consideration is, I don't think make SoC configs into too much
place is a good idea,
now we have 3 places for configs:
- Kconfig default value
- configs/soc_defconfig
- include/configs/soc_header.h (this is moving to Kconfig one by one now)

so I would not like to move it into arch/arm/include/asm/arch-rockchip,
if you insist this should go to header file instead of Kconfig, I would
prefer
to use header file in 'include/configs/' folder, how do you think?

Thanks,
- Kever
>
>> +
>> config ROCKCHIP_SPL_RESERVE_IRAM
>>     hex "Size of IRAM reserved in SPL"
>>     default 0
>>
>

[U-Boot] [U-Boot, 1/8] rockchip: add STIMER_BASE for Rockchip SoCs

[Kever Yang]

Hi Philipp,

ping...
Could you reply this first before I send next patch set?

Thanks,
- Kever
On 09/03/2018 11:21 AM, Kever Yang wrote:
> Hi Philipp,
>
>
> On 08/30/2018 05:11 PM, Philipp Tomsich wrote:
>>
>> On Wed, 18 Apr 2018, Kever Yang wrote:
>>
>>> Most of Rockchip SoCs have ARM arch/generic timer whose clock source
>>> is from one of secure timer(if the soc supports Trust environment).
>>>
>>> STIMER can only access in secure mode, so it should be init before
>>> the proper U-Boot(usually in non-secure mode).
>>> Add a MACRO for timer base addr so that we can init with a common
>>> function in SPL/TPL.
>>>
>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>> See below for required changes.
>>
>>> ---
>>>
>>> arch/arm/mach-rockchip/Kconfig | 16 ++++++++++++++++
>>> 1 file changed, 16 insertions(+)
>>>
>>> diff --git a/arch/arm/mach-rockchip/Kconfig
>>> b/arch/arm/mach-rockchip/Kconfig
>>> index 0adaed4..55d3d5c 100644
>>> --- a/arch/arm/mach-rockchip/Kconfig
>>> +++ b/arch/arm/mach-rockchip/Kconfig
>>> @@ -191,6 +191,22 @@ config ROCKCHIP_BOOT_MODE_REG
>>>       The Soc will enter to different boot mode(defined in
>>> asm/arch/boot_mode.h)
>>>       according to the value from this register.
>>>
>>> +config ROCKCHIP_STIMER_BASE
>>> +    hex "Rockchip Secure timer base address"
>>> +    default 0x200440a0 if ROCKCHIP_RK3036
>>> +    default 0x20018020 if ROCKCHIP_RK3126
>>> +    default 0x200440a0 if ROCKCHIP_RK3128
>>> +    default 0x110d0020 if ROCKCHIP_RK322X
>>> +    default 0xff810020 if ROCKCHIP_RK3288
>>> +    default 0xff1d0020 if ROCKCHIP_RK3328
>>> +    default 0xff830020 if ROCKCHIP_RK3368
>>> +    default 0xff8680a0 if ROCKCHIP_RK3399
>>> +    default 0x10350020 if ROCKCHIP_RV1108
>>> +    default 0
>>> +    help
>>> +      The secure timer inited in SPL/TPL in secure word, ARM generic
>>> timer
>>> +      works after this timer work.
>> NAK.
>> This is not a user-configurable/selectable option, but rather a
>> function of the chip used.
>> This belongs into a header file in arch/arm/include/asm/arch-rockchip.
> Yes, you are correct in one way, but I think if this goes to header
> file, it will separate in different
> header file for different SoCs, or with a lot if MACRO like "#if
> defined(CONFIG_ROCKCHIP_RK3288) #elif"
> in one header file.
>
> Make ROCKCHIP_STIMER_BASE in Kconfig and use like ROCKCHIP_BOOT_MODE_REG
> seems like a better idea to make things simple.
>
> Actually there are many other configs like this:
> - DEBUG_UART_BASE
> - IRAM_START
> - DRAM_START
>
> One more consideration is, I don't think make SoC configs into too much
> place is a good idea,
> now we have 3 places for configs:
> - Kconfig default value
> - configs/soc_defconfig
> - include/configs/soc_header.h (this is moving to Kconfig one by one now)
>
> so I would not like to move it into arch/arm/include/asm/arch-rockchip,
> if you insist this should go to header file instead of Kconfig, I would
> prefer
> to use header file in 'include/configs/' folder, how do you think?
>
> Thanks,
> - Kever
>>> +
>>> config ROCKCHIP_SPL_RESERVE_IRAM
>>>     hex "Size of IRAM reserved in SPL"
>>>     default 0
>>>
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot

[U-Boot] [U-Boot, 1/8] rockchip: add STIMER_BASE for Rockchip SoCs

[Dr. Philipp Tomsich]

Kever,

[Sorry for the delay, I am switching laptops and this got stuck in my Drafts folder
on the old machine — which I noticed only today]

> On 3 Sep 2018, at 05:21, Kever Yang <kever.yang@rock-chips.com> wrote:
> 
> Hi Philipp,
> 
> 
> On 08/30/2018 05:11 PM, Philipp Tomsich wrote:
>> 
>> 
>> On Wed, 18 Apr 2018, Kever Yang wrote:
>> 
>>> Most of Rockchip SoCs have ARM arch/generic timer whose clock source
>>> is from one of secure timer(if the soc supports Trust environment).
>>> 
>>> STIMER can only access in secure mode, so it should be init before
>>> the proper U-Boot(usually in non-secure mode).
>>> Add a MACRO for timer base addr so that we can init with a common
>>> function in SPL/TPL.
>>> 
>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>> 
>> See below for required changes.
>> 
>>> ---
>>> 
>>> arch/arm/mach-rockchip/Kconfig | 16 ++++++++++++++++
>>> 1 file changed, 16 insertions(+)
>>> 
>>> diff --git a/arch/arm/mach-rockchip/Kconfig
>>> b/arch/arm/mach-rockchip/Kconfig
>>> index 0adaed4..55d3d5c 100644
>>> --- a/arch/arm/mach-rockchip/Kconfig
>>> +++ b/arch/arm/mach-rockchip/Kconfig
>>> @@ -191,6 +191,22 @@ config ROCKCHIP_BOOT_MODE_REG
>>>       The Soc will enter to different boot mode(defined in
>>> asm/arch/boot_mode.h)
>>>       according to the value from this register.
>>> 
>>> +config ROCKCHIP_STIMER_BASE
>>> +    hex "Rockchip Secure timer base address"
>>> +    default 0x200440a0 if ROCKCHIP_RK3036
>>> +    default 0x20018020 if ROCKCHIP_RK3126
>>> +    default 0x200440a0 if ROCKCHIP_RK3128
>>> +    default 0x110d0020 if ROCKCHIP_RK322X
>>> +    default 0xff810020 if ROCKCHIP_RK3288
>>> +    default 0xff1d0020 if ROCKCHIP_RK3328
>>> +    default 0xff830020 if ROCKCHIP_RK3368
>>> +    default 0xff8680a0 if ROCKCHIP_RK3399
>>> +    default 0x10350020 if ROCKCHIP_RV1108
>>> +    default 0
>>> +    help
>>> +      The secure timer inited in SPL/TPL in secure word, ARM generic
>>> timer
>>> +      works after this timer work.
>> 
>> NAK.
>> This is not a user-configurable/selectable option, but rather a
>> function of the chip used.
>> This belongs into a header file in arch/arm/include/asm/arch-rockchip.
> 
> Yes, you are correct in one way, but I think if this goes to header
> file, it will separate in different
> header file for different SoCs, or with a lot if MACRO like "#if
> defined(CONFIG_ROCKCHIP_RK3288) #elif"
> in one header file.

I don’t care whether we make this different files (my preferred choice in
the long run … i.e. after we clean up the header-file directory) or put it
into single file: at the moment both variants are common in our 
asm/arch-rockchip directory …

> Make ROCKCHIP_STIMER_BASE in Kconfig and use like ROCKCHIP_BOOT_MODE_REG
> seems like a better idea to make things simple.
> 
> Actually there are many other configs like this:
> - DEBUG_UART_BASE

This is an excellent example and really needs to go into Kconfig, as the
UART selection is done via this (e.g. we use a different DEBUG_UART
on the RK3399-Q7 than on Rockchip’s reference design) and it’s not
something the chip designs but rather a selection from a list encoded as
an address.

> - IRAM_START
> - DRAM_START
> 
> One more consideration is, I don't think make SoC configs into too much
> place is a good idea,
> now we have 3 places for configs:
> - Kconfig default value
> - configs/soc_defconfig
> - include/configs/soc_header.h (this is moving to Kconfig one by one now)
> 
> so I would not like to move it into arch/arm/include/asm/arch-rockchip,
> if you insist this should go to header file instead of Kconfig, I would
> prefer
> to use header file in 'include/configs/' folder, how do you think?

All of this should eventually go into asm/arch-rockchip, unless it’s a
an board-specific overrride/configuration item (include/configs was historically
meant for boards and not for SOCs). I believe that include/configs/ will
eventually be almost completely replaced by Kconfig entries and that
any SOC-related things will need to go into asm/arch-rockchip.

If you could put it into asm/arch-rockchip, I’d prefer this.
However, if you want to have it in include/configs, I won’t delay the series
because of it and we’ll deal with the clean-up when the time comes.

Thanks,
Philipp.

> 
> Thanks,
> - Kever
>> 
>>> +
>>> config ROCKCHIP_SPL_RESERVE_IRAM
>>>     hex "Size of IRAM reserved in SPL"
>>>     default 0