[U-Boot] [PATCH v1 0/2] stm32_serial fixes

[U-Boot] [PATCH v1 0/2] stm32_serial fixes

[Patrice Chotard]

This series :
    _ enable overrun uart feature
    _ rename status register flags


Patrice Chotard (2):
  serial: serial_stm32: Enable overrun
  serial: serial_stm32: Rename status register flags

 drivers/serial/serial_stm32.c | 21 ++++++++++++++-------
 drivers/serial/serial_stm32.h | 12 ++++++------
 2 files changed, 20 insertions(+), 13 deletions(-)

-- 
1.9.1

[U-Boot] [PATCH v1 1/2] serial: serial_stm32: Enable overrun

[Patrice Chotard]

Enable uart overrun feature which allows to benefits of uart
FIFO usage.

Previously overrun management was disabled, this has to effect
to bypassed the uart FIFO usage even if FIFO was enabled.
In particular configuration, for example when video console is
enabled, copy/pasting a long command line in console results in
corruption. This is due to the fact that a lot of time is consumed
in flushing the cache during frame buffer update, so uart chars are
not read fast enough.

By using uart FIFO and managing overrun, long command line can by
copy/paste in console without being corrupted.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/serial/serial_stm32.c | 15 +++++++++++----
 drivers/serial/serial_stm32.h |  8 ++++----
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 286b954fdd74..8275a76bf10b 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -45,10 +45,19 @@ static int stm32_serial_getc(struct udevice *dev)
 	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 	bool stm32f4 = plat->uart_info->stm32f4;
 	fdt_addr_t base = plat->base;
+	u32 isr = readl(base + ISR_OFFSET(stm32f4));
 
-	if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
+	if ((isr & USART_SR_FLAG_RXNE) == 0)
 		return -EAGAIN;
 
+	if (isr & USART_SR_FLAG_ORE) {
+		if (!stm32f4)
+			setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
+		else
+			readl(base + RDR_OFFSET(stm32f4));
+		return -EIO;
+	}
+
 	return readl(base + RDR_OFFSET(stm32f4));
 }
 
@@ -109,11 +118,9 @@ static int stm32_serial_probe(struct udevice *dev)
 		return plat->clock_rate;
 	};
 
-	/* Disable uart-> disable overrun-> enable uart */
+	/* Disable uart-> enable fifo-> enable uart */
 	clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
 		     BIT(uart_enable_bit));
-	if (plat->uart_info->has_overrun_disable)
-		setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
 	if (plat->uart_info->has_fifo)
 		setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
 	setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index d08ba1f55fc4..42fb1321e9dc 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -12,6 +12,8 @@
 #define CR3_OFFSET(x)	(x ? 0x14 : 0x08)
 #define BRR_OFFSET(x)	(x ? 0x08 : 0x0c)
 #define ISR_OFFSET(x)	(x ? 0x00 : 0x1c)
+
+#define ICR_OFFSET	0x20
 /*
  * STM32F4 has one Data Register (DR) for received or transmitted
  * data, so map Receive Data Register (RDR) and Transmit Data
@@ -23,28 +25,24 @@
 struct stm32_uart_info {
 	u8 uart_enable_bit;	/* UART_CR1_UE */
 	bool stm32f4;		/* true for STM32F4, false otherwise */
-	bool has_overrun_disable;
 	bool has_fifo;
 };
 
 struct stm32_uart_info stm32f4_info = {
 	.stm32f4 = true,
 	.uart_enable_bit = 13,
-	.has_overrun_disable = false,
 	.has_fifo = false,
 };
 
 struct stm32_uart_info stm32f7_info = {
 	.uart_enable_bit = 0,
 	.stm32f4 = false,
-	.has_overrun_disable = true,
 	.has_fifo = false,
 };
 
 struct stm32_uart_info stm32h7_info = {
 	.uart_enable_bit = 0,
 	.stm32f4 = false,
-	.has_overrun_disable = true,
 	.has_fifo = true,
 };
 
@@ -62,6 +60,7 @@ struct stm32x7_serial_platdata {
 
 #define USART_CR3_OVRDIS		BIT(12)
 
+#define USART_SR_FLAG_ORE		BIT(3)
 #define USART_SR_FLAG_RXNE		BIT(5)
 #define USART_SR_FLAG_TXE		BIT(7)
 
@@ -69,4 +68,5 @@ struct stm32x7_serial_platdata {
 #define USART_BRR_M_SHIFT		4
 #define USART_BRR_M_MASK		GENMASK(15, 4)
 
+#define USART_ICR_OREF			BIT(3)
 #endif
-- 
1.9.1

[U-Boot] [PATCH v1 2/2] serial: serial_stm32: Rename status register flags

[Patrice Chotard]

Uart status register is named USART_ISR on STM32F7, STM32H7
and STM32MP1 SoCs family, but USART_SR only on STM32F4 SoCs.

Use USART_ISR_ prefix instead of USART_SR_ .

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/serial/serial_stm32.c | 10 +++++-----
 drivers/serial/serial_stm32.h |  6 +++---
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 8275a76bf10b..5045be4bf950 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -47,10 +47,10 @@ static int stm32_serial_getc(struct udevice *dev)
 	fdt_addr_t base = plat->base;
 	u32 isr = readl(base + ISR_OFFSET(stm32f4));
 
-	if ((isr & USART_SR_FLAG_RXNE) == 0)
+	if ((isr & USART_ISR_FLAG_RXNE) == 0)
 		return -EAGAIN;
 
-	if (isr & USART_SR_FLAG_ORE) {
+	if (isr & USART_ISR_FLAG_ORE) {
 		if (!stm32f4)
 			setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
 		else
@@ -67,7 +67,7 @@ static int stm32_serial_putc(struct udevice *dev, const char c)
 	bool stm32f4 = plat->uart_info->stm32f4;
 	fdt_addr_t base = plat->base;
 
-	if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
+	if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0)
 		return -EAGAIN;
 
 	writel(c, base + TDR_OFFSET(stm32f4));
@@ -83,10 +83,10 @@ static int stm32_serial_pending(struct udevice *dev, bool input)
 
 	if (input)
 		return readl(base + ISR_OFFSET(stm32f4)) &
-			USART_SR_FLAG_RXNE ? 1 : 0;
+			USART_ISR_FLAG_RXNE ? 1 : 0;
 	else
 		return readl(base + ISR_OFFSET(stm32f4)) &
-			USART_SR_FLAG_TXE ? 0 : 1;
+			USART_ISR_FLAG_TXE ? 0 : 1;
 }
 
 static int stm32_serial_probe(struct udevice *dev)
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index 42fb1321e9dc..6ebec0acac45 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -60,9 +60,9 @@ struct stm32x7_serial_platdata {
 
 #define USART_CR3_OVRDIS		BIT(12)
 
-#define USART_SR_FLAG_ORE		BIT(3)
-#define USART_SR_FLAG_RXNE		BIT(5)
-#define USART_SR_FLAG_TXE		BIT(7)
+#define USART_ISR_FLAG_ORE		BIT(3)
+#define USART_ISR_FLAG_RXNE		BIT(5)
+#define USART_ISR_FLAG_TXE		BIT(7)
 
 #define USART_BRR_F_MASK		GENMASK(7, 0)
 #define USART_BRR_M_SHIFT		4
-- 
1.9.1

[U-Boot] [U-Boot,v1,1/2] serial: serial_stm32: Enable overrun

[Tom Rini]

On Fri, Apr 20, 2018 at 08:59:06AM +0200, Patrice Chotard wrote:

> Enable uart overrun feature which allows to benefits of uart
> FIFO usage.
> 
> Previously overrun management was disabled, this has to effect
> to bypassed the uart FIFO usage even if FIFO was enabled.
> In particular configuration, for example when video console is
> enabled, copy/pasting a long command line in console results in
> corruption. This is due to the fact that a lot of time is consumed
> in flushing the cache during frame buffer update, so uart chars are
> not read fast enough.
> 
> By using uart FIFO and managing overrun, long command line can by
> copy/paste in console without being corrupted.
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v1, 2/2] serial: serial_stm32: Rename status register flags

[Tom Rini]

On Fri, Apr 20, 2018 at 08:59:07AM +0200, Patrice Chotard wrote:

> Uart status register is named USART_ISR on STM32F7, STM32H7
> and STM32MP1 SoCs family, but USART_SR only on STM32F4 SoCs.
> 
> Use USART_ISR_ prefix instead of USART_SR_ .
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Applied to u-boot/master, thanks!

-- 
Tom
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