* [PATCH v2 0/2] Add SCIF support
@ 2018-04-24 8:56 Biju Das
2018-04-24 8:56 ` [PATCH v2 1/2] ARM: dts: r8a77470: " Biju Das
2018-04-24 8:56 ` [PATCH v2 2/2] ARM: dts: r8a77470: Add SCIF DMA support Biju Das
0 siblings, 2 replies; 7+ messages in thread
From: Biju Das @ 2018-04-24 8:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Magnus Damm, Geert Uytterhoeven, Chris Paterson,
Fabrizio Castro, devicetree, linux-renesas-soc, Biju Das
This patch series ass SCIF with DMA support to the r8a77470 SoC dtsi
This patch series tested against renesas-dev branch tag "renesas-dev-20180423-v4.17-rc2"
V1-->V2
Added change log for ZS clock index fix.
Biju Das (2):
ARM: dts: r8a77470: Add SCIF support
ARM: dts: r8a77470: Add SCIF DMA support
arch/arm/boot/dts/r8a77470.dtsi | 87 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 85 insertions(+), 2 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] ARM: dts: r8a77470: Add SCIF support
2018-04-24 8:56 [PATCH v2 0/2] Add SCIF support Biju Das
@ 2018-04-24 8:56 ` Biju Das
2018-04-24 9:34 ` Simon Horman
2018-04-24 14:42 ` Geert Uytterhoeven
2018-04-24 8:56 ` [PATCH v2 2/2] ARM: dts: r8a77470: Add SCIF DMA support Biju Das
1 sibling, 2 replies; 7+ messages in thread
From: Biju Das @ 2018-04-24 8:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Magnus Damm, Geert Uytterhoeven, Chris Paterson,
Fabrizio Castro, devicetree, linux-renesas-soc, Biju Das
Describe SCIF ports in the R8A77470 device tree.
Also it fixes the CPG clock index ZS from 6 to 5.
Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
arch/arm/boot/dts/r8a77470.dtsi | 69 +++++++++++++++++++++++++++++++++++++++--
1 file changed, 67 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 2f89f33..39549f2 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -190,19 +190,84 @@
dma-channels = <15>;
};
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 0x40>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 721>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 721>;
+ status = "disabled";
+ };
+
scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a77470",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e68000 0 0x40>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 720>,
- <&cpg CPG_CORE 6>, <&scif_clk>;
+ clocks = <&cpg CPG_MOD 720>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc 32>;
resets = <&cpg 720>;
status = "disabled";
};
+ scif2: serial@e6e58000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6e58000 0 0x40>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 719>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 719>;
+ status = "disabled";
+ };
+
+ scif3: serial@e6ea8000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ea8000 0 0x40>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 718>;
+ status = "disabled";
+ };
+
+ scif4: serial@e6ee0000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee0000 0 0x40>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+ scif5: serial@e6ee8000 {
+ compatible = "renesas,scif-r8a77470",
+ "renesas,rcar-gen2-scif", "renesas,scif";
+ reg = <0 0xe6ee8000 0 0x40>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>,
+ <&cpg CPG_CORE 5>, <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] ARM: dts: r8a77470: Add SCIF DMA support
2018-04-24 8:56 [PATCH v2 0/2] Add SCIF support Biju Das
2018-04-24 8:56 ` [PATCH v2 1/2] ARM: dts: r8a77470: " Biju Das
@ 2018-04-24 8:56 ` Biju Das
2018-04-24 9:34 ` Simon Horman
1 sibling, 1 reply; 7+ messages in thread
From: Biju Das @ 2018-04-24 8:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Simon Horman, Magnus Damm, Geert Uytterhoeven, Chris Paterson,
Fabrizio Castro, devicetree, linux-renesas-soc, Biju Das
Add SCIF DMA support for R8A77470 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
arch/arm/boot/dts/r8a77470.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 39549f2..baec3ca 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -198,6 +198,9 @@
clocks = <&cpg CPG_MOD 721>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
+ <&dmac1 0x29>, <&dmac1 0x2a>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 721>;
status = "disabled";
@@ -211,6 +214,9 @@
clocks = <&cpg CPG_MOD 720>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
+ <&dmac1 0x2d>, <&dmac1 0x2e>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 720>;
status = "disabled";
@@ -224,6 +230,9 @@
clocks = <&cpg CPG_MOD 719>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
+ <&dmac1 0x2b>, <&dmac1 0x2c>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 719>;
status = "disabled";
@@ -237,6 +246,9 @@
clocks = <&cpg CPG_MOD 718>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
+ <&dmac1 0x2f>, <&dmac1 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 718>;
status = "disabled";
@@ -250,6 +262,9 @@
clocks = <&cpg CPG_MOD 715>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
+ <&dmac1 0xfb>, <&dmac1 0xfc>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 715>;
status = "disabled";
@@ -263,6 +278,9 @@
clocks = <&cpg CPG_MOD 714>,
<&cpg CPG_CORE 5>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
+ <&dmac1 0xfd>, <&dmac1 0xfe>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 714>;
status = "disabled";
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] ARM: dts: r8a77470: Add SCIF support
2018-04-24 8:56 ` [PATCH v2 1/2] ARM: dts: r8a77470: " Biju Das
@ 2018-04-24 9:34 ` Simon Horman
2018-04-24 14:42 ` Geert Uytterhoeven
1 sibling, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-04-24 9:34 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Magnus Damm, Geert Uytterhoeven,
Chris Paterson, Fabrizio Castro, devicetree, linux-renesas-soc
On Tue, Apr 24, 2018 at 09:56:03AM +0100, Biju Das wrote:
> Describe SCIF ports in the R8A77470 device tree.
> Also it fixes the CPG clock index ZS from 6 to 5.
>
> Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree")
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Thanks, applied.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] ARM: dts: r8a77470: Add SCIF DMA support
2018-04-24 8:56 ` [PATCH v2 2/2] ARM: dts: r8a77470: Add SCIF DMA support Biju Das
@ 2018-04-24 9:34 ` Simon Horman
0 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-04-24 9:34 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Magnus Damm, Geert Uytterhoeven,
Chris Paterson, Fabrizio Castro, devicetree, linux-renesas-soc
On Tue, Apr 24, 2018 at 09:56:04AM +0100, Biju Das wrote:
> Add SCIF DMA support for R8A77470 SoC.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Thanks, applied.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] ARM: dts: r8a77470: Add SCIF support
2018-04-24 8:56 ` [PATCH v2 1/2] ARM: dts: r8a77470: " Biju Das
2018-04-24 9:34 ` Simon Horman
@ 2018-04-24 14:42 ` Geert Uytterhoeven
2018-04-25 6:06 ` Simon Horman
1 sibling, 1 reply; 7+ messages in thread
From: Geert Uytterhoeven @ 2018-04-24 14:42 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, Simon Horman, Magnus Damm,
Geert Uytterhoeven, Chris Paterson, Fabrizio Castro,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux-Renesas
On Tue, Apr 24, 2018 at 10:56 AM, Biju Das <biju.das@bp.renesas.com> wrote:
> Describe SCIF ports in the R8A77470 device tree.
> Also it fixes the CPG clock index ZS from 6 to 5.
>
> Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree")
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] ARM: dts: r8a77470: Add SCIF support
2018-04-24 14:42 ` Geert Uytterhoeven
@ 2018-04-25 6:06 ` Simon Horman
0 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-04-25 6:06 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Biju Das, Rob Herring, Mark Rutland, Magnus Damm,
Geert Uytterhoeven, Chris Paterson, Fabrizio Castro,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux-Renesas
On Tue, Apr 24, 2018 at 04:42:19PM +0200, Geert Uytterhoeven wrote:
> On Tue, Apr 24, 2018 at 10:56 AM, Biju Das <biju.das@bp.renesas.com> wrote:
> > Describe SCIF ports in the R8A77470 device tree.
> > Also it fixes the CPG clock index ZS from 6 to 5.
> >
> > Fixes: 6929dfc5918049 ("ARM: dts: r8a77470: Initial SoC device tree")
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> > Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, tag retrospectively added.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-04-25 6:06 UTC | newest]
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2018-04-24 8:56 [PATCH v2 0/2] Add SCIF support Biju Das
2018-04-24 8:56 ` [PATCH v2 1/2] ARM: dts: r8a77470: " Biju Das
2018-04-24 9:34 ` Simon Horman
2018-04-24 14:42 ` Geert Uytterhoeven
2018-04-25 6:06 ` Simon Horman
2018-04-24 8:56 ` [PATCH v2 2/2] ARM: dts: r8a77470: Add SCIF DMA support Biju Das
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