All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ludovic Barre <ludovic.Barre@st.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Gerald BAEZA <gerald.baeza@st.com>,
	Loic PALLARDY <loic.pallardy@st.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>,
	"Ludovic Barre" <ludovic.barre@st.com>
Subject: [PATCH 00/11] irqchip: stm32: add exti support for stm32mp157c
Date: Thu, 26 Apr 2018 18:18:23 +0200	[thread overview]
Message-ID: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> (raw)

From: Ludovic Barre <ludovic.barre@st.com>

Exti controller has been differently integrated on stm32mp1 SoC.
A parent irq has only one external interrupt Vs stm32f4: one parent irq
can have some external interrupts. On stm32mp1 hierachy domain could be used.
Handlers are call by parent, each parent interrupt could be masked and
unmasked according to the needs.

Introduces chips/host/driver data structure to support different
stm32 exti controllers variant and regroup common functions which could
be reused by variants.

Ludovic Barre (10):
  irqchip: stm32: checkpatch fix
  irqchip: stm32: add falling pending register support
  irqchip: stm32: add suspend support
  irqchip: stm32: add host and driver data structures
  irqchip: stm32: prepare common functions
  irqchip: stm32: add stm32mp1 support with hierarchy domain
  irqchip: stm32: add suspend/resume support for hierarchy domain
  pinctrl: stm32: add irq_eoi for stm32gpio irqchip
  ARM: dts: stm32: add exti support for stm32mp157c
  ARM: dts: stm32: add exti support to stm32mp157 pinctrl

radek (1):
  irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain

 .../interrupt-controller/st,stm32-exti.txt         |   3 +
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi          |   4 +
 arch/arm/boot/dts/stm32mp157c.dtsi                 |   7 +
 drivers/irqchip/irq-stm32-exti.c                   | 683 ++++++++++++++++++---
 drivers/pinctrl/stm32/pinctrl-stm32.c              |  13 +-
 5 files changed, 612 insertions(+), 98 deletions(-)

-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Ludovic Barre <ludovic.Barre@st.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Gerald BAEZA <gerald.baeza@st.com>,
	Loic PALLARDY <loic.pallardy@st.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	Ludovic Barre <ludovic.barre@st.com>
Subject: [PATCH 00/11] irqchip: stm32: add exti support for stm32mp157c
Date: Thu, 26 Apr 2018 18:18:23 +0200	[thread overview]
Message-ID: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> (raw)

From: Ludovic Barre <ludovic.barre@st.com>

Exti controller has been differently integrated on stm32mp1 SoC.
A parent irq has only one external interrupt Vs stm32f4: one parent irq
can have some external interrupts. On stm32mp1 hierachy domain could be used.
Handlers are call by parent, each parent interrupt could be masked and
unmasked according to the needs.

Introduces chips/host/driver data structure to support different
stm32 exti controllers variant and regroup common functions which could
be reused by variants.

Ludovic Barre (10):
  irqchip: stm32: checkpatch fix
  irqchip: stm32: add falling pending register support
  irqchip: stm32: add suspend support
  irqchip: stm32: add host and driver data structures
  irqchip: stm32: prepare common functions
  irqchip: stm32: add stm32mp1 support with hierarchy domain
  irqchip: stm32: add suspend/resume support for hierarchy domain
  pinctrl: stm32: add irq_eoi for stm32gpio irqchip
  ARM: dts: stm32: add exti support for stm32mp157c
  ARM: dts: stm32: add exti support to stm32mp157 pinctrl

radek (1):
  irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain

 .../interrupt-controller/st,stm32-exti.txt         |   3 +
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi          |   4 +
 arch/arm/boot/dts/stm32mp157c.dtsi                 |   7 +
 drivers/irqchip/irq-stm32-exti.c                   | 683 ++++++++++++++++++---
 drivers/pinctrl/stm32/pinctrl-stm32.c              |  13 +-
 5 files changed, 612 insertions(+), 98 deletions(-)

-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: ludovic.Barre@st.com (Ludovic Barre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 00/11] irqchip: stm32: add exti support for stm32mp157c
Date: Thu, 26 Apr 2018 18:18:23 +0200	[thread overview]
Message-ID: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> (raw)

From: Ludovic Barre <ludovic.barre@st.com>

Exti controller has been differently integrated on stm32mp1 SoC.
A parent irq has only one external interrupt Vs stm32f4: one parent irq
can have some external interrupts. On stm32mp1 hierachy domain could be used.
Handlers are call by parent, each parent interrupt could be masked and
unmasked according to the needs.

Introduces chips/host/driver data structure to support different
stm32 exti controllers variant and regroup common functions which could
be reused by variants.

Ludovic Barre (10):
  irqchip: stm32: checkpatch fix
  irqchip: stm32: add falling pending register support
  irqchip: stm32: add suspend support
  irqchip: stm32: add host and driver data structures
  irqchip: stm32: prepare common functions
  irqchip: stm32: add stm32mp1 support with hierarchy domain
  irqchip: stm32: add suspend/resume support for hierarchy domain
  pinctrl: stm32: add irq_eoi for stm32gpio irqchip
  ARM: dts: stm32: add exti support for stm32mp157c
  ARM: dts: stm32: add exti support to stm32mp157 pinctrl

radek (1):
  irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain

 .../interrupt-controller/st,stm32-exti.txt         |   3 +
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi          |   4 +
 arch/arm/boot/dts/stm32mp157c.dtsi                 |   7 +
 drivers/irqchip/irq-stm32-exti.c                   | 683 ++++++++++++++++++---
 drivers/pinctrl/stm32/pinctrl-stm32.c              |  13 +-
 5 files changed, 612 insertions(+), 98 deletions(-)

-- 
2.7.4

             reply	other threads:[~2018-04-26 16:20 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26 16:18 Ludovic Barre [this message]
2018-04-26 16:18 ` [PATCH 00/11] irqchip: stm32: add exti support for stm32mp157c Ludovic Barre
2018-04-26 16:18 ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 01/11] irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-05-08 14:47   ` Marc Zyngier
2018-05-08 14:47     ` Marc Zyngier
2018-05-11  7:47     ` Ludovic BARRE
2018-05-11  7:47       ` Ludovic BARRE
2018-05-11  7:47       ` Ludovic BARRE
2018-04-26 16:18 ` [PATCH 02/11] irqchip: stm32: checkpatch fix Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 03/11] irqchip: stm32: add falling pending register support Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 04/11] irqchip: stm32: add suspend support Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 05/11] irqchip: stm32: add host and driver data structures Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 06/11] irqchip: stm32: prepare common functions Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 07/11] irqchip: stm32: add stm32mp1 support with hierarchy domain Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-05-01 14:56   ` Rob Herring
2018-05-01 14:56     ` Rob Herring
2018-05-02 16:03     ` Ludovic BARRE
2018-05-02 16:03       ` Ludovic BARRE
2018-05-02 16:03       ` Ludovic BARRE
2018-05-02 17:45       ` Rob Herring
2018-05-02 17:45         ` Rob Herring
2018-05-03  9:55         ` Ludovic BARRE
2018-05-03  9:55           ` Ludovic BARRE
2018-05-03  9:55           ` Ludovic BARRE
2018-05-04 20:38           ` Rob Herring
2018-05-04 20:38             ` Rob Herring
2018-05-14 12:40             ` Ludovic BARRE
2018-05-14 12:40               ` Ludovic BARRE
2018-05-14 12:40               ` Ludovic BARRE
2018-04-26 16:18 ` [PATCH 08/11] irqchip: stm32: add suspend/resume support for " Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 09/11] pinctrl: stm32: add irq_eoi for stm32gpio irqchip Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 10/11] ARM: dts: stm32: add exti support for stm32mp157c Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18 ` [PATCH 11/11] ARM: dts: stm32: add exti support to stm32mp157 pinctrl Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre
2018-04-26 16:18   ` Ludovic Barre

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1524759514-12392-1-git-send-email-ludovic.Barre@st.com \
    --to=ludovic.barre@st.com \
    --cc=alexandre.torgue@st.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gerald.baeza@st.com \
    --cc=jason@lakedaemon.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=loic.pallardy@st.com \
    --cc=marc.zyngier@arm.com \
    --cc=mcoquelin.stm32@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.