From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, mike.leach@linaro.org, robert.walker@arm.com, mark.rutland@arm.com, will.deacon@arm.com, robin.murphy@arm.com, sudeep.holla@arm.com, frowand.list@gmail.com, robh@kernel.org, john.horley@arm.com, Suzuki K Poulose <suzuki.poulose@arm.com> Subject: [PATCH v2 25/27] coresight: etr_buf: Add helper for padding an area of trace data Date: Tue, 1 May 2018 10:10:55 +0100 [thread overview] Message-ID: <1525165857-11096-26-git-send-email-suzuki.poulose@arm.com> (raw) In-Reply-To: <1525165857-11096-1-git-send-email-suzuki.poulose@arm.com> This patch adds a helper to insert barrier packets for a given size (aligned to packet size) at given offset in an etr_buf. This will be used later for perf mode when we try to start in the middle of an SG buffer. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 53 ++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 7551272..8159e84 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1083,18 +1083,59 @@ static ssize_t tmc_etr_buf_get_data(struct etr_buf *etr_buf, return etr_buf->ops->get_data(etr_buf, (u64)offset, len, bufpp); } +/* + * tmc_etr_buf_insert_barrier_packets : Insert barrier packets at @offset upto + * @size of bytes in the given buffer. @size should be aligned to the barrier + * packet size. + * + * Returns the new @offset after filling the barriers on success. Otherwise + * returns error. + */ static inline s64 -tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset) +tmc_etr_buf_insert_barrier_packets(struct etr_buf *etr_buf, + u64 offset, u64 size) { ssize_t len; char *bufp; - len = tmc_etr_buf_get_data(etr_buf, offset, - CORESIGHT_BARRIER_PKT_SIZE, &bufp); - if (WARN_ON(len <= CORESIGHT_BARRIER_PKT_SIZE)) + if (size < CORESIGHT_BARRIER_PKT_SIZE) return -EINVAL; - coresight_insert_barrier_packet(bufp); - return offset + CORESIGHT_BARRIER_PKT_SIZE; + /* + * Normally the size should be aligned to the frame size + * of the ETR. Even if it isn't, the decoder looks for a + * barrier packet at a frame size aligned offset. So align + * the buffer to frame size first and then fill barrier + * packets. + */ + do { + len = tmc_etr_buf_get_data(etr_buf, offset, size, &bufp); + if (WARN_ON(len <= 0)) + return -EINVAL; + /* + * We are guaranteed that @bufp will point to a linear range + * of @len bytes, where @len <= @size. + */ + size -= len; + offset += len; + while (len >= CORESIGHT_BARRIER_PKT_SIZE) { + coresight_insert_barrier_packet(bufp); + bufp += CORESIGHT_BARRIER_PKT_SIZE; + len -= CORESIGHT_BARRIER_PKT_SIZE; + } + + /* If we reached the end of the buffer, wrap around */ + if (offset == etr_buf->size) + offset -= etr_buf->size; + } while (size); + + return offset; +} + +static inline s64 +tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset) +{ + return tmc_etr_buf_insert_barrier_packets(etr_buf, offset, + CORESIGHT_BARRIER_PKT_SIZE); } /* -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: suzuki.poulose@arm.com (Suzuki K Poulose) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 25/27] coresight: etr_buf: Add helper for padding an area of trace data Date: Tue, 1 May 2018 10:10:55 +0100 [thread overview] Message-ID: <1525165857-11096-26-git-send-email-suzuki.poulose@arm.com> (raw) In-Reply-To: <1525165857-11096-1-git-send-email-suzuki.poulose@arm.com> This patch adds a helper to insert barrier packets for a given size (aligned to packet size) at given offset in an etr_buf. This will be used later for perf mode when we try to start in the middle of an SG buffer. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 53 ++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 7551272..8159e84 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1083,18 +1083,59 @@ static ssize_t tmc_etr_buf_get_data(struct etr_buf *etr_buf, return etr_buf->ops->get_data(etr_buf, (u64)offset, len, bufpp); } +/* + * tmc_etr_buf_insert_barrier_packets : Insert barrier packets at @offset upto + * @size of bytes in the given buffer. @size should be aligned to the barrier + * packet size. + * + * Returns the new @offset after filling the barriers on success. Otherwise + * returns error. + */ static inline s64 -tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset) +tmc_etr_buf_insert_barrier_packets(struct etr_buf *etr_buf, + u64 offset, u64 size) { ssize_t len; char *bufp; - len = tmc_etr_buf_get_data(etr_buf, offset, - CORESIGHT_BARRIER_PKT_SIZE, &bufp); - if (WARN_ON(len <= CORESIGHT_BARRIER_PKT_SIZE)) + if (size < CORESIGHT_BARRIER_PKT_SIZE) return -EINVAL; - coresight_insert_barrier_packet(bufp); - return offset + CORESIGHT_BARRIER_PKT_SIZE; + /* + * Normally the size should be aligned to the frame size + * of the ETR. Even if it isn't, the decoder looks for a + * barrier packet@a frame size aligned offset. So align + * the buffer to frame size first and then fill barrier + * packets. + */ + do { + len = tmc_etr_buf_get_data(etr_buf, offset, size, &bufp); + if (WARN_ON(len <= 0)) + return -EINVAL; + /* + * We are guaranteed that @bufp will point to a linear range + * of @len bytes, where @len <= @size. + */ + size -= len; + offset += len; + while (len >= CORESIGHT_BARRIER_PKT_SIZE) { + coresight_insert_barrier_packet(bufp); + bufp += CORESIGHT_BARRIER_PKT_SIZE; + len -= CORESIGHT_BARRIER_PKT_SIZE; + } + + /* If we reached the end of the buffer, wrap around */ + if (offset == etr_buf->size) + offset -= etr_buf->size; + } while (size); + + return offset; +} + +static inline s64 +tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset) +{ + return tmc_etr_buf_insert_barrier_packets(etr_buf, offset, + CORESIGHT_BARRIER_PKT_SIZE); } /* -- 2.7.4
next prev parent reply other threads:[~2018-05-01 9:13 UTC|newest] Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-05-01 9:10 [PATCH v2 00/27] coresight: TMC ETR backend support for perf Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 01/27] coresight: ETM: Add support for ARM Cortex-A73 Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 02/27] coresight: Cleanup device subtype struct Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 03/27] coresight: Add helper device type Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-03 17:00 ` Mathieu Poirier 2018-05-03 17:00 ` Mathieu Poirier 2018-05-05 9:56 ` Suzuki K Poulose 2018-05-05 9:56 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 04/27] coresight: Introduce support for Coresight Addrss Translation Unit Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-03 17:31 ` Mathieu Poirier 2018-05-03 17:31 ` Mathieu Poirier 2018-05-03 20:25 ` Mathieu Poirier 2018-05-03 20:25 ` Mathieu Poirier 2018-05-05 10:03 ` Suzuki K Poulose 2018-05-05 10:03 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 05/27] dts: bindings: Document device tree binding for CATU Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 13:10 ` Rob Herring 2018-05-01 13:10 ` Rob Herring 2018-05-03 17:42 ` Mathieu Poirier 2018-05-03 17:42 ` Mathieu Poirier 2018-05-08 15:40 ` Suzuki K Poulose 2018-05-08 15:40 ` Suzuki K Poulose 2018-05-11 16:05 ` Rob Herring 2018-05-11 16:05 ` Rob Herring 2018-05-14 14:42 ` Mathieu Poirier 2018-05-14 14:42 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 06/27] coresight: tmc etr: Disallow perf mode temporarily Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 07/27] coresight: tmc: Hide trace buffer handling for file read Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-03 19:50 ` Mathieu Poirier 2018-05-03 19:50 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 08/27] coresight: tmc-etr: Do not clean trace buffer Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 09/27] coresight: Add helper for inserting synchronization packets Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 10/27] dts: bindings: Restrict coresight tmc-etr scatter-gather mode Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 13:13 ` Rob Herring 2018-05-01 13:13 ` Rob Herring 2018-05-03 20:32 ` Mathieu Poirier 2018-05-03 20:32 ` Mathieu Poirier 2018-05-04 22:56 ` Rob Herring 2018-05-04 22:56 ` Rob Herring 2018-05-08 15:48 ` Suzuki K Poulose 2018-05-08 15:48 ` Suzuki K Poulose 2018-05-08 17:34 ` Rob Herring 2018-05-08 17:34 ` Rob Herring 2018-05-01 9:10 ` [PATCH v2 11/27] dts: juno: Add scatter-gather support for all revisions Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 12/27] coresight: tmc-etr: Allow commandline option to override SG use Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-03 20:40 ` Mathieu Poirier 2018-05-03 20:40 ` Mathieu Poirier 2018-05-08 15:49 ` Suzuki K Poulose 2018-05-08 15:49 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 13/27] coresight: Add generic TMC sg table framework Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-04 17:35 ` Mathieu Poirier 2018-05-04 17:35 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 14/27] coresight: Add support for TMC ETR SG unit Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 15/27] coresight: tmc-etr: Make SG table circular Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 16/27] coresight: tmc-etr: Add transparent buffer management Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-07 17:20 ` Mathieu Poirier 2018-05-07 17:20 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 17/27] coresight: etr: Add support for save restore buffers Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-07 17:48 ` Mathieu Poirier 2018-05-07 17:48 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 18/27] coresight: catu: Add support for scatter gather tables Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-07 20:25 ` Mathieu Poirier 2018-05-07 20:25 ` Mathieu Poirier 2018-05-08 15:56 ` Suzuki K Poulose 2018-05-08 15:56 ` Suzuki K Poulose 2018-05-08 16:13 ` Mathieu Poirier 2018-05-08 16:13 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 19/27] coresight: catu: Plug in CATU as a backend for ETR buffer Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-07 22:02 ` Mathieu Poirier 2018-05-07 22:02 ` Mathieu Poirier 2018-05-08 16:21 ` Suzuki K Poulose 2018-05-08 16:21 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 20/27] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 21/27] coresight: Convert driver messages to dev_dbg Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-02 3:55 ` Kim Phillips 2018-05-02 3:55 ` Kim Phillips 2018-05-02 8:25 ` Robert Walker 2018-05-02 8:25 ` Robert Walker 2018-05-02 13:52 ` Robin Murphy 2018-05-02 13:52 ` Robin Murphy 2018-05-10 13:36 ` Suzuki K Poulose 2018-05-10 13:36 ` Suzuki K Poulose 2018-05-07 22:28 ` Mathieu Poirier 2018-05-07 22:28 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 22/27] coresight: tmc-etr: Track if the device is coherent Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 23/27] coresight: tmc-etr: Handle driver mode specific ETR buffers Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-08 17:18 ` Mathieu Poirier 2018-05-08 17:18 ` Mathieu Poirier 2018-05-08 21:51 ` Suzuki K Poulose 2018-05-08 21:51 ` Suzuki K Poulose 2018-05-09 17:12 ` Mathieu Poirier 2018-05-09 17:12 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 24/27] coresight: tmc-etr: Relax collection of trace from sysfs mode Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-07 22:54 ` Mathieu Poirier 2018-05-07 22:54 ` Mathieu Poirier 2018-05-01 9:10 ` Suzuki K Poulose [this message] 2018-05-01 9:10 ` [PATCH v2 25/27] coresight: etr_buf: Add helper for padding an area of trace data Suzuki K Poulose 2018-05-08 17:34 ` Mathieu Poirier 2018-05-08 17:34 ` Mathieu Poirier 2018-05-01 9:10 ` [PATCH v2 26/27] coresight: perf: Remove reset_buffer call back for sinks Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-08 19:42 ` Mathieu Poirier 2018-05-08 19:42 ` Mathieu Poirier 2018-05-11 16:35 ` Suzuki K Poulose 2018-05-11 16:35 ` Suzuki K Poulose 2018-05-01 9:10 ` [PATCH v2 27/27] coresight: etm-perf: Add support for ETR backend Suzuki K Poulose 2018-05-01 9:10 ` Suzuki K Poulose 2018-05-08 22:04 ` Mathieu Poirier 2018-05-08 22:04 ` Mathieu Poirier
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