[PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

	Hi Simon, Magnus,

The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB
development boards supports DDR Backup Power, which means that the DDR
power rails can be kept powered while the main SoC is powered down.

For this to function correctly, the DDR Backup Power configuration
must be described in DT, which is the topic of this series:
  - The first patch adds the missing device node for the BD9571 PMIC on
    the ULCB boards,
  - The last two patches add DDR Backup Mode configuration for
    Salvator-X(S) and ULCB.

Changes compared to v3:
  - Use a hex value for the bit mask.

Changes compared to v2:
  - Add support for ULCB,
  - Add "rohm,rstbmode-level" for Salvator-X(S).

The relevant DT binding updates have been accepted in
regulator/for-next, as well as driver support for DDR Backup Mode on
systems with momentary power switches ("rohm,rstbmode-pulse"), like
ULCB.  Combined with this series, the PMIC on ULCB will be configured
automatically during system suspend.

Note that driver support for systems with toggle power swiches
("rohm,rstbmode-level"), like Salvator-X(S), is still under review
(https://lkml.org/lkml/2018/3/14/324).  But as DT describes hardware,
not software limitations, this series is safe to apply.

This has been tested on M3ULCB (thanks Jacopo!), and on Salvator-X(S).
All support has been part of renesas-drivers since a few releases.

Thanks for applying!

Geert Uytterhoeven (3):
  arm64: dts: renesas: ulcb: Add BD9571 PMIC
  arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
  arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config

 arch/arm64/boot/dts/renesas/salvator-common.dtsi |  2 ++
 arch/arm64/boot/dts/renesas/ulcb.dtsi            | 31 ++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

-- 
2.7.4

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

	Hi Simon, Magnus,

The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB
development boards supports DDR Backup Power, which means that the DDR
power rails can be kept powered while the main SoC is powered down.

For this to function correctly, the DDR Backup Power configuration
must be described in DT, which is the topic of this series:
  - The first patch adds the missing device node for the BD9571 PMIC on
    the ULCB boards,
  - The last two patches add DDR Backup Mode configuration for
    Salvator-X(S) and ULCB.

Changes compared to v3:
  - Use a hex value for the bit mask.

Changes compared to v2:
  - Add support for ULCB,
  - Add "rohm,rstbmode-level" for Salvator-X(S).

The relevant DT binding updates have been accepted in
regulator/for-next, as well as driver support for DDR Backup Mode on
systems with momentary power switches ("rohm,rstbmode-pulse"), like
ULCB.  Combined with this series, the PMIC on ULCB will be configured
automatically during system suspend.

Note that driver support for systems with toggle power swiches
("rohm,rstbmode-level"), like Salvator-X(S), is still under review
(https://lkml.org/lkml/2018/3/14/324).  But as DT describes hardware,
not software limitations, this series is safe to apply.

This has been tested on M3ULCB (thanks Jacopo!), and on Salvator-X(S).
All support has been part of renesas-drivers since a few releases.

Thanks for applying!

Geert Uytterhoeven (3):
  arm64: dts: renesas: ulcb: Add BD9571 PMIC
  arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
  arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config

 arch/arm64/boot/dts/renesas/salvator-common.dtsi |  2 ++
 arch/arm64/boot/dts/renesas/ulcb.dtsi            | 31 ++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

-- 
2.7.4

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

	Hi Simon, Magnus,

The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB
development boards supports DDR Backup Power, which means that the DDR
power rails can be kept powered while the main SoC is powered down.

For this to function correctly, the DDR Backup Power configuration
must be described in DT, which is the topic of this series:
  - The first patch adds the missing device node for the BD9571 PMIC on
    the ULCB boards,
  - The last two patches add DDR Backup Mode configuration for
    Salvator-X(S) and ULCB.

Changes compared to v3:
  - Use a hex value for the bit mask.

Changes compared to v2:
  - Add support for ULCB,
  - Add "rohm,rstbmode-level" for Salvator-X(S).

The relevant DT binding updates have been accepted in
regulator/for-next, as well as driver support for DDR Backup Mode on
systems with momentary power switches ("rohm,rstbmode-pulse"), like
ULCB.  Combined with this series, the PMIC on ULCB will be configured
automatically during system suspend.

Note that driver support for systems with toggle power swiches
("rohm,rstbmode-level"), like Salvator-X(S), is still under review
(https://lkml.org/lkml/2018/3/14/324).  But as DT describes hardware,
not software limitations, this series is safe to apply.

This has been tested on M3ULCB (thanks Jacopo!), and on Salvator-X(S).
All support has been part of renesas-drivers since a few releases.

Thanks for applying!

Geert Uytterhoeven (3):
  arm64: dts: renesas: ulcb: Add BD9571 PMIC
  arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
  arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config

 arch/arm64/boot/dts/renesas/salvator-common.dtsi |  2 ++
 arch/arm64/boot/dts/renesas/ulcb.dtsi            | 31 ++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

-- 
2.7.4

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH v3 1/3] arm64: dts: renesas: ulcb: Add BD9571 PMIC

[Geert Uytterhoeven]

Add a device node for the ROHM BD9571MWV PMIC.

This was based on the example in the DT binding documentation, but using
IRQ0 instead of a GPIO interrupt, as that matches the schematics, and
because INTC-EX is a simpler block.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - No changes,

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 6f814845f8b665f3..bb21ae335e8b8489 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -243,6 +243,30 @@
 
 &i2c_dvfs {
 	status = "okay";
+
+	pmic: pmic@30 {
+		pinctrl-0 = <&irq0_pins>;
+		pinctrl-names = "default";
+
+		compatible = "rohm,bd9571mwv";
+		reg = <0x30>;
+		interrupt-parent = <&intc_ex>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		regulators {
+			dvfs: dvfs {
+				regulator-name = "dvfs";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1030000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 &ohci1 {
@@ -276,6 +300,11 @@
 		function = "i2c2";
 	};
 
+	irq0_pins: irq0 {
+		groups = "intc_ex_irq0";
+		function = "intc_ex";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data_a";
 		function = "scif2";
-- 
2.7.4

[PATCH v3 1/3] arm64: dts: renesas: ulcb: Add BD9571 PMIC

[Geert Uytterhoeven]

Add a device node for the ROHM BD9571MWV PMIC.

This was based on the example in the DT binding documentation, but using
IRQ0 instead of a GPIO interrupt, as that matches the schematics, and
because INTC-EX is a simpler block.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - No changes,

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 6f814845f8b665f3..bb21ae335e8b8489 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -243,6 +243,30 @@
 
 &i2c_dvfs {
 	status = "okay";
+
+	pmic: pmic@30 {
+		pinctrl-0 = <&irq0_pins>;
+		pinctrl-names = "default";
+
+		compatible = "rohm,bd9571mwv";
+		reg = <0x30>;
+		interrupt-parent = <&intc_ex>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		regulators {
+			dvfs: dvfs {
+				regulator-name = "dvfs";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1030000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 &ohci1 {
@@ -276,6 +300,11 @@
 		function = "i2c2";
 	};
 
+	irq0_pins: irq0 {
+		groups = "intc_ex_irq0";
+		function = "intc_ex";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data_a";
 		function = "scif2";
-- 
2.7.4

[PATCH v3 1/3] arm64: dts: renesas: ulcb: Add BD9571 PMIC

[Geert Uytterhoeven]

Add a device node for the ROHM BD9571MWV PMIC.

This was based on the example in the DT binding documentation, but using
IRQ0 instead of a GPIO interrupt, as that matches the schematics, and
because INTC-EX is a simpler block.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - No changes,

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 6f814845f8b665f3..bb21ae335e8b8489 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -243,6 +243,30 @@
 
 &i2c_dvfs {
 	status = "okay";
+
+	pmic: pmic at 30 {
+		pinctrl-0 = <&irq0_pins>;
+		pinctrl-names = "default";
+
+		compatible = "rohm,bd9571mwv";
+		reg = <0x30>;
+		interrupt-parent = <&intc_ex>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		regulators {
+			dvfs: dvfs {
+				regulator-name = "dvfs";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1030000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 &ohci1 {
@@ -276,6 +300,11 @@
 		function = "i2c2";
 	};
 
+	irq0_pins: irq0 {
+		groups = "intc_ex_irq0";
+		function = "intc_ex";
+	};
+
 	scif2_pins: scif2 {
 		groups = "scif2_data_a";
 		function = "scif2";
-- 
2.7.4

[PATCH v3 2/3] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails
need to be kept powered when backup mode is enabled.  Reflect this in
the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node.

The accessory power switch (SW23) is a toggle switch, hense specify
"rohm,rstbmode-level".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - Use a hex value for the bit mask,

v2:
  - Add rohm,rstbmode-level.
---
 arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 2a7f36abd2dd85c6..0292c5072ef7a2fe 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -376,6 +376,8 @@
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0xf>;
+		rohm,rstbmode-level;
 
 		regulators {
 			dvfs: dvfs {
-- 
2.7.4

[PATCH v3 2/3] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails
need to be kept powered when backup mode is enabled.  Reflect this in
the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node.

The accessory power switch (SW23) is a toggle switch, hense specify
"rohm,rstbmode-level".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - Use a hex value for the bit mask,

v2:
  - Add rohm,rstbmode-level.
---
 arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 2a7f36abd2dd85c6..0292c5072ef7a2fe 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -376,6 +376,8 @@
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0xf>;
+		rohm,rstbmode-level;
 
 		regulators {
 			dvfs: dvfs {
-- 
2.7.4

[PATCH v3 2/3] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails
need to be kept powered when backup mode is enabled.  Reflect this in
the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node.

The accessory power switch (SW23) is a toggle switch, hense specify
"rohm,rstbmode-level".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - Use a hex value for the bit mask,

v2:
  - Add rohm,rstbmode-level.
---
 arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 2a7f36abd2dd85c6..0292c5072ef7a2fe 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -376,6 +376,8 @@
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0xf>;
+		rohm,rstbmode-level;
 
 		regulators {
 			dvfs: dvfs {
-- 
2.7.4

[PATCH v3 3/3] arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and
DDR1C power rails need to be kept powered when backup mode is enabled.
Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV
PMIC node.

The accessory power switch (SW8) is a momentary switch, hense specify
"rohm,rstbmode-pulse".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - Use a hex value for the bit mask,

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index bb21ae335e8b8489..432a4e9752f2b923 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -256,6 +256,8 @@
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0xf>;
+		rohm,rstbmode-pulse;
 
 		regulators {
 			dvfs: dvfs {
-- 
2.7.4

[PATCH v3 3/3] arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and
DDR1C power rails need to be kept powered when backup mode is enabled.
Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV
PMIC node.

The accessory power switch (SW8) is a momentary switch, hense specify
"rohm,rstbmode-pulse".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - Use a hex value for the bit mask,

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index bb21ae335e8b8489..432a4e9752f2b923 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -256,6 +256,8 @@
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0xf>;
+		rohm,rstbmode-pulse;
 
 		regulators {
 			dvfs: dvfs {
-- 
2.7.4

[PATCH v3 3/3] arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config

[Geert Uytterhoeven]

On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and
DDR1C power rails need to be kept powered when backup mode is enabled.
Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV
PMIC node.

The accessory power switch (SW8) is a momentary switch, hense specify
"rohm,rstbmode-pulse".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v3:
  - Use a hex value for the bit mask,

v2:
  - New.
---
 arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index bb21ae335e8b8489..432a4e9752f2b923 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -256,6 +256,8 @@
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0xf>;
+		rohm,rstbmode-pulse;
 
 		regulators {
 			dvfs: dvfs {
-- 
2.7.4

Re: [PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[Simon Horman]

On Thu, May 03, 2018 at 02:30:48PM +0200, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB
> development boards supports DDR Backup Power, which means that the DDR
> power rails can be kept powered while the main SoC is powered down.
> 
> For this to function correctly, the DDR Backup Power configuration
> must be described in DT, which is the topic of this series:
>   - The first patch adds the missing device node for the BD9571 PMIC on
>     the ULCB boards,
>   - The last two patches add DDR Backup Mode configuration for
>     Salvator-X(S) and ULCB.
> 
> Changes compared to v3:
>   - Use a hex value for the bit mask.
> 
> Changes compared to v2:
>   - Add support for ULCB,
>   - Add "rohm,rstbmode-level" for Salvator-X(S).
> 
> The relevant DT binding updates have been accepted in
> regulator/for-next, as well as driver support for DDR Backup Mode on
> systems with momentary power switches ("rohm,rstbmode-pulse"), like
> ULCB.  Combined with this series, the PMIC on ULCB will be configured
> automatically during system suspend.
> 
> Note that driver support for systems with toggle power swiches
> ("rohm,rstbmode-level"), like Salvator-X(S), is still under review
> (https://lkml.org/lkml/2018/3/14/324).  But as DT describes hardware,
> not software limitations, this series is safe to apply.
> 
> This has been tested on M3ULCB (thanks Jacopo!), and on Salvator-X(S).
> All support has been part of renesas-drivers since a few releases.
> 
> Thanks for applying!

Thanks, applied.

Re: [PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[Simon Horman]

On Thu, May 03, 2018 at 02:30:48PM +0200, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB
> development boards supports DDR Backup Power, which means that the DDR
> power rails can be kept powered while the main SoC is powered down.
> 
> For this to function correctly, the DDR Backup Power configuration
> must be described in DT, which is the topic of this series:
>   - The first patch adds the missing device node for the BD9571 PMIC on
>     the ULCB boards,
>   - The last two patches add DDR Backup Mode configuration for
>     Salvator-X(S) and ULCB.
> 
> Changes compared to v3:
>   - Use a hex value for the bit mask.
> 
> Changes compared to v2:
>   - Add support for ULCB,
>   - Add "rohm,rstbmode-level" for Salvator-X(S).
> 
> The relevant DT binding updates have been accepted in
> regulator/for-next, as well as driver support for DDR Backup Mode on
> systems with momentary power switches ("rohm,rstbmode-pulse"), like
> ULCB.  Combined with this series, the PMIC on ULCB will be configured
> automatically during system suspend.
> 
> Note that driver support for systems with toggle power swiches
> ("rohm,rstbmode-level"), like Salvator-X(S), is still under review
> (https://lkml.org/lkml/2018/3/14/324).  But as DT describes hardware,
> not software limitations, this series is safe to apply.
> 
> This has been tested on M3ULCB (thanks Jacopo!), and on Salvator-X(S).
> All support has been part of renesas-drivers since a few releases.
> 
> Thanks for applying!

Thanks, applied.

[PATCH v3 0/3] arm64: dts: renesas: salvator-x(s)/ulcb: Add PMIC DDR Backup Power config

[Simon Horman]

On Thu, May 03, 2018 at 02:30:48PM +0200, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> The ROHM BD9571MWV PMIC on the Renesas Salvator-X(S) and ULCB
> development boards supports DDR Backup Power, which means that the DDR
> power rails can be kept powered while the main SoC is powered down.
> 
> For this to function correctly, the DDR Backup Power configuration
> must be described in DT, which is the topic of this series:
>   - The first patch adds the missing device node for the BD9571 PMIC on
>     the ULCB boards,
>   - The last two patches add DDR Backup Mode configuration for
>     Salvator-X(S) and ULCB.
> 
> Changes compared to v3:
>   - Use a hex value for the bit mask.
> 
> Changes compared to v2:
>   - Add support for ULCB,
>   - Add "rohm,rstbmode-level" for Salvator-X(S).
> 
> The relevant DT binding updates have been accepted in
> regulator/for-next, as well as driver support for DDR Backup Mode on
> systems with momentary power switches ("rohm,rstbmode-pulse"), like
> ULCB.  Combined with this series, the PMIC on ULCB will be configured
> automatically during system suspend.
> 
> Note that driver support for systems with toggle power swiches
> ("rohm,rstbmode-level"), like Salvator-X(S), is still under review
> (https://lkml.org/lkml/2018/3/14/324).  But as DT describes hardware,
> not software limitations, this series is safe to apply.
> 
> This has been tested on M3ULCB (thanks Jacopo!), and on Salvator-X(S).
> All support has been part of renesas-drivers since a few releases.
> 
> Thanks for applying!

Thanks, applied.