[PATCH v2] clk: x86: Add ST oscout platform clock

[PATCH v2] clk: x86: Add ST oscout platform clock

[Akshu Agrawal]

Stoney SoC provides oscout clock. This clock can support 25Mhz and
48Mhz of frequency.
The clock is available for general system use.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
---
v2: config change, added SPDX tag and used clk_hw_register_.
 drivers/clk/x86/Makefile             |  1 +
 drivers/clk/x86/clk-st.c             | 86 ++++++++++++++++++++++++++++++++++++
 include/linux/platform_data/clk-st.h | 35 +++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/clk/x86/clk-st.c
 create mode 100644 include/linux/platform_data/clk-st.h

diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile
index 1367afb..2aee002 100644
--- a/drivers/clk/x86/Makefile
+++ b/drivers/clk/x86/Makefile
@@ -1,3 +1,4 @@
 clk-x86-lpss-objs		:= clk-lpt.o
 obj-$(CONFIG_X86_INTEL_LPSS)	+= clk-x86-lpss.o
 obj-$(CONFIG_PMC_ATOM)		+= clk-pmc-atom.o
+obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)	+= clk-st.o
diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
new file mode 100644
index 0000000..d8c283c
--- /dev/null
+++ b/drivers/clk/x86/clk-st.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * clock framework for AMD Stoney based clocks
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/platform_data/clk-st.h>
+#include <linux/platform_device.h>
+
+/* Clock Driving Strength 2 register */
+#define CLKDRVSTR2	0x28
+/* Clock Control 1 register */
+#define MISCCLKCNTL1	0x40
+/* Auxiliary clock1 enable bit */
+#define OSCCLKENB	2
+/* 25Mhz auxiliary output clock freq bit */
+#define OSCOUT1CLK25MHZ	16
+
+#define ST_CLK_48M	0
+#define ST_CLK_25M	1
+#define ST_CLK_MUX	2
+#define ST_CLK_GATE	3
+#define ST_MAX_CLKS	4
+
+static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };
+
+static int st_clk_probe(struct platform_device *pdev)
+{
+	struct st_clk_data *st_data;
+	struct clk_hw **hws;
+
+	st_data = dev_get_platdata(&pdev->dev);
+	if (!st_data || !st_data->base)
+		return -EINVAL;
+
+	hws = kzalloc(sizeof(*hws) * ST_MAX_CLKS, GFP_KERNEL);
+
+	hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,
+						     48000000);
+	hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0,
+						     25000000);
+
+	hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",
+		clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
+		0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);
+
+	clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
+
+	hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
+		0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
+		CLK_GATE_SET_TO_DISABLE, NULL);
+
+	clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);
+
+	return 0;
+}
+
+static struct platform_driver st_clk_driver = {
+	.driver = {
+		.name = "clk-st",
+	},
+	.probe = st_clk_probe,
+};
+builtin_platform_driver(st_clk_driver);
diff --git a/include/linux/platform_data/clk-st.h b/include/linux/platform_data/clk-st.h
new file mode 100644
index 0000000..6a992e9
--- /dev/null
+++ b/include/linux/platform_data/clk-st.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * clock framework for AMD Stoney based clock
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __CLK_ST_H
+#define __CLK_ST_H
+
+#include <linux/compiler.h>
+
+struct st_clk_data {
+	void __iomem *base;
+};
+
+#endif /* __CLK_ST_H */
-- 
1.9.1

[PATCH v2] clk: x86: Add ST oscout platform clock

[Akshu Agrawal]

Stoney SoC provides oscout clock. This clock can support 25Mhz and
48Mhz of frequency.
The clock is available for general system use.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
---
v2: config change, added SPDX tag and used clk_hw_register_.
 drivers/clk/x86/Makefile             |  1 +
 drivers/clk/x86/clk-st.c             | 86 ++++++++++++++++++++++++++++++++++++
 include/linux/platform_data/clk-st.h | 35 +++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/clk/x86/clk-st.c
 create mode 100644 include/linux/platform_data/clk-st.h

diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile
index 1367afb..2aee002 100644
--- a/drivers/clk/x86/Makefile
+++ b/drivers/clk/x86/Makefile
@@ -1,3 +1,4 @@
 clk-x86-lpss-objs		:= clk-lpt.o
 obj-$(CONFIG_X86_INTEL_LPSS)	+= clk-x86-lpss.o
 obj-$(CONFIG_PMC_ATOM)		+= clk-pmc-atom.o
+obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)	+= clk-st.o
diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
new file mode 100644
index 0000000..d8c283c
--- /dev/null
+++ b/drivers/clk/x86/clk-st.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * clock framework for AMD Stoney based clocks
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/platform_data/clk-st.h>
+#include <linux/platform_device.h>
+
+/* Clock Driving Strength 2 register */
+#define CLKDRVSTR2	0x28
+/* Clock Control 1 register */
+#define MISCCLKCNTL1	0x40
+/* Auxiliary clock1 enable bit */
+#define OSCCLKENB	2
+/* 25Mhz auxiliary output clock freq bit */
+#define OSCOUT1CLK25MHZ	16
+
+#define ST_CLK_48M	0
+#define ST_CLK_25M	1
+#define ST_CLK_MUX	2
+#define ST_CLK_GATE	3
+#define ST_MAX_CLKS	4
+
+static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };
+
+static int st_clk_probe(struct platform_device *pdev)
+{
+	struct st_clk_data *st_data;
+	struct clk_hw **hws;
+
+	st_data = dev_get_platdata(&pdev->dev);
+	if (!st_data || !st_data->base)
+		return -EINVAL;
+
+	hws = kzalloc(sizeof(*hws) * ST_MAX_CLKS, GFP_KERNEL);
+
+	hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,
+						     48000000);
+	hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0,
+						     25000000);
+
+	hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",
+		clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
+		0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);
+
+	clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
+
+	hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
+		0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
+		CLK_GATE_SET_TO_DISABLE, NULL);
+
+	clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);
+
+	return 0;
+}
+
+static struct platform_driver st_clk_driver = {
+	.driver = {
+		.name = "clk-st",
+	},
+	.probe = st_clk_probe,
+};
+builtin_platform_driver(st_clk_driver);
diff --git a/include/linux/platform_data/clk-st.h b/include/linux/platform_data/clk-st.h
new file mode 100644
index 0000000..6a992e9
--- /dev/null
+++ b/include/linux/platform_data/clk-st.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * clock framework for AMD Stoney based clock
+ *
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __CLK_ST_H
+#define __CLK_ST_H
+
+#include <linux/compiler.h>
+
+struct st_clk_data {
+	void __iomem *base;
+};
+
+#endif /* __CLK_ST_H */
-- 
1.9.1

Re: [PATCH v2] clk: x86: Add ST oscout platform clock

[kbuild test robot]

Hi Akshu,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on v4.17-rc3 next-20180503]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Akshu-Agrawal/clk-x86-Add-ST-oscout-platform-clock/20180503-214044
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next

smatch warnings:
drivers/clk/x86/clk-st.c:60 st_clk_probe() error: potential null dereference 'hws'.  (kzalloc returns null)

vim +/hws +60 drivers/clk/x86/clk-st.c

    48	
    49	static int st_clk_probe(struct platform_device *pdev)
    50	{
    51		struct st_clk_data *st_data;
    52		struct clk_hw **hws;
    53	
    54		st_data = dev_get_platdata(&pdev->dev);
    55		if (!st_data || !st_data->base)
    56			return -EINVAL;
    57	
    58		hws = kzalloc(sizeof(*hws) * ST_MAX_CLKS, GFP_KERNEL);
    59	
  > 60		hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,
    61							     48000000);
    62		hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0,
    63							     25000000);
    64	
    65		hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",
    66			clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
    67			0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);
    68	
    69		clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
    70	
    71		hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
    72			0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
    73			CLK_GATE_SET_TO_DISABLE, NULL);
    74	
    75		clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);
    76	
    77		return 0;
    78	}
    79	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

Re: [PATCH v2] clk: x86: Add ST oscout platform clock

[Stephen Boyd]

Quoting Akshu Agrawal (2018-05-03 01:30:26)
> diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile
> index 1367afb..2aee002 100644
> --- a/drivers/clk/x86/Makefile
> +++ b/drivers/clk/x86/Makefile
> @@ -1,3 +1,4 @@
>  clk-x86-lpss-objs              := clk-lpt.o
>  obj-$(CONFIG_X86_INTEL_LPSS)   += clk-x86-lpss.o
>  obj-$(CONFIG_PMC_ATOM)         += clk-pmc-atom.o
> +obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)  += clk-st.o

Ok. Can you sort this by kconfig? Or by file name?

> diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
> new file mode 100644
> index 0000000..d8c283c
> --- /dev/null
> +++ b/drivers/clk/x86/clk-st.c
> @@ -0,0 +1,86 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * clock framework for AMD Stoney based clocks
> + *
> + * Copyright 2018 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.

One point of SPDX is to avoid this boiler plate multi-line license
comments. Can you remove this and just leave the AMD copyright part?

> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk-provider.h>
> +#include <linux/platform_data/clk-st.h>
> +#include <linux/platform_device.h>
> +
> +/* Clock Driving Strength 2 register */
> +#define CLKDRVSTR2     0x28
> +/* Clock Control 1 register */
> +#define MISCCLKCNTL1   0x40
> +/* Auxiliary clock1 enable bit */
> +#define OSCCLKENB      2
> +/* 25Mhz auxiliary output clock freq bit */
> +#define OSCOUT1CLK25MHZ        16
> +
> +#define ST_CLK_48M     0
> +#define ST_CLK_25M     1
> +#define ST_CLK_MUX     2
> +#define ST_CLK_GATE    3
> +#define ST_MAX_CLKS    4
> +
> +static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };
> +
> +static int st_clk_probe(struct platform_device *pdev)
> +{
> +       struct st_clk_data *st_data;
> +       struct clk_hw **hws;
> +
> +       st_data = dev_get_platdata(&pdev->dev);
> +       if (!st_data || !st_data->base)
> +               return -EINVAL;
> +
> +       hws = kzalloc(sizeof(*hws) * ST_MAX_CLKS, GFP_KERNEL);

Fix the kbuild robot errors please.

> +
> +       hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,
> +                                                    48000000);
> +       hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0,
> +                                                    25000000);

I'm not sure why we even keep these pointers around though. The driver
doesn't expose them as clks that clk_get() can find so they could just
be local variables and no heap allocation is needed.

> +
> +       hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",
> +               clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
> +               0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);
> +
> +       clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
> +
> +       hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
> +               0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
> +               CLK_GATE_SET_TO_DISABLE, NULL);
> +
> +       clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);

Could use devm_*() here in case you want to drop this stuff on driver
removal?

> +
> +       return 0;
> +}
> +
> +static struct platform_driver st_clk_driver = {
> +       .driver = {
> +               .name = "clk-st",
> +       },
> +       .probe = st_clk_probe,

suppress attributes here to prevent unbinding from sysfs?

> +};
> +builtin_platform_driver(st_clk_driver);

Re: [PATCH v2] clk: x86: Add ST oscout platform clock

[Stephen Boyd]

Quoting Akshu Agrawal (2018-05-03 01:30:26)
> diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile
> index 1367afb..2aee002 100644
> --- a/drivers/clk/x86/Makefile
> +++ b/drivers/clk/x86/Makefile
> @@ -1,3 +1,4 @@
>  clk-x86-lpss-objs              :=3D clk-lpt.o
>  obj-$(CONFIG_X86_INTEL_LPSS)   +=3D clk-x86-lpss.o
>  obj-$(CONFIG_PMC_ATOM)         +=3D clk-pmc-atom.o
> +obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)  +=3D clk-st.o

Ok. Can you sort this by kconfig? Or by file name?

> diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
> new file mode 100644
> index 0000000..d8c283c
> --- /dev/null
> +++ b/drivers/clk/x86/clk-st.c
> @@ -0,0 +1,86 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * clock framework for AMD Stoney based clocks
> + *
> + * Copyright 2018 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining=
 a
> + * copy of this software and associated documentation files (the "Softwa=
re"),
> + * to deal in the Software without restriction, including without limita=
tion
> + * the rights to use, copy, modify, merge, publish, distribute, sublicen=
se,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be includ=
ed in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRE=
SS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILI=
TY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SH=
ALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES=
 OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.

One point of SPDX is to avoid this boiler plate multi-line license
comments. Can you remove this and just leave the AMD copyright part?

> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk-provider.h>
> +#include <linux/platform_data/clk-st.h>
> +#include <linux/platform_device.h>
> +
> +/* Clock Driving Strength 2 register */
> +#define CLKDRVSTR2     0x28
> +/* Clock Control 1 register */
> +#define MISCCLKCNTL1   0x40
> +/* Auxiliary clock1 enable bit */
> +#define OSCCLKENB      2
> +/* 25Mhz auxiliary output clock freq bit */
> +#define OSCOUT1CLK25MHZ        16
> +
> +#define ST_CLK_48M     0
> +#define ST_CLK_25M     1
> +#define ST_CLK_MUX     2
> +#define ST_CLK_GATE    3
> +#define ST_MAX_CLKS    4
> +
> +static const char * const clk_oscout1_parents[] =3D { "clk48MHz", "clk25=
MHz" };
> +
> +static int st_clk_probe(struct platform_device *pdev)
> +{
> +       struct st_clk_data *st_data;
> +       struct clk_hw **hws;
> +
> +       st_data =3D dev_get_platdata(&pdev->dev);
> +       if (!st_data || !st_data->base)
> +               return -EINVAL;
> +
> +       hws =3D kzalloc(sizeof(*hws) * ST_MAX_CLKS, GFP_KERNEL);

Fix the kbuild robot errors please.

> +
> +       hws[ST_CLK_48M] =3D clk_hw_register_fixed_rate(NULL, "clk48MHz", =
NULL, 0,
> +                                                    48000000);
> +       hws[ST_CLK_25M] =3D clk_hw_register_fixed_rate(NULL, "clk25MHz", =
NULL, 0,
> +                                                    25000000);

I'm not sure why we even keep these pointers around though. The driver
doesn't expose them as clks that clk_get() can find so they could just
be local variables and no heap allocation is needed.

> +
> +       hws[ST_CLK_MUX] =3D clk_hw_register_mux(NULL, "oscout1_mux",
> +               clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
> +               0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NUL=
L);
> +
> +       clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
> +
> +       hws[ST_CLK_GATE] =3D clk_hw_register_gate(NULL, "oscout1", "oscou=
t1_mux",
> +               0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
> +               CLK_GATE_SET_TO_DISABLE, NULL);
> +
> +       clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);

Could use devm_*() here in case you want to drop this stuff on driver
removal?

> +
> +       return 0;
> +}
> +
> +static struct platform_driver st_clk_driver =3D {
> +       .driver =3D {
> +               .name =3D "clk-st",
> +       },
> +       .probe =3D st_clk_probe,

suppress attributes here to prevent unbinding from sysfs?

> +};
> +builtin_platform_driver(st_clk_driver);

Re: [PATCH v2] clk: x86: Add ST oscout platform clock

[Agrawal, Akshu]

On 5/5/2018 7:56 AM, Stephen Boyd wrote:
> Quoting Akshu Agrawal (2018-05-03 01:30:26)
>> diff --git a/drivers/clk/x86/Makefile b/drivers/clk/x86/Makefile
>> index 1367afb..2aee002 100644
>> --- a/drivers/clk/x86/Makefile
>> +++ b/drivers/clk/x86/Makefile
>> @@ -1,3 +1,4 @@
>>  clk-x86-lpss-objs              := clk-lpt.o
>>  obj-$(CONFIG_X86_INTEL_LPSS)   += clk-x86-lpss.o
>>  obj-$(CONFIG_PMC_ATOM)         += clk-pmc-atom.o
>> +obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)  += clk-st.o
> 
> Ok. Can you sort this by kconfig? Or by file name?
> 

Accepted.

>> diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
>> new file mode 100644
>> index 0000000..d8c283c
>> --- /dev/null
>> +++ b/drivers/clk/x86/clk-st.c
>> @@ -0,0 +1,86 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * clock framework for AMD Stoney based clocks
>> + *
>> + * Copyright 2018 Advanced Micro Devices, Inc.
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
>> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
> 
> One point of SPDX is to avoid this boiler plate multi-line license
> comments. Can you remove this and just leave the AMD copyright part?
> 

Accepted.

>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/clkdev.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/platform_data/clk-st.h>
>> +#include <linux/platform_device.h>
>> +
>> +/* Clock Driving Strength 2 register */
>> +#define CLKDRVSTR2     0x28
>> +/* Clock Control 1 register */
>> +#define MISCCLKCNTL1   0x40
>> +/* Auxiliary clock1 enable bit */
>> +#define OSCCLKENB      2
>> +/* 25Mhz auxiliary output clock freq bit */
>> +#define OSCOUT1CLK25MHZ        16
>> +
>> +#define ST_CLK_48M     0
>> +#define ST_CLK_25M     1
>> +#define ST_CLK_MUX     2
>> +#define ST_CLK_GATE    3
>> +#define ST_MAX_CLKS    4
>> +
>> +static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };
>> +
>> +static int st_clk_probe(struct platform_device *pdev)
>> +{
>> +       struct st_clk_data *st_data;
>> +       struct clk_hw **hws;
>> +
>> +       st_data = dev_get_platdata(&pdev->dev);
>> +       if (!st_data || !st_data->base)
>> +               return -EINVAL;
>> +
>> +       hws = kzalloc(sizeof(*hws) * ST_MAX_CLKS, GFP_KERNEL);
> 
> Fix the kbuild robot errors please.
>

Done in v3.

>> +
>> +       hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,
>> +                                                    48000000);
>> +       hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0,
>> +                                                    25000000);
> 
> I'm not sure why we even keep these pointers around though. The driver
> doesn't expose them as clks that clk_get() can find so they could just
> be local variables and no heap allocation is needed.
> 

Respining the patch with change to unregister clk_hw in the remove callback.
Will pass these pointers as drvdata to remove and use them to unregister.

>> +
>> +       hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",
>> +               clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
>> +               0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);
>> +
>> +       clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
>> +
>> +       hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
>> +               0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
>> +               CLK_GATE_SET_TO_DISABLE, NULL);
>> +
>> +       clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);
> 
> Could use devm_*() here in case you want to drop this stuff on driver
> removal?
> 

To achieve the same what you have suggested, I would be using remove as
explained in above comment.

>> +
>> +       return 0;
>> +}
>> +
>> +static struct platform_driver st_clk_driver = {
>> +       .driver = {
>> +               .name = "clk-st",
>> +       },
>> +       .probe = st_clk_probe,
> 
> suppress attributes here to prevent unbinding from sysfs?
> 

Accepted.

Thanks,
Akshu