[U-Boot] [PATCH 0/7] ARM: uniphier: support drive-strength pin configuration

[U-Boot] [PATCH 0/7] ARM: uniphier: support drive-strength pin configuration

[Masahiro Yamada]

I will merge this series after the release.



Masahiro Yamada (7):
  pinctrl: uniphier: remove unneeded pin data of LD6b
  pinctrl: uniphier: replace printf() with dev_err()
  pinctrl: uniphier: include <linux/build_bug.h> instead of
    <linux/bug.h>
  pinctrl: uniphier: support per-pin configuration via DT
  pinctrl: uniphier: support drive-strength configuration
  pinctrl: uniphier: add ethernet TX pin data for LD20
  ARM: uniphier: enable CONFIG_PINCONF

 configs/uniphier_v8_defconfig                    |   1 +
 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 140 ++++++++++++++++++++++-
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c |  11 ++
 drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c |  13 ---
 drivers/pinctrl/uniphier/pinctrl-uniphier.h      |  49 ++++++--
 5 files changed, 190 insertions(+), 24 deletions(-)

-- 
2.7.4

[U-Boot] [PATCH 1/7] pinctrl: uniphier: remove unneeded pin data of LD6b

[Masahiro Yamada]

Since commit f73cfb4d0dee ("pinctrl: uniphier: simplify input enable
and delete pin arrays"), these data are no longer used in any useful
way.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 13 -------------
 1 file changed, 13 deletions(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
index 6ade131..ed702c6 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
@@ -11,17 +11,6 @@
 
 #include "pinctrl-uniphier.h"
 
-static const struct uniphier_pinctrl_pin uniphier_ld6b_pins[] = {
-	UNIPHIER_PINCTRL_PIN(113, 0),
-	UNIPHIER_PINCTRL_PIN(114, 0),
-	UNIPHIER_PINCTRL_PIN(115, 0),
-	UNIPHIER_PINCTRL_PIN(116, 0),
-	UNIPHIER_PINCTRL_PIN(217, 0),
-	UNIPHIER_PINCTRL_PIN(218, 0),
-	UNIPHIER_PINCTRL_PIN(219, 0),
-	UNIPHIER_PINCTRL_PIN(220, 0),
-};
-
 static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};
 static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
 static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};
@@ -135,8 +124,6 @@ static const char * const uniphier_ld6b_functions[] = {
 };
 
 static struct uniphier_pinctrl_socdata uniphier_ld6b_pinctrl_socdata = {
-	.pins = uniphier_ld6b_pins,
-	.pins_count = ARRAY_SIZE(uniphier_ld6b_pins),
 	.groups = uniphier_ld6b_groups,
 	.groups_count = ARRAY_SIZE(uniphier_ld6b_groups),
 	.functions = uniphier_ld6b_functions,
-- 
2.7.4

[U-Boot] [PATCH 2/7] pinctrl: uniphier: replace printf() with dev_err()

[Masahiro Yamada]

dev_err() is more suitable for printing error messages.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 215b19e..ac6c82d 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -174,7 +174,7 @@ static int uniphier_pinconf_set_one(struct udevice *dev, unsigned int pin,
 		ret = uniphier_pinconf_input_enable(dev, pin, arg);
 		break;
 	default:
-		printf("unsupported configuration parameter %u\n", param);
+		dev_err(dev, "unsupported configuration parameter %u\n", param);
 		return -EINVAL;
 	}
 
-- 
2.7.4

[U-Boot] [PATCH 3/7] pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>

[Masahiro Yamada]

The #include <linux/bug.h> is here to use BUILD_BUG_ON_ZERO().

By replacing it with <linux/build_bug.h>, we can reduce the number of
headers pulled in.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index a0eccf8..40e5ad7 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -9,7 +9,7 @@
 #define __PINCTRL_UNIPHIER_H__
 
 #include <linux/bitops.h>
-#include <linux/bug.h>
+#include <linux/build_bug.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 
-- 
2.7.4

[U-Boot] [PATCH 4/7] pinctrl: uniphier: support per-pin configuration via DT

[Masahiro Yamada]

Currently, the UniPhier pinctrl drivers expose only the pin-group
interface to device tree.

Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support
pin configuration via 'pins' DT property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 37 ++++++++++++++++++++++--
 drivers/pinctrl/uniphier/pinctrl-uniphier.h      |  3 +-
 2 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index ac6c82d..03103b3 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -22,6 +22,34 @@
 
 static const char *uniphier_pinctrl_dummy_name = "_dummy";
 
+static int uniphier_pinctrl_get_pins_count(struct udevice *dev)
+{
+	struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
+	const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
+	int pins_count = priv->socdata->pins_count;
+
+	/*
+	 * We do not list all pins in the pin table to save memory footprint.
+	 * Report the max pin number + 1 to fake the framework.
+	 */
+	return pins[pins_count - 1].number + 1;
+}
+
+static const char *uniphier_pinctrl_get_pin_name(struct udevice *dev,
+						 unsigned int selector)
+{
+	struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
+	const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
+	int pins_count = priv->socdata->pins_count;
+	int i;
+
+	for (i = 0; i < pins_count; i++)
+		if (pins[i].number == selector)
+			return pins[i].name;
+
+	return uniphier_pinctrl_dummy_name;
+}
+
 static int uniphier_pinctrl_get_groups_count(struct udevice *dev)
 {
 	struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
@@ -158,8 +186,8 @@ static int uniphier_pinconf_bias_set(struct udevice *dev, unsigned int pin,
 	return 0;
 }
 
-static int uniphier_pinconf_set_one(struct udevice *dev, unsigned int pin,
-				    unsigned int param, unsigned int arg)
+static int uniphier_pinconf_set(struct udevice *dev, unsigned int pin,
+				unsigned int param, unsigned int arg)
 {
 	int ret;
 
@@ -191,7 +219,7 @@ static int uniphier_pinconf_group_set(struct udevice *dev,
 	int i, ret;
 
 	for (i = 0; i < grp->num_pins; i++) {
-		ret = uniphier_pinconf_set_one(dev, grp->pins[i], param, arg);
+		ret = uniphier_pinconf_set(dev, grp->pins[i], param, arg);
 		if (ret)
 			return ret;
 	}
@@ -269,6 +297,8 @@ static int uniphier_pinmux_group_set(struct udevice *dev,
 }
 
 const struct pinctrl_ops uniphier_pinctrl_ops = {
+	.get_pins_count = uniphier_pinctrl_get_pins_count,
+	.get_pin_name = uniphier_pinctrl_get_pin_name,
 	.get_groups_count = uniphier_pinctrl_get_groups_count,
 	.get_group_name = uniphier_pinctrl_get_group_name,
 	.get_functions_count = uniphier_pinmux_get_functions_count,
@@ -277,6 +307,7 @@ const struct pinctrl_ops uniphier_pinctrl_ops = {
 #if CONFIG_IS_ENABLED(PINCONF)
 	.pinconf_num_params = ARRAY_SIZE(uniphier_pinconf_params),
 	.pinconf_params = uniphier_pinconf_params,
+	.pinconf_set = uniphier_pinconf_set,
 	.pinconf_group_set = uniphier_pinconf_group_set,
 #endif
 	.set_state = pinctrl_generic_set_state,
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 40e5ad7..8884b08 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -28,7 +28,8 @@ static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
  */
 struct uniphier_pinctrl_pin {
 	unsigned number;
-	unsigned long data;
+	const char *name;
+	unsigned int data;
 };
 
 /**
-- 
2.7.4

[U-Boot] [PATCH 5/7] pinctrl: uniphier: support drive-strength configuration

[Masahiro Yamada]

This allows our DT to specify drive-strength property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 101 +++++++++++++++++++++++
 drivers/pinctrl/uniphier/pinctrl-uniphier.h      |  44 ++++++++--
 2 files changed, 140 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 03103b3..39b5366 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -17,6 +17,9 @@
 
 #define UNIPHIER_PINCTRL_PINMUX_BASE	0x1000
 #define UNIPHIER_PINCTRL_LOAD_PINMUX	0x1700
+#define UNIPHIER_PINCTRL_DRVCTRL_BASE	0x1800
+#define UNIPHIER_PINCTRL_DRV2CTRL_BASE	0x1900
+#define UNIPHIER_PINCTRL_DRV3CTRL_BASE	0x1980
 #define UNIPHIER_PINCTRL_PUPDCTRL_BASE	0x1a00
 #define UNIPHIER_PINCTRL_IECTRL		0x1d00
 
@@ -142,10 +145,25 @@ static const struct pinconf_param uniphier_pinconf_params[] = {
 	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
 	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
 	{ "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
+	{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
 	{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
 	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
 };
 
+static const struct uniphier_pinctrl_pin *
+uniphier_pinctrl_pin_get(struct uniphier_pinctrl_priv *priv, unsigned int pin)
+{
+	const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
+	int pins_count = priv->socdata->pins_count;
+	int i;
+
+	for (i = 0; i < pins_count; i++)
+		if (pins[i].number == pin)
+			return &pins[i];
+
+	return NULL;
+}
+
 static int uniphier_pinconf_bias_set(struct udevice *dev, unsigned int pin,
 				     unsigned int param, unsigned int arg)
 {
@@ -186,6 +204,86 @@ static int uniphier_pinconf_bias_set(struct udevice *dev, unsigned int pin,
 	return 0;
 }
 
+static const unsigned int uniphier_pinconf_drv_strengths_1bit[] = {
+	4, 8,
+};
+
+static const unsigned int uniphier_pinconf_drv_strengths_2bit[] = {
+	8, 12, 16, 20,
+};
+
+static const unsigned int uniphier_pinconf_drv_strengths_3bit[] = {
+	4, 5, 7, 9, 11, 12, 14, 16,
+};
+
+static int uniphier_pinconf_drive_set(struct udevice *dev, unsigned int pin,
+				      unsigned int strength)
+{
+	struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
+	const struct uniphier_pinctrl_pin *desc;
+	const unsigned int *strengths;
+	unsigned int base, stride, width, drvctrl, reg, shift;
+	u32 val, mask, tmp;
+
+	desc = uniphier_pinctrl_pin_get(priv, pin);
+	if (WARN_ON(!desc))
+		return -EINVAL;
+
+	switch (uniphier_pin_get_drv_type(desc->data)) {
+	case UNIPHIER_PIN_DRV_1BIT:
+		strengths = uniphier_pinconf_drv_strengths_1bit;
+		base = UNIPHIER_PINCTRL_DRVCTRL_BASE;
+		stride = 1;
+		width = 1;
+		break;
+	case UNIPHIER_PIN_DRV_2BIT:
+		strengths = uniphier_pinconf_drv_strengths_2bit;
+		base = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
+		stride = 2;
+		width = 2;
+		break;
+	case UNIPHIER_PIN_DRV_3BIT:
+		strengths = uniphier_pinconf_drv_strengths_3bit;
+		base = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
+		stride = 4;
+		width = 3;
+		break;
+	default:
+		/* drive strength control is not supported for this pin */
+		return -EINVAL;
+	}
+
+	drvctrl = uniphier_pin_get_drvctrl(desc->data);
+	drvctrl *= stride;
+
+	reg = base + drvctrl / 32 * 4;
+	shift = drvctrl % 32;
+	mask = (1U << width) - 1;
+
+	for (val = 0; val <= mask; val++) {
+		if (strengths[val] > strength)
+			break;
+	}
+
+	if (val == 0) {
+		dev_err(dev, "unsupported drive strength %u mA for pin %s\n",
+			strength, desc->name);
+		return -EINVAL;
+	}
+
+	if (!mask)
+		return 0;
+
+	val--;
+
+	tmp = readl(priv->base + reg);
+	tmp &= ~(mask << shift);
+	tmp |= (mask & val) << shift;
+	writel(tmp, priv->base + reg);
+
+	return 0;
+}
+
 static int uniphier_pinconf_set(struct udevice *dev, unsigned int pin,
 				unsigned int param, unsigned int arg)
 {
@@ -198,6 +296,9 @@ static int uniphier_pinconf_set(struct udevice *dev, unsigned int pin,
 	case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 		ret = uniphier_pinconf_bias_set(dev, pin, param, arg);
 		break;
+	case PIN_CONFIG_DRIVE_STRENGTH:
+		ret = uniphier_pinconf_drive_set(dev, pin, arg);
+		break;
 	case PIN_CONFIG_INPUT_ENABLE:
 		ret = uniphier_pinconf_input_enable(dev, pin, arg);
 		break;
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 8884b08..3f47693 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -13,11 +13,44 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 
-#define UNIPHIER_PIN_ATTR_PACKED(iectrl)	(iectrl)
+/* drive strength control register number */
+#define UNIPHIER_PIN_DRVCTRL_SHIFT	0
+#define UNIPHIER_PIN_DRVCTRL_BITS	9
+#define UNIPHIER_PIN_DRVCTRL_MASK	((1U << (UNIPHIER_PIN_DRVCTRL_BITS)) \
+					 - 1)
+
+/* drive control type */
+#define UNIPHIER_PIN_DRV_TYPE_SHIFT	((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
+					 (UNIPHIER_PIN_DRVCTRL_BITS))
+#define UNIPHIER_PIN_DRV_TYPE_BITS	2
+#define UNIPHIER_PIN_DRV_TYPE_MASK	((1U << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
+					 - 1)
+
+/* drive control type */
+enum uniphier_pin_drv_type {
+	UNIPHIER_PIN_DRV_1BIT,		/* 2 level control: 4/8 mA */
+	UNIPHIER_PIN_DRV_2BIT,		/* 4 level control: 8/12/16/20 mA */
+	UNIPHIER_PIN_DRV_3BIT,		/* 8 level control: 4/5/7/9/11/12/14/16 mA */
+};
+
+#define UNIPHIER_PIN_DRVCTRL(x) \
+	(((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
+#define UNIPHIER_PIN_DRV_TYPE(x) \
+	(((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
+
+#define UNIPHIER_PIN_ATTR_PACKED(drvctrl, drv_type)	\
+	UNIPHIER_PIN_DRVCTRL(drvctrl) |			\
+	UNIPHIER_PIN_DRV_TYPE(drv_type)
+
+static inline unsigned int uniphier_pin_get_drvctrl(unsigned int data)
+{
+	return (data >> UNIPHIER_PIN_DRVCTRL_SHIFT) & UNIPHIER_PIN_DRVCTRL_MASK;
+}
 
-static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
+static inline unsigned int uniphier_pin_get_drv_type(unsigned int data)
 {
-	return data;
+	return (data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
+						UNIPHIER_PIN_DRV_TYPE_MASK;
 }
 
 /**
@@ -74,10 +107,11 @@ struct uniphier_pinctrl_socdata {
 #define UNIPHIER_PINCTRL_CAPS_MUX_4BIT		BIT(0)
 };
 
-#define UNIPHIER_PINCTRL_PIN(a, b)					\
+#define UNIPHIER_PINCTRL_PIN(a, b, c, d)				\
 {									\
 	.number = a,							\
-	.data = UNIPHIER_PIN_ATTR_PACKED(b),				\
+	.name = b,							\
+	.data = UNIPHIER_PIN_ATTR_PACKED(c, d),				\
 }
 
 #define __UNIPHIER_PINCTRL_GROUP(grp)					\
-- 
2.7.4

[U-Boot] [PATCH 6/7] pinctrl: uniphier: add ethernet TX pin data for LD20

[Masahiro Yamada]

These are necessary to optimize the drive-strength of the pins.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
index 11d5d98..116d1da 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
@@ -11,6 +11,15 @@
 
 #include "pinctrl-uniphier.h"
 
+static const struct uniphier_pinctrl_pin uniphier_ld20_pins[] = {
+	UNIPHIER_PINCTRL_PIN(40, "RGMII_TXCLK", 28, UNIPHIER_PIN_DRV_3BIT),
+	UNIPHIER_PINCTRL_PIN(41, "RGMII_TXD0", 29, UNIPHIER_PIN_DRV_3BIT),
+	UNIPHIER_PINCTRL_PIN(42, "RGMII_TXD1", 30, UNIPHIER_PIN_DRV_3BIT),
+	UNIPHIER_PINCTRL_PIN(43, "RGMII_TXD2", 31, UNIPHIER_PIN_DRV_3BIT),
+	UNIPHIER_PINCTRL_PIN(44, "RGMII_TXD3", 32, UNIPHIER_PIN_DRV_3BIT),
+	UNIPHIER_PINCTRL_PIN(45, "RGMII_TXCTL", 33, UNIPHIER_PIN_DRV_3BIT),
+};
+
 static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25};
 static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
 static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29};
@@ -103,6 +112,8 @@ static const char * const uniphier_ld20_functions[] = {
 };
 
 static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = {
+	.pins = uniphier_ld20_pins,
+	.pins_count = ARRAY_SIZE(uniphier_ld20_pins),
 	.groups = uniphier_ld20_groups,
 	.groups_count = ARRAY_SIZE(uniphier_ld20_groups),
 	.functions = uniphier_ld20_functions,
-- 
2.7.4

[U-Boot] [PATCH 7/7] ARM: uniphier: enable CONFIG_PINCONF

[Masahiro Yamada]

Enable the pin configuration feature for UniPhier 64 bit SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 configs/uniphier_v8_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 45c9080..93df2f6 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -41,6 +41,7 @@ CONFIG_NAND_DENALI_DT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_DM_ETH=y
 CONFIG_SNI_AVE=y
+CONFIG_PINCONF=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_USB=y
-- 
2.7.4

[U-Boot] [PATCH 0/7] ARM: uniphier: support drive-strength pin configuration

[Masahiro Yamada]

2018-05-05 19:53 GMT+09:00 Masahiro Yamada <yamada.masahiro@socionext.com>:
>
> I will merge this series after the release.
>
>
>
> Masahiro Yamada (7):
>   pinctrl: uniphier: remove unneeded pin data of LD6b
>   pinctrl: uniphier: replace printf() with dev_err()
>   pinctrl: uniphier: include <linux/build_bug.h> instead of
>     <linux/bug.h>
>   pinctrl: uniphier: support per-pin configuration via DT
>   pinctrl: uniphier: support drive-strength configuration
>   pinctrl: uniphier: add ethernet TX pin data for LD20
>   ARM: uniphier: enable CONFIG_PINCONF
>

Series, applied to u-boot-uniphier.

-- 
Best Regards
Masahiro Yamada