From: Chris Wilson <chris@chris-wilson.co.uk>
To: Lionel Landwerlin <lionel.g.landwerlin@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: split CNL platforms in GT1/2
Date: Tue, 15 May 2018 15:10:46 +0100 [thread overview]
Message-ID: <152639344696.18532.2137438979101395871@mail.alporthouse.com> (raw)
In-Reply-To: <20180515135745.8740-1-lionel.g.landwerlin@intel.com>
Quoting Lionel Landwerlin (2018-05-15 14:57:44)
> We don't actually need this information in i915 but we would like to
> get it in IGT and since the pciid headers are in sync..
Hmm, I don't see that we display the GT anywhere. I was thinking an
immediate use-case for this information would be the error state.
-Chris
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next prev parent reply other threads:[~2018-05-15 14:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-15 13:57 [PATCH 1/2] drm/i915: split CNL platforms in GT1/2 Lionel Landwerlin
2018-05-15 13:57 ` [PATCH 2/2] drm/i915: classify all ICL as GT1 Lionel Landwerlin
2018-05-15 14:07 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: split CNL platforms in GT1/2 Patchwork
2018-05-15 14:10 ` Chris Wilson [this message]
2018-05-15 15:09 ` [PATCH 1/2] " Lionel Landwerlin
2018-05-16 10:51 ` kbuild test robot
2018-05-16 12:21 ` kbuild test robot
2018-05-16 12:31 ` kbuild test robot
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