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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/2] drm/i915: split CNL platforms in GT1/2
Date: Tue, 15 May 2018 14:57:44 +0100	[thread overview]
Message-ID: <20180515135745.8740-1-lionel.g.landwerlin@intel.com> (raw)

We don't actually need this information in i915 but we would like to
get it in IGT and since the pciid headers are in sync..

Here we're splitting the CNL platforms into 2 groups :

   - GT1: including GT0.5/GT1 platforms (1 slice)
   - GT2: including GT1.5/GT2 platforms (2 slices)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 11 +++++++++--
 include/drm/i915_pciids.h       | 18 ++++++++++--------
 2 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4364922e935d..8130e6a70efc 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -584,7 +584,13 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
 	.ddb_size = 1024, \
 	GLK_COLORS
 
-static const struct intel_device_info intel_cannonlake_info = {
+static const struct intel_device_info intel_cannonlake_gt1_info = {
+	GEN10_FEATURES,
+	PLATFORM(INTEL_CANNONLAKE),
+	.gt = 1,
+};
+
+static const struct intel_device_info intel_cannonlake_gt2_info = {
 	GEN10_FEATURES,
 	PLATFORM(INTEL_CANNONLAKE),
 	.gt = 2,
@@ -665,7 +671,8 @@ static const struct pci_device_id pciidlist[] = {
 	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
 	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
 	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
-	INTEL_CNL_IDS(&intel_cannonlake_info),
+	INTEL_CNL_GT1_IDS(&intel_cannonlake_gt1_info),
+	INTEL_CNL_GT2_IDS(&intel_cannonlake_gt2_info),
 	INTEL_ICL_11_IDS(&intel_icelake_11_info),
 	{0, 0, 0}
 };
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index bab70ff6e78b..af4e8a6c95b0 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -416,21 +416,23 @@
 	INTEL_CFL_U_GT3_IDS(info)
 
 /* CNL */
-#define INTEL_CNL_IDS(info) \
+#define INTEL_CNL_GT1_IDS(info) \
+	INTEL_VGA_DEVICE(0x5A49, info), \
+	INTEL_VGA_DEVICE(0x5A4A, info), \
+	INTEL_VGA_DEVICE(0x5A41, info), \
+	INTEL_VGA_DEVICE(0x5A42, info), \
+	INTEL_VGA_DEVICE(0x5A44, info), \
+	INTEL_VGA_DEVICE(0x5A4C, info)
+
+#define INTEL_CNL_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x5A51, info), \
 	INTEL_VGA_DEVICE(0x5A59, info), \
-	INTEL_VGA_DEVICE(0x5A41, info), \
-	INTEL_VGA_DEVICE(0x5A49, info), \
 	INTEL_VGA_DEVICE(0x5A52, info), \
 	INTEL_VGA_DEVICE(0x5A5A, info), \
-	INTEL_VGA_DEVICE(0x5A42, info), \
-	INTEL_VGA_DEVICE(0x5A4A, info), \
 	INTEL_VGA_DEVICE(0x5A50, info), \
 	INTEL_VGA_DEVICE(0x5A40, info), \
 	INTEL_VGA_DEVICE(0x5A54, info), \
-	INTEL_VGA_DEVICE(0x5A5C, info), \
-	INTEL_VGA_DEVICE(0x5A44, info), \
-	INTEL_VGA_DEVICE(0x5A4C, info)
+	INTEL_VGA_DEVICE(0x5A5C, info)
 
 /* ICL */
 #define INTEL_ICL_11_IDS(info) \
-- 
2.17.0

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             reply	other threads:[~2018-05-15 13:57 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-15 13:57 Lionel Landwerlin [this message]
2018-05-15 13:57 ` [PATCH 2/2] drm/i915: classify all ICL as GT1 Lionel Landwerlin
2018-05-15 14:07 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: split CNL platforms in GT1/2 Patchwork
2018-05-15 14:10 ` [PATCH 1/2] " Chris Wilson
2018-05-15 15:09   ` Lionel Landwerlin
2018-05-16 10:51 ` kbuild test robot
2018-05-16 12:21 ` kbuild test robot
2018-05-16 12:31 ` kbuild test robot

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