[U-Boot] [PATCH v1 0/5] Update STM32 serial driver

[U-Boot] [PATCH v1 0/5] Update STM32 serial driver

[Patrice Chotard]

This series :
  _ adds support of DEBUG_UART
  _ fixes bit register define names
  _ add new setparity ops support in DM and in STM32 serial driver
  _ update STM32MP1 machine to allow DEBUG_UART activation


Patrice Chotard (1):
  serial: stm32: Fix bits defines name

Patrick Delaunay (4):
  serial: stm32: Add debug uart support
  dm: serial: Add setparity
  serial: stm32: Add setparity support
  stm32mp1: Allow to activate CONFIG_DEBUG_UART

 arch/arm/mach-stm32mp/Kconfig              |  15 +++
 arch/arm/mach-stm32mp/cpu.c                |  14 ++-
 arch/arm/mach-stm32mp/include/mach/stm32.h |  12 +++
 board/st/stm32mp1/board.c                  |  27 +++++
 drivers/serial/Kconfig                     |   9 ++
 drivers/serial/serial_stm32.c              | 158 ++++++++++++++++++++++++-----
 drivers/serial/serial_stm32.h              |  16 ++-
 include/serial.h                           |  16 +++
 8 files changed, 234 insertions(+), 33 deletions(-)

-- 
1.9.1

[U-Boot] [PATCH v1 1/5] serial: stm32: Add debug uart support

[Patrice Chotard]

From: Patrick Delaunay <patrick.delaunay@st.com>

Add support for early debug printf, before the availability of
driver model and device tree support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/serial/Kconfig        |   9 ++++
 drivers/serial/serial_stm32.c | 105 +++++++++++++++++++++++++++++++++---------
 2 files changed, 92 insertions(+), 22 deletions(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 5937910e5bf9..25ac869b0e64 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -315,6 +315,15 @@ config DEBUG_UART_MXC
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver model serial is running.
 
+config DEBUG_UART_STM32
+	bool "STMicroelectronics STM32"
+	depends on STM32_SERIAL
+	help
+	  Select this to enable a debug UART using the serial_stm32 driver
+	  You will need to provide parameters to make this work.
+	  The driver will be available until the real driver model
+	  serial is running.
+
 config DEBUG_UART_UNIPHIER
 	bool "UniPhier on-chip UART"
 	depends on ARCH_UNIPHIER
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 6717ffaaa5b9..724d6f967246 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -7,19 +7,21 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
-#include <asm/io.h>
 #include <serial.h>
+#include <watchdog.h>
+#include <asm/io.h>
 #include <asm/arch/stm32.h>
 #include "serial_stm32.h"
 
-static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
+static void _stm32_serial_setbrg(fdt_addr_t base,
+				 struct stm32_uart_info *uart_info,
+				 u32 clock_rate,
+				 int baudrate)
 {
-	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
-	bool stm32f4 = plat->uart_info->stm32f4;
-	fdt_addr_t base = plat->base;
+	bool stm32f4 = uart_info->stm32f4;
 	u32 int_div, mantissa, fraction, oversampling;
 
-	int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
+	int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
 
 	if (int_div < 16) {
 		oversampling = 8;
@@ -33,6 +35,14 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
 	fraction = int_div % oversampling;
 
 	writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
+}
+
+static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
+{
+	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+
+	_stm32_serial_setbrg(plat->base, plat->uart_info,
+			     plat->clock_rate, baudrate);
 
 	return 0;
 }
@@ -58,11 +68,11 @@ static int stm32_serial_getc(struct udevice *dev)
 	return readl(base + RDR_OFFSET(stm32f4));
 }
 
-static int stm32_serial_putc(struct udevice *dev, const char c)
+static int _stm32_serial_putc(fdt_addr_t base,
+			      struct stm32_uart_info *uart_info,
+			      const char c)
 {
-	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
-	bool stm32f4 = plat->uart_info->stm32f4;
-	fdt_addr_t base = plat->base;
+	bool stm32f4 = uart_info->stm32f4;
 
 	if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0)
 		return -EAGAIN;
@@ -72,6 +82,13 @@ static int stm32_serial_putc(struct udevice *dev, const char c)
 	return 0;
 }
 
+static int stm32_serial_putc(struct udevice *dev, const char c)
+{
+	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+
+	return _stm32_serial_putc(plat->base, plat->uart_info, c);
+}
+
 static int stm32_serial_pending(struct udevice *dev, bool input)
 {
 	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
@@ -86,18 +103,28 @@ static int stm32_serial_pending(struct udevice *dev, bool input)
 			USART_ISR_FLAG_TXE ? 0 : 1;
 }
 
+static void _stm32_serial_init(fdt_addr_t base,
+			       struct stm32_uart_info *uart_info)
+{
+	bool stm32f4 = uart_info->stm32f4;
+	u8 uart_enable_bit = uart_info->uart_enable_bit;
+
+	/* Disable uart-> enable fifo -> enable uart */
+	clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
+		     BIT(uart_enable_bit));
+	if (uart_info->has_fifo)
+		setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
+	setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
+		     BIT(uart_enable_bit));
+}
+
 static int stm32_serial_probe(struct udevice *dev)
 {
 	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
 	struct clk clk;
-	fdt_addr_t base = plat->base;
 	int ret;
-	bool stm32f4;
-	u8 uart_enable_bit;
 
 	plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
-	stm32f4 = plat->uart_info->stm32f4;
-	uart_enable_bit = plat->uart_info->uart_enable_bit;
 
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret < 0)
@@ -115,13 +142,7 @@ static int stm32_serial_probe(struct udevice *dev)
 		return plat->clock_rate;
 	};
 
-	/* Disable uart-> enable fifo-> enable uart */
-	clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
-		     BIT(uart_enable_bit));
-	if (plat->uart_info->has_fifo)
-		setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
-	setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
-		     BIT(uart_enable_bit));
+	_stm32_serial_init(plat->base, plat->uart_info);
 
 	return 0;
 }
@@ -161,3 +182,43 @@ U_BOOT_DRIVER(serial_stm32) = {
 	.probe = stm32_serial_probe,
 	.flags = DM_FLAG_PRE_RELOC,
 };
+
+#ifdef CONFIG_DEBUG_UART_STM32
+#include <debug_uart.h>
+static inline struct stm32_uart_info *_debug_uart_info(void)
+{
+	struct stm32_uart_info *uart_info;
+
+#if defined(CONFIG_STM32F4)
+	uart_info = &stm32f4_info;
+#elif defined(CONFIG_STM32F7)
+	uart_info = &stm32f7_info;
+#else
+	uart_info = &stm32h7_info;
+#endif
+	return uart_info;
+}
+
+static inline void _debug_uart_init(void)
+{
+	fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
+	struct stm32_uart_info *uart_info = _debug_uart_info();
+
+	_stm32_serial_init(base, uart_info);
+	_stm32_serial_setbrg(base, uart_info,
+			     CONFIG_DEBUG_UART_CLOCK,
+			     CONFIG_BAUDRATE);
+	printf("DEBUG done\n");
+}
+
+static inline void _debug_uart_putc(int c)
+{
+	fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
+	struct stm32_uart_info *uart_info = _debug_uart_info();
+
+	while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
+		WATCHDOG_RESET();
+}
+
+DEBUG_UART_FUNCS
+#endif
-- 
1.9.1

[U-Boot] [PATCH v1 2/5] serial: stm32: Fix bits defines name

[Patrice Chotard]

Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
Sort defines by descendant order.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/serial/serial_stm32.c | 12 ++++++------
 drivers/serial/serial_stm32.h |  8 ++++----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 724d6f967246..eeaa8ab050d9 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -54,12 +54,12 @@ static int stm32_serial_getc(struct udevice *dev)
 	fdt_addr_t base = plat->base;
 	u32 isr = readl(base + ISR_OFFSET(stm32f4));
 
-	if ((isr & USART_ISR_FLAG_RXNE) == 0)
+	if ((isr & USART_ISR_RXNE) == 0)
 		return -EAGAIN;
 
-	if (isr & USART_ISR_FLAG_ORE) {
+	if (isr & (USART_ISR_ORE)) {
 		if (!stm32f4)
-			setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
+			setbits_le32(base + ICR_OFFSET, USART_ICR_ORECF);
 		else
 			readl(base + RDR_OFFSET(stm32f4));
 		return -EIO;
@@ -74,7 +74,7 @@ static int _stm32_serial_putc(fdt_addr_t base,
 {
 	bool stm32f4 = uart_info->stm32f4;
 
-	if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0)
+	if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
 		return -EAGAIN;
 
 	writel(c, base + TDR_OFFSET(stm32f4));
@@ -97,10 +97,10 @@ static int stm32_serial_pending(struct udevice *dev, bool input)
 
 	if (input)
 		return readl(base + ISR_OFFSET(stm32f4)) &
-			USART_ISR_FLAG_RXNE ? 1 : 0;
+			USART_ISR_RXNE ? 1 : 0;
 	else
 		return readl(base + ISR_OFFSET(stm32f4)) &
-			USART_ISR_FLAG_TXE ? 0 : 1;
+			USART_ISR_TXE ? 0 : 1;
 }
 
 static void _stm32_serial_init(fdt_addr_t base,
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index 8a1a24fda8f4..c478e3507020 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -59,13 +59,13 @@ struct stm32x7_serial_platdata {
 
 #define USART_CR3_OVRDIS		BIT(12)
 
-#define USART_ISR_FLAG_ORE		BIT(3)
-#define USART_ISR_FLAG_RXNE		BIT(5)
-#define USART_ISR_FLAG_TXE		BIT(7)
+#define USART_ISR_TXE			BIT(7)
+#define USART_ISR_RXNE			BIT(5)
+#define USART_ISR_ORE			BIT(3)
 
 #define USART_BRR_F_MASK		GENMASK(7, 0)
 #define USART_BRR_M_SHIFT		4
 #define USART_BRR_M_MASK		GENMASK(15, 4)
 
-#define USART_ICR_OREF			BIT(3)
+#define USART_ICR_ORECF			BIT(3)
 #endif
-- 
1.9.1

[U-Boot] [PATCH v1 3/5] dm: serial: Add setparity

[Patrice Chotard]

From: Patrick Delaunay <patrick.delaunay@st.com>

Implements serial setparity ops to allow uart parity change.
It allows to select ODD, EVEN or NONE parity.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 include/serial.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/include/serial.h b/include/serial.h
index 384df94ed0b3..b9ef6d91c9c5 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -67,6 +67,12 @@ extern int usbtty_tstc(void);
 
 struct udevice;
 
+enum serial_par {
+	SERIAL_PAR_NONE,
+	SERIAL_PAR_ODD,
+	SERIAL_PAR_EVEN
+};
+
 /**
  * struct struct dm_serial_ops - Driver model serial operations
  *
@@ -143,6 +149,16 @@ struct dm_serial_ops {
 	 */
 	int (*loop)(struct udevice *dev, int on);
 #endif
+	/**
+	 * setparity() - Set up the parity
+	 *
+	 * Set up a new parity for this device.
+	 *
+	 * @dev: Device pointer
+	 * @parity: parity to use
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*setparity)(struct udevice *dev, enum serial_par parity);
 };
 
 /**
-- 
1.9.1

[U-Boot] [PATCH v1 4/5] serial: stm32: Add setparity support

[Patrice Chotard]

From: Patrick Delaunay <patrick.delaunay@st.com>

Add possibility to update the serial parity used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 drivers/serial/serial_stm32.c | 45 +++++++++++++++++++++++++++++++++++++++++--
 drivers/serial/serial_stm32.h |  8 ++++++++
 2 files changed, 51 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index eeaa8ab050d9..f26234549c3e 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -47,6 +47,45 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
 	return 0;
 }
 
+static int stm32_serial_setparity(struct udevice *dev, enum serial_par parity)
+{
+	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+	bool stm32f4 = plat->uart_info->stm32f4;
+	u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
+	u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
+	u32 config = 0;
+
+	if (stm32f4)
+		return -EINVAL; /* not supported in driver*/
+
+	clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
+	/* update usart configuration (uart need to be disable)
+	 * PCE: parity check control
+	 * PS : '0' : Even / '1' : Odd
+	 * M[1:0] = '00' : 8 Data bits
+	 * M[1:0] = '01' : 9 Data bits with parity
+	 */
+	switch (parity) {
+	default:
+	case SERIAL_PAR_NONE:
+		config = 0;
+		break;
+	case SERIAL_PAR_ODD:
+		config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0;
+		break;
+	case SERIAL_PAR_EVEN:
+		config = USART_CR1_PCE | USART_CR1_M0;
+		break;
+	}
+	clrsetbits_le32(cr1,
+			USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
+			USART_CR1_M0,
+			config);
+	setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
+
+	return 0;
+}
+
 static int stm32_serial_getc(struct udevice *dev)
 {
 	struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
@@ -57,9 +96,10 @@ static int stm32_serial_getc(struct udevice *dev)
 	if ((isr & USART_ISR_RXNE) == 0)
 		return -EAGAIN;
 
-	if (isr & (USART_ISR_ORE)) {
+	if (isr & (USART_ISR_PE | USART_ISR_ORE)) {
 		if (!stm32f4)
-			setbits_le32(base + ICR_OFFSET, USART_ICR_ORECF);
+			setbits_le32(base + ICR_OFFSET,
+				     USART_ICR_PCECF | USART_ICR_ORECF);
 		else
 			readl(base + RDR_OFFSET(stm32f4));
 		return -EIO;
@@ -170,6 +210,7 @@ static const struct dm_serial_ops stm32_serial_ops = {
 	.pending = stm32_serial_pending,
 	.getc = stm32_serial_getc,
 	.setbrg = stm32_serial_setbrg,
+	.setparity = stm32_serial_setparity
 };
 
 U_BOOT_DRIVER(serial_stm32) = {
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index c478e3507020..ccafa31219a1 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -13,6 +13,7 @@
 #define ISR_OFFSET(x)	(x ? 0x00 : 0x1c)
 
 #define ICR_OFFSET	0x20
+
 /*
  * STM32F4 has one Data Register (DR) for received or transmitted
  * data, so map Receive Data Register (RDR) and Transmit Data
@@ -53,7 +54,11 @@ struct stm32x7_serial_platdata {
 };
 
 #define USART_CR1_FIFOEN		BIT(29)
+#define USART_CR1_M1			BIT(28)
 #define USART_CR1_OVER8			BIT(15)
+#define USART_CR1_M0			BIT(12)
+#define USART_CR1_PCE			BIT(10)
+#define USART_CR1_PS			BIT(9)
 #define USART_CR1_TE			BIT(3)
 #define USART_CR1_RE			BIT(2)
 
@@ -62,10 +67,13 @@ struct stm32x7_serial_platdata {
 #define USART_ISR_TXE			BIT(7)
 #define USART_ISR_RXNE			BIT(5)
 #define USART_ISR_ORE			BIT(3)
+#define USART_ISR_PE			BIT(0)
 
 #define USART_BRR_F_MASK		GENMASK(7, 0)
 #define USART_BRR_M_SHIFT		4
 #define USART_BRR_M_MASK		GENMASK(15, 4)
 
 #define USART_ICR_ORECF			BIT(3)
+#define USART_ICR_PCECF			BIT(0)
+
 #endif
-- 
1.9.1

[U-Boot] [PATCH v1 5/5] stm32mp1: Allow to activate CONFIG_DEBUG_UART

[Patrice Chotard]

From: Patrick Delaunay <patrick.delaunay@st.com>

Add the needed information to enable the debug uart
to have printf before the serial driver probe
(so before probe for clock, pincontrol and reset drivers)

To enable the debug on uart 4 (default console):
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEBUG_UART_STM32=y

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

 arch/arm/mach-stm32mp/Kconfig              | 15 +++++++++++++++
 arch/arm/mach-stm32mp/cpu.c                | 14 +++++++++++++-
 arch/arm/mach-stm32mp/include/mach/stm32.h | 12 ++++++++++++
 board/st/stm32mp1/board.c                  | 27 +++++++++++++++++++++++++++
 4 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index ccbeb5c38815..abceeded24a2 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -54,4 +54,19 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
 
 source "board/st/stm32mp1/Kconfig"
 
+# currently activated for debug / should be deactivated for real product
+if DEBUG_UART
+
+config DEBUG_UART_BOARD_INIT
+	default y
+
+# debug on UART4 by default
+config DEBUG_UART_BASE
+	default 0x40010000
+
+# clock source is HSI on reset
+config DEBUG_UART_CLOCK
+	default 64000000
+endif
+
 endif
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index dfcbbd231463..2deee0961822 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -4,6 +4,7 @@
  */
 #include <common.h>
 #include <clk.h>
+#include <debug_uart.h>
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
 #include <asm/arch/sys_proto.h>
@@ -152,6 +153,8 @@ static u32 get_bootmode(void)
  */
 int arch_cpu_init(void)
 {
+	u32 boot_mode;
+
 	/* early armv7 timer init: needed for polling */
 	timer_init();
 
@@ -160,8 +163,17 @@ int arch_cpu_init(void)
 
 	security_init();
 #endif
+
 	/* get bootmode from BootRom context: saved in TAMP register */
-	get_bootmode();
+	boot_mode = get_bootmode();
+
+	if ((boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
+		gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+#if defined(CONFIG_DEBUG_UART) && \
+	(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
+	else
+		debug_uart_init();
+#endif
 
 	return 0;
 }
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index a8142013b086..129f9f558eac 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -17,6 +17,18 @@
 #define STM32_ETZPC_BASE		0x5C007000
 #define STM32_TAMP_BASE			0x5C00A000
 
+#ifdef CONFIG_DEBUG_UART_BASE
+/* hardcoded value can be only used for DEBUG UART */
+#define STM32_USART1_BASE		0x5C000000
+#define STM32_USART2_BASE		0x4000E000
+#define STM32_USART3_BASE		0x4000F000
+#define STM32_UART4_BASE		0x40010000
+#define STM32_UART5_BASE		0x40011000
+#define STM32_USART6_BASE		0x44003000
+#define STM32_UART7_BASE		0x40018000
+#define STM32_UART8_BASE		0x40019000
+#endif
+
 #define STM32_SYSRAM_BASE		0x2FFC0000
 #define STM32_SYSRAM_SIZE		SZ_256K
 
diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c
index 956768f04479..5f31ea99f597 100644
--- a/board/st/stm32mp1/board.c
+++ b/board/st/stm32mp1/board.c
@@ -10,6 +10,33 @@
 #include <power/pmic.h>
 #include <power/stpmu1.h>
 
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+#if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE)
+
+#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
+#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
+
+	/* UART4 clock enable */
+	setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
+
+#define GPIOG_BASE 0x50008000
+	/* GPIOG clock enable */
+	writel(BIT(6), RCC_MP_AHB4ENSETR);
+	/* GPIO configuration for EVAL board
+	 * => Uart4 TX = G11
+	 */
+	writel(0xffbfffff, GPIOG_BASE + 0x00);
+	writel(0x00006000, GPIOG_BASE + 0x24);
+#else
+
+#error("CONFIG_DEBUG_UART_BASE: not supported value")
+
+#endif
+}
+#endif
+
 #ifdef CONFIG_PMIC_STPMU1
 int board_ddr_power_init(void)
 {
-- 
1.9.1

[U-Boot] [PATCH v1 1/5] serial: stm32: Add debug uart support

[Simon Glass]

On 17 May 2018 at 06:50, Patrice Chotard <patrice.chotard@st.com> wrote:
> From: Patrick Delaunay <patrick.delaunay@st.com>
>
> Add support for early debug printf, before the availability of
> driver model and device tree support.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
>
>  drivers/serial/Kconfig        |   9 ++++
>  drivers/serial/serial_stm32.c | 105 +++++++++++++++++++++++++++++++++---------
>  2 files changed, 92 insertions(+), 22 deletions(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

One question below.
[..]

> +static inline void _debug_uart_init(void)
> +{
> +       fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
> +       struct stm32_uart_info *uart_info = _debug_uart_info();
> +
> +       _stm32_serial_init(base, uart_info);
> +       _stm32_serial_setbrg(base, uart_info,
> +                            CONFIG_DEBUG_UART_CLOCK,
> +                            CONFIG_BAUDRATE);
> +       printf("DEBUG done\n");

Do you really want this line?

Regards,
Simon

[U-Boot] [PATCH v1 2/5] serial: stm32: Fix bits defines name

[Simon Glass]

On 17 May 2018 at 06:50, Patrice Chotard <patrice.chotard@st.com> wrote:
> Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
> USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
> Sort defines by descendant order.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
>
>  drivers/serial/serial_stm32.c | 12 ++++++------
>  drivers/serial/serial_stm32.h |  8 ++++----
>  2 files changed, 10 insertions(+), 10 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v1 3/5] dm: serial: Add setparity

[Simon Glass]

Hi Patrick,

On 17 May 2018 at 06:50, Patrice Chotard <patrice.chotard@st.com> wrote:
> From: Patrick Delaunay <patrick.delaunay@st.com>
>
> Implements serial setparity ops to allow uart parity change.
> It allows to select ODD, EVEN or NONE parity.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
>
>  include/serial.h | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/include/serial.h b/include/serial.h
> index 384df94ed0b3..b9ef6d91c9c5 100644
> --- a/include/serial.h
> +++ b/include/serial.h
> @@ -67,6 +67,12 @@ extern int usbtty_tstc(void);
>
>  struct udevice;
>
> +enum serial_par {
> +       SERIAL_PAR_NONE,
> +       SERIAL_PAR_ODD,
> +       SERIAL_PAR_EVEN
> +};
> +
>  /**
>   * struct struct dm_serial_ops - Driver model serial operations
>   *
> @@ -143,6 +149,16 @@ struct dm_serial_ops {
>          */
>         int (*loop)(struct udevice *dev, int on);
>  #endif
> +       /**
> +        * setparity() - Set up the parity
> +        *
> +        * Set up a new parity for this device.
> +        *
> +        * @dev: Device pointer
> +        * @parity: parity to use
> +        * @return 0 if OK, -ve on error
> +        */
> +       int (*setparity)(struct udevice *dev, enum serial_par parity);

To me it seems that changing parity while in the middle of operation
might be tricky. I suppose this follows along with setbrg() so fair
enough.

But I worry about adding more operations here. The next thing to come
is presumably the length (7 bits, 8 bits, ...). Perhaps we should have
a more generic setconfig() which change change speed, format and
parity all at once? For format and parity, we could have a 'default'
parameter value.

Also, there should be a corresponding function in serial-uclass.c and
ideal a call from some sandbox test (although I see at present we
don't have test/dm/serial.c)

Regards,
Simon

[U-Boot] [PATCH v1 3/5] dm: serial: Add setparity

[Patrice CHOTARD]

Hi Simon

On 05/18/2018 03:37 AM, Simon Glass wrote:
> Hi Patrick,
> 
> On 17 May 2018 at 06:50, Patrice Chotard <patrice.chotard@st.com> wrote:
>> From: Patrick Delaunay <patrick.delaunay@st.com>
>>
>> Implements serial setparity ops to allow uart parity change.
>> It allows to select ODD, EVEN or NONE parity.
>>
>> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>> ---
>>
>>   include/serial.h | 16 ++++++++++++++++
>>   1 file changed, 16 insertions(+)
>>
>> diff --git a/include/serial.h b/include/serial.h
>> index 384df94ed0b3..b9ef6d91c9c5 100644
>> --- a/include/serial.h
>> +++ b/include/serial.h
>> @@ -67,6 +67,12 @@ extern int usbtty_tstc(void);
>>
>>   struct udevice;
>>
>> +enum serial_par {
>> +       SERIAL_PAR_NONE,
>> +       SERIAL_PAR_ODD,
>> +       SERIAL_PAR_EVEN
>> +};
>> +
>>   /**
>>    * struct struct dm_serial_ops - Driver model serial operations
>>    *
>> @@ -143,6 +149,16 @@ struct dm_serial_ops {
>>           */
>>          int (*loop)(struct udevice *dev, int on);
>>   #endif
>> +       /**
>> +        * setparity() - Set up the parity
>> +        *
>> +        * Set up a new parity for this device.
>> +        *
>> +        * @dev: Device pointer
>> +        * @parity: parity to use
>> +        * @return 0 if OK, -ve on error
>> +        */
>> +       int (*setparity)(struct udevice *dev, enum serial_par parity);
> 
> To me it seems that changing parity while in the middle of operation
> might be tricky. I suppose this follows along with setbrg() so fair
> enough.
> 
> But I worry about adding more operations here. The next thing to come
> is presumably the length (7 bits, 8 bits, ...). Perhaps we should have
> a more generic setconfig() which change change speed, format and
> parity all at once? For format and parity, we could have a 'default'
> parameter value.

Ok that make sense, i will resubmit a v2

> 
> Also, there should be a corresponding function in serial-uclass.c and
> ideal a call from some sandbox test (although I see at present we
> don't have test/dm/serial.c)

Ok

Patrice

> 
> Regards,
> Simon
> 

[U-Boot] [PATCH v1 1/5] serial: stm32: Add debug uart support

[Patrice CHOTARD]

Hi Simon

On 05/18/2018 03:37 AM, Simon Glass wrote:
> On 17 May 2018 at 06:50, Patrice Chotard <patrice.chotard@st.com> wrote:
>> From: Patrick Delaunay <patrick.delaunay@st.com>
>>
>> Add support for early debug printf, before the availability of
>> driver model and device tree support.
>>
>> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>> ---
>>
>>   drivers/serial/Kconfig        |   9 ++++
>>   drivers/serial/serial_stm32.c | 105 +++++++++++++++++++++++++++++++++---------
>>   2 files changed, 92 insertions(+), 22 deletions(-)
>>
> 
> Reviewed-by: Simon Glass <sjg@chromium.org>
> 
> One question below.
> [..]
> 
>> +static inline void _debug_uart_init(void)
>> +{
>> +       fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
>> +       struct stm32_uart_info *uart_info = _debug_uart_info();
>> +
>> +       _stm32_serial_init(base, uart_info);
>> +       _stm32_serial_setbrg(base, uart_info,
>> +                            CONFIG_DEBUG_UART_CLOCK,
>> +                            CONFIG_BAUDRATE);
>> +       printf("DEBUG done\n");
> 
> Do you really want this line?

it's a development debug trace, i will remove it.

Thanks

Patrice

> 
> Regards,
> Simon
> 

[U-Boot] [U-Boot,v1,1/5] serial: stm32: Add debug uart support

[Tom Rini]

On Thu, May 17, 2018 at 02:50:42PM +0200, Patrice Chotard wrote:

> From: Patrick Delaunay <patrick.delaunay@st.com>
> 
> Add support for early debug printf, before the availability of
> driver model and device tree support.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v1,2/5] serial: stm32: Fix bits defines name

[Tom Rini]

On Thu, May 17, 2018 at 02:50:43PM +0200, Patrice Chotard wrote:

> Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
> USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
> Sort defines by descendant order.
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v1,3/5] dm: serial: Add setparity

[Tom Rini]

On Thu, May 17, 2018 at 02:50:44PM +0200, Patrice Chotard wrote:

> From: Patrick Delaunay <patrick.delaunay@st.com>
> 
> Implements serial setparity ops to allow uart parity change.
> It allows to select ODD, EVEN or NONE parity.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v1,4/5] serial: stm32: Add setparity support

[Tom Rini]

On Thu, May 17, 2018 at 02:50:45PM +0200, Patrice Chotard wrote:

> From: Patrick Delaunay <patrick.delaunay@st.com>
> 
> Add possibility to update the serial parity used.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v1, 5/5] stm32mp1: Allow to activate CONFIG_DEBUG_UART

[Tom Rini]

On Thu, May 17, 2018 at 02:50:46PM +0200, Patrice Chotard wrote:

> From: Patrick Delaunay <patrick.delaunay@st.com>
> 
> Add the needed information to enable the debug uart
> to have printf before the serial driver probe
> (so before probe for clock, pincontrol and reset drivers)
> 
> To enable the debug on uart 4 (default console):
> + CONFIG_DEBUG_UART=y
> + CONFIG_DEBUG_UART_STM32=y
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v1,3/5] dm: serial: Add setparity

[Patrice CHOTARD]

Hi Tom

On 05/28/2018 09:13 PM, Tom Rini wrote:
> On Thu, May 17, 2018 at 02:50:44PM +0200, Patrice Chotard wrote:
> 
>> From: Patrick Delaunay <patrick.delaunay@st.com>
>>
>> Implements serial setparity ops to allow uart parity change.
>> It allows to select ODD, EVEN or NONE parity.
>>
>> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> 
> Applied to u-boot/master, thanks!
> 

After Simon's review, i expected to send a v2 of this series but you was 
too fast ;-).

2 solutions:
  _ i submit a new patchset including Simon's remarks on top of current 
master branch
  _ you revert this series and i submit the v2

What do you prefer ?

Thanks

Patrice

[U-Boot] [U-Boot,v1,3/5] dm: serial: Add setparity

[Tom Rini]

On Tue, May 29, 2018 at 07:13:36AM +0000, Patrice CHOTARD wrote:
> Hi Tom
> 
> On 05/28/2018 09:13 PM, Tom Rini wrote:
> > On Thu, May 17, 2018 at 02:50:44PM +0200, Patrice Chotard wrote:
> > 
> >> From: Patrick Delaunay <patrick.delaunay@st.com>
> >>
> >> Implements serial setparity ops to allow uart parity change.
> >> It allows to select ODD, EVEN or NONE parity.
> >>
> >> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> >> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> > 
> > Applied to u-boot/master, thanks!
> > 
> 
> After Simon's review, i expected to send a v2 of this series but you was 
> too fast ;-).
> 
> 2 solutions:
>   _ i submit a new patchset including Simon's remarks on top of current 
> master branch
>   _ you revert this series and i submit the v2
> 
> What do you prefer ?

Ugh, oops.  I swear it was good when I checked, but maybe I was too
quick.  A follow-up series please, thanks!

-- 
Tom
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