Re: [PATCH i-g-t 1/3] igt/gem_cpu_reloc: Check HW exists before attempting to use it

[Chris Wilson <chris@chris-wilson.co.uk>]

Quoting Antonio Argenziano (2018-05-17 17:29:26)
> 
> 
> On 17/05/18 08:37, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2018-05-17 16:08:14)
> >>
> >>
> >> On 17/05/18 01:23, Chris Wilson wrote:
> >>> Confirm we have the available HW before asserting it succeeds.
> >>>
> >>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >>> ---
> >>>    tests/gem_cpu_reloc.c | 1 +
> >>>    1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/tests/gem_cpu_reloc.c b/tests/gem_cpu_reloc.c
> >>> index 882c312d4..e3bbcd239 100644
> >>> --- a/tests/gem_cpu_reloc.c
> >>> +++ b/tests/gem_cpu_reloc.c
> >>> @@ -167,6 +167,7 @@ static void run_test(int fd, int count)
> >>>        use_blt = 0;
> >>
> >> Is this^ meant to be EXEC_DEFAULT?
> > 
> > Depends on your viewpoint. EXEC_DEFAULT is zero.
> 
> Just wandering if it should enforce EXEC_RENDER. Which I think is what 
> we want for gen 5-.

Not really. It just wants the default mixed ring. You definitely don't
want to suggest sending blitter commands down the 3D pipe, that would be
even more confusing.

> >>>        if (intel_gen(noop) >= 6)
> >>>                use_blt = I915_EXEC_BLT;
> >>> +     gem_require_ring(fd, use_blt);
> >>
> >> Are any gens 6+ that do not have a BLT ring? if that is the case
> >> shouldn't we use '0' like we do for 5- gens?
> > 
> > No, it has to match the engine for which the blitter commands are valid. If
> > that engine does not exist, there is no alternative except to rewrite the
> > test not to use those commands. If there was, it indeed would be included
> > in the selection above.
> 
> So, just to wrap my head around it, the commands we are talking about 
> here are allowed on render for gen5- but only on blitter on 6+. Right?

There is no render for gen5- either. There is a universal ringbuffer
that can handle multiple different client commands, and on the odd
machine a bit stream decoder.
-Chris
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