* [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes
@ 2018-05-21 14:44 Magnus Damm
2018-05-21 14:44 ` [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes Magnus Damm
` (3 more replies)
0 siblings, 4 replies; 13+ messages in thread
From: Magnus Damm @ 2018-05-21 14:44 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: horms+renesas, Magnus Damm
arm64: dts: renesas: Add IPMMU device nodes
[PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes
[PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
[PATCH 03/03] arm64: dts: renesas: r8a77990: Add IPMMU devices nodes
This series adds IPMMU device nodes to R-Car M3-N, V3H and E3 SoCs.
The IPMMU DT binding changes are not yet merged upstream however they
have been documented by the following patches:
[PATCH] iommu/ipmmu-vmsa: Document R-Car M3-N IPMMU DT bindings
[PATCH] iommu/ipmmu-vmsa: Document R-Car V3H and E3 IPMMU DT bindings
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Developed on top of renesas-devel-20180518-v4.17-rc5
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 89 +++++++++++++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 82 ++++++++++++++++++++++++++
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes
2018-05-21 14:44 [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Magnus Damm
@ 2018-05-21 14:44 ` Magnus Damm
2018-05-22 12:55 ` Simon Horman
2018-05-21 14:45 ` [PATCH 02/03] arm64: dts: renesas: r8a77980: " Magnus Damm
` (2 subsequent siblings)
3 siblings, 1 reply; 13+ messages in thread
From: Magnus Damm @ 2018-05-21 14:44 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: horms+renesas, Magnus Damm
From: Magnus Damm <damm+renesas@opensource.se>
Add IPMMU device nodes for the R-Car M3-N SoC aka r8a77965.
The r8a77965 IPMMU is quite similar to r8a7796 however VP0
has been added and PV1 has been removed. Also the IMSSTR
bit assignment has been reworked.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Developed on top of renesas-devel-20180518-v4.17-rc5
The DT binding for the M3-N IPMMU has earlier been documented in:
[PATCH] iommu/ipmmu-vmsa: Document R-Car M3-N IPMMU DT bindings
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 89 +++++++++++++++++++++++++++++
1 file changed, 89 insertions(+)
--- 0001/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a77965.dtsi 2018-05-21 21:45:17.360607110 +0900
@@ -611,6 +611,95 @@
dma-channels = <16>;
};
+ ipmmu_ds0: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xe6740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_ds1: mmu@e7740000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 1>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_hc: mmu@e6570000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xe6570000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 2>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_ir: mmu@ff8b0000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xff8b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 3>;
+ power-domains = <&sysc R8A77965_PD_A3IR>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_mm: mmu@e67b0000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_mp: mmu@ec670000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xec670000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 4>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_pv0: mmu@fd800000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xfd800000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 6>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 10>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vc0: mmu@fe6b0000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xfe6b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 12>;
+ power-domains = <&sysc R8A77965_PD_A3VC>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vi0: mmu@febd0000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 14>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vp0: mmu@fe990000 {
+ compatible = "renesas,ipmmu-r8a77965";
+ reg = <0 0xfe990000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 16>;
+ power-domains = <&sysc R8A77965_PD_A3VP>;
+ #iommu-cells = <1>;
+ };
+
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77965",
"renesas,etheravb-rcar-gen3";
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-21 14:44 [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Magnus Damm
2018-05-21 14:44 ` [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes Magnus Damm
@ 2018-05-21 14:45 ` Magnus Damm
2018-05-22 13:10 ` Simon Horman
2018-05-21 14:45 ` [PATCH 03/03] arm64: dts: renesas: r8a77990: " Magnus Damm
2018-05-28 9:05 ` [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Simon Horman
3 siblings, 1 reply; 13+ messages in thread
From: Magnus Damm @ 2018-05-21 14:45 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: horms+renesas, Magnus Damm
From: Magnus Damm <damm+renesas@opensource.se>
Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
The r8a77980 IPMMU is quite similar to r8a77970 however VC0
has been added. The IMSSTR bit assignment has also been
reworked. Power domains are also quite different however the
the documentation is rather unclear about this topic.
Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Developed on top of renesas-devel-20180518-v4.17-rc5
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
--- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
@@ -387,6 +387,55 @@
dma-channels = <16>;
};
+ ipmmu_ds1: mmu@e7740000 {
+ compatible = "renesas,ipmmu-r8a77980";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_ir: mmu@ff8b0000 {
+ compatible = "renesas,ipmmu-r8a77980";
+ reg = <0 0xff8b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 3>;
+ power-domains = <&sysc R8A77980_PD_A3IR>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_mm: mmu@e67b0000 {
+ compatible = "renesas,ipmmu-r8a77980";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a77980";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 10>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vc0: mmu@fe6b0000 {
+ compatible = "renesas,ipmmu-r8a77980";
+ reg = <0 0xfe6b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 12>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vi0: mmu@febd0000 {
+ compatible = "renesas,ipmmu-r8a77980";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 14>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
mmc0: mmc@ee140000 {
compatible = "renesas,sdhi-r8a77980",
"renesas,rcar-gen3-sdhi";
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 03/03] arm64: dts: renesas: r8a77990: Add IPMMU devices nodes
2018-05-21 14:44 [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Magnus Damm
2018-05-21 14:44 ` [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes Magnus Damm
2018-05-21 14:45 ` [PATCH 02/03] arm64: dts: renesas: r8a77980: " Magnus Damm
@ 2018-05-21 14:45 ` Magnus Damm
2018-05-22 13:12 ` Simon Horman
2018-05-28 9:05 ` [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Simon Horman
3 siblings, 1 reply; 13+ messages in thread
From: Magnus Damm @ 2018-05-21 14:45 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: horms+renesas, Magnus Damm
From: Magnus Damm <damm+renesas@opensource.se>
Add IPMMU device nodes for the R-Car E3 SoC aka r8a77990.
The r8a77990 IPMMU is similar to r8a77995. Power domains are
however different but the documentation seems unclear.
As expected VC0 belongs to R8A77990_PD_A3VC however VP0
is for now assigned to R8A77990_PD_ALWAYS_ON even though
the IPMMU data sheet lists it as part of A3VP.
What I can tell A3VP is not implemented on E3 so the data
sheet probably needs an update.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Developed on top of renesas-devel-20180518-v4.17-rc5
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 82 +++++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
--- 0001/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a77990.dtsi 2018-05-21 22:44:00.350607110 +0900
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77990-sysc.h>
/ {
compatible = "renesas,r8a77990";
@@ -191,6 +192,87 @@
#power-domain-cells = <1>;
};
+ ipmmu_ds0: mmu@e6740000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xe6740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_ds1: mmu@e7740000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 1>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_hc: mmu@e6570000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xe6570000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 2>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_mm: mmu@e67b0000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_mp: mmu@ec670000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xec670000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 4>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_pv0: mmu@fd800000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xfd800000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 6>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_rt: mmu@ffc80000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 10>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vc0: mmu@fe6b0000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xfe6b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 12>;
+ power-domains = <&sysc R8A77990_PD_A3VC>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vi0: mmu@febd0000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 14>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vp0: mmu@fe990000 {
+ compatible = "renesas,ipmmu-r8a77990";
+ reg = <0 0xfe990000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 16>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77990",
"renesas,etheravb-rcar-gen3";
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes
2018-05-21 14:44 ` [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes Magnus Damm
@ 2018-05-22 12:55 ` Simon Horman
0 siblings, 0 replies; 13+ messages in thread
From: Simon Horman @ 2018-05-22 12:55 UTC (permalink / raw)
To: Magnus Damm; +Cc: linux-renesas-soc
On Mon, May 21, 2018 at 11:44:53PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Add IPMMU device nodes for the R-Car M3-N SoC aka r8a77965.
>
> The r8a77965 IPMMU is quite similar to r8a7796 however VP0
> has been added and PV1 has been removed. Also the IMSSTR
> bit assignment has been reworked.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> Developed on top of renesas-devel-20180518-v4.17-rc5
>
> The DT binding for the M3-N IPMMU has earlier been documented in:
> [PATCH] iommu/ipmmu-vmsa: Document R-Car M3-N IPMMU DT bindings
This looks fine but I will wait to see if there are other reviews before
applying.
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-21 14:45 ` [PATCH 02/03] arm64: dts: renesas: r8a77980: " Magnus Damm
@ 2018-05-22 13:10 ` Simon Horman
2018-05-24 2:23 ` Magnus Damm
0 siblings, 1 reply; 13+ messages in thread
From: Simon Horman @ 2018-05-22 13:10 UTC (permalink / raw)
To: Magnus Damm; +Cc: linux-renesas-soc
On Mon, May 21, 2018 at 11:45:01PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
>
> The r8a77980 IPMMU is quite similar to r8a77970 however VC0
> has been added. The IMSSTR bit assignment has also been
> reworked. Power domains are also quite different however the
> the documentation is rather unclear about this topic.
>
> Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> Developed on top of renesas-devel-20180518-v4.17-rc5
>
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> --- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
> @@ -387,6 +387,55 @@
> dma-channels = <16>;
> };
>
> + ipmmu_ds1: mmu@e7740000 {
> + compatible = "renesas,ipmmu-r8a77980";
> + reg = <0 0xe7740000 0 0x1000>;
> + renesas,ipmmu-main = <&ipmmu_mm 0>;
> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> + #iommu-cells = <1>;
> + };
> +
> + ipmmu_ir: mmu@ff8b0000 {
> + compatible = "renesas,ipmmu-r8a77980";
> + reg = <0 0xff8b0000 0 0x1000>;
> + renesas,ipmmu-main = <&ipmmu_mm 3>;
> + power-domains = <&sysc R8A77980_PD_A3IR>;
> + #iommu-cells = <1>;
> + };
> +
> + ipmmu_mm: mmu@e67b0000 {
> + compatible = "renesas,ipmmu-r8a77980";
> + reg = <0 0xe67b0000 0 0x1000>;
> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> + #iommu-cells = <1>;
> + };
> +
> + ipmmu_rt: mmu@ffc80000 {
> + compatible = "renesas,ipmmu-r8a77980";
> + reg = <0 0xffc80000 0 0x1000>;
> + renesas,ipmmu-main = <&ipmmu_mm 10>;
> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> + #iommu-cells = <1>;
> + };
> +
> + ipmmu_vc0: mmu@fe6b0000 {
> + compatible = "renesas,ipmmu-r8a77980";
> + reg = <0 0xfe6b0000 0 0x1000>;
> + renesas,ipmmu-main = <&ipmmu_mm 12>;
> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> + #iommu-cells = <1>;
> + };
> +
> + ipmmu_vi0: mmu@febd0000 {
> + compatible = "renesas,ipmmu-r8a77980";
> + reg = <0 0xfebd0000 0 0x1000>;
> + renesas,ipmmu-main = <&ipmmu_mm 14>;
> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> + #iommu-cells = <1>;
> + };
> +
nit: I believe the IPMMU nodes should go above the AVB rather than the
MMC node to preserve the current node sorting order of:
1) bus address
2) IP block
3) alphabetical
> mmc0: mmc@ee140000 {
> compatible = "renesas,sdhi-r8a77980",
> "renesas,rcar-gen3-sdhi";
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 03/03] arm64: dts: renesas: r8a77990: Add IPMMU devices nodes
2018-05-21 14:45 ` [PATCH 03/03] arm64: dts: renesas: r8a77990: " Magnus Damm
@ 2018-05-22 13:12 ` Simon Horman
0 siblings, 0 replies; 13+ messages in thread
From: Simon Horman @ 2018-05-22 13:12 UTC (permalink / raw)
To: Magnus Damm; +Cc: linux-renesas-soc
On Mon, May 21, 2018 at 11:45:10PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Add IPMMU device nodes for the R-Car E3 SoC aka r8a77990.
>
> The r8a77990 IPMMU is similar to r8a77995. Power domains are
> however different but the documentation seems unclear.
>
> As expected VC0 belongs to R8A77990_PD_A3VC however VP0
> is for now assigned to R8A77990_PD_ALWAYS_ON even though
> the IPMMU data sheet lists it as part of A3VP.
>
> What I can tell A3VP is not implemented on E3 so the data
> sheet probably needs an update.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> Developed on top of renesas-devel-20180518-v4.17-rc5
>
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 82 +++++++++++++++++++++++++++++
> 1 file changed, 82 insertions(+)
This looks fine but I will wait to see if there are other reviews before
applying.
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-22 13:10 ` Simon Horman
@ 2018-05-24 2:23 ` Magnus Damm
2018-05-24 7:25 ` Geert Uytterhoeven
0 siblings, 1 reply; 13+ messages in thread
From: Magnus Damm @ 2018-05-24 2:23 UTC (permalink / raw)
To: Simon Horman; +Cc: Linux-Renesas
Hi Simon,
On Tue, May 22, 2018 at 10:10 PM, Simon Horman <horms@verge.net.au> wrote:
> On Mon, May 21, 2018 at 11:45:01PM +0900, Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
>>
>> The r8a77980 IPMMU is quite similar to r8a77970 however VC0
>> has been added. The IMSSTR bit assignment has also been
>> reworked. Power domains are also quite different however the
>> the documentation is rather unclear about this topic.
>>
>> Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>> Developed on top of renesas-devel-20180518-v4.17-rc5
>>
>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>>
>> --- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
>> +++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
>> @@ -387,6 +387,55 @@
>> dma-channels = <16>;
>> };
>>
>> + ipmmu_ds1: mmu@e7740000 {
>> + compatible = "renesas,ipmmu-r8a77980";
>> + reg = <0 0xe7740000 0 0x1000>;
>> + renesas,ipmmu-main = <&ipmmu_mm 0>;
>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>> + #iommu-cells = <1>;
>> + };
>> +
>> + ipmmu_ir: mmu@ff8b0000 {
>> + compatible = "renesas,ipmmu-r8a77980";
>> + reg = <0 0xff8b0000 0 0x1000>;
>> + renesas,ipmmu-main = <&ipmmu_mm 3>;
>> + power-domains = <&sysc R8A77980_PD_A3IR>;
>> + #iommu-cells = <1>;
>> + };
>> +
>> + ipmmu_mm: mmu@e67b0000 {
>> + compatible = "renesas,ipmmu-r8a77980";
>> + reg = <0 0xe67b0000 0 0x1000>;
>> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>> + #iommu-cells = <1>;
>> + };
>> +
>> + ipmmu_rt: mmu@ffc80000 {
>> + compatible = "renesas,ipmmu-r8a77980";
>> + reg = <0 0xffc80000 0 0x1000>;
>> + renesas,ipmmu-main = <&ipmmu_mm 10>;
>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>> + #iommu-cells = <1>;
>> + };
>> +
>> + ipmmu_vc0: mmu@fe6b0000 {
>> + compatible = "renesas,ipmmu-r8a77980";
>> + reg = <0 0xfe6b0000 0 0x1000>;
>> + renesas,ipmmu-main = <&ipmmu_mm 12>;
>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>> + #iommu-cells = <1>;
>> + };
>> +
>> + ipmmu_vi0: mmu@febd0000 {
>> + compatible = "renesas,ipmmu-r8a77980";
>> + reg = <0 0xfebd0000 0 0x1000>;
>> + renesas,ipmmu-main = <&ipmmu_mm 14>;
>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>> + #iommu-cells = <1>;
>> + };
>> +
>
> nit: I believe the IPMMU nodes should go above the AVB rather than the
> MMC node to preserve the current node sorting order of:
>
> 1) bus address
> 2) IP block
> 3) alphabetical
Will reposition the IPMMU nodes in next version. Will also add vip0
and vip1 IPMMU nodes as described in the 1.0 data sheet.
Thanks,
/ magnus
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-24 2:23 ` Magnus Damm
@ 2018-05-24 7:25 ` Geert Uytterhoeven
2018-05-24 8:18 ` Magnus Damm
0 siblings, 1 reply; 13+ messages in thread
From: Geert Uytterhoeven @ 2018-05-24 7:25 UTC (permalink / raw)
To: Magnus Damm; +Cc: Simon Horman, Linux-Renesas
Hi Magnus,
On Thu, May 24, 2018 at 4:23 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> On Tue, May 22, 2018 at 10:10 PM, Simon Horman <horms@verge.net.au> wrote:
>> On Mon, May 21, 2018 at 11:45:01PM +0900, Magnus Damm wrote:
>>> From: Magnus Damm <damm+renesas@opensource.se>
>>>
>>> Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
>>>
>>> The r8a77980 IPMMU is quite similar to r8a77970 however VC0
>>> has been added. The IMSSTR bit assignment has also been
>>> reworked. Power domains are also quite different however the
>>> the documentation is rather unclear about this topic.
>>>
>>> Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
>>>
>>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>>> ---
>>>
>>> Developed on top of renesas-devel-20180518-v4.17-rc5
>>>
>>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
>>> 1 file changed, 49 insertions(+)
>>>
>>> --- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
>>> +++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
>>> @@ -387,6 +387,55 @@
>>> dma-channels = <16>;
>>> };
>>>
>>> + ipmmu_ds1: mmu@e7740000 {
>>> + compatible = "renesas,ipmmu-r8a77980";
>>> + reg = <0 0xe7740000 0 0x1000>;
>>> + renesas,ipmmu-main = <&ipmmu_mm 0>;
>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>> + #iommu-cells = <1>;
>>> + };
>>> +
>>> + ipmmu_ir: mmu@ff8b0000 {
>>> + compatible = "renesas,ipmmu-r8a77980";
>>> + reg = <0 0xff8b0000 0 0x1000>;
>>> + renesas,ipmmu-main = <&ipmmu_mm 3>;
>>> + power-domains = <&sysc R8A77980_PD_A3IR>;
>>> + #iommu-cells = <1>;
>>> + };
>>> +
>>> + ipmmu_mm: mmu@e67b0000 {
>>> + compatible = "renesas,ipmmu-r8a77980";
>>> + reg = <0 0xe67b0000 0 0x1000>;
>>> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>> + #iommu-cells = <1>;
>>> + };
>>> +
>>> + ipmmu_rt: mmu@ffc80000 {
>>> + compatible = "renesas,ipmmu-r8a77980";
>>> + reg = <0 0xffc80000 0 0x1000>;
>>> + renesas,ipmmu-main = <&ipmmu_mm 10>;
>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>> + #iommu-cells = <1>;
>>> + };
>>> +
>>> + ipmmu_vc0: mmu@fe6b0000 {
>>> + compatible = "renesas,ipmmu-r8a77980";
>>> + reg = <0 0xfe6b0000 0 0x1000>;
>>> + renesas,ipmmu-main = <&ipmmu_mm 12>;
>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>> + #iommu-cells = <1>;
>>> + };
>>> +
>>> + ipmmu_vi0: mmu@febd0000 {
>>> + compatible = "renesas,ipmmu-r8a77980";
>>> + reg = <0 0xfebd0000 0 0x1000>;
>>> + renesas,ipmmu-main = <&ipmmu_mm 14>;
>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>> + #iommu-cells = <1>;
>>> + };
>>> +
>>
>> nit: I believe the IPMMU nodes should go above the AVB rather than the
>> MMC node to preserve the current node sorting order of:
>>
>> 1) bus address
>> 2) IP block
>> 3) alphabetical
>
> Will reposition the IPMMU nodes in next version. Will also add vip0
> and vip1 IPMMU nodes as described in the 1.0 data sheet.
Note that the BSP has patches to move the ipmmu_mm nodes first, to
work around probe order issues.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-24 7:25 ` Geert Uytterhoeven
@ 2018-05-24 8:18 ` Magnus Damm
2018-05-24 8:24 ` Geert Uytterhoeven
0 siblings, 1 reply; 13+ messages in thread
From: Magnus Damm @ 2018-05-24 8:18 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Simon Horman, Linux-Renesas
Hi Geert,
On Thu, May 24, 2018 at 4:25 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Thu, May 24, 2018 at 4:23 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> On Tue, May 22, 2018 at 10:10 PM, Simon Horman <horms@verge.net.au> wrote:
>>> On Mon, May 21, 2018 at 11:45:01PM +0900, Magnus Damm wrote:
>>>> From: Magnus Damm <damm+renesas@opensource.se>
>>>>
>>>> Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
>>>>
>>>> The r8a77980 IPMMU is quite similar to r8a77970 however VC0
>>>> has been added. The IMSSTR bit assignment has also been
>>>> reworked. Power domains are also quite different however the
>>>> the documentation is rather unclear about this topic.
>>>>
>>>> Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
>>>>
>>>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>>>> ---
>>>>
>>>> Developed on top of renesas-devel-20180518-v4.17-rc5
>>>>
>>>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
>>>> 1 file changed, 49 insertions(+)
>>>>
>>>> --- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
>>>> +++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
>>>> @@ -387,6 +387,55 @@
>>>> dma-channels = <16>;
>>>> };
>>>>
>>>> + ipmmu_ds1: mmu@e7740000 {
>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>> + reg = <0 0xe7740000 0 0x1000>;
>>>> + renesas,ipmmu-main = <&ipmmu_mm 0>;
>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>> + #iommu-cells = <1>;
>>>> + };
>>>> +
>>>> + ipmmu_ir: mmu@ff8b0000 {
>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>> + reg = <0 0xff8b0000 0 0x1000>;
>>>> + renesas,ipmmu-main = <&ipmmu_mm 3>;
>>>> + power-domains = <&sysc R8A77980_PD_A3IR>;
>>>> + #iommu-cells = <1>;
>>>> + };
>>>> +
>>>> + ipmmu_mm: mmu@e67b0000 {
>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>> + reg = <0 0xe67b0000 0 0x1000>;
>>>> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
>>>> + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>> + #iommu-cells = <1>;
>>>> + };
>>>> +
>>>> + ipmmu_rt: mmu@ffc80000 {
>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>> + reg = <0 0xffc80000 0 0x1000>;
>>>> + renesas,ipmmu-main = <&ipmmu_mm 10>;
>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>> + #iommu-cells = <1>;
>>>> + };
>>>> +
>>>> + ipmmu_vc0: mmu@fe6b0000 {
>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>> + reg = <0 0xfe6b0000 0 0x1000>;
>>>> + renesas,ipmmu-main = <&ipmmu_mm 12>;
>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>> + #iommu-cells = <1>;
>>>> + };
>>>> +
>>>> + ipmmu_vi0: mmu@febd0000 {
>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>> + reg = <0 0xfebd0000 0 0x1000>;
>>>> + renesas,ipmmu-main = <&ipmmu_mm 14>;
>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>> + #iommu-cells = <1>;
>>>> + };
>>>> +
>>>
>>> nit: I believe the IPMMU nodes should go above the AVB rather than the
>>> MMC node to preserve the current node sorting order of:
>>>
>>> 1) bus address
>>> 2) IP block
>>> 3) alphabetical
>>
>> Will reposition the IPMMU nodes in next version. Will also add vip0
>> and vip1 IPMMU nodes as described in the 1.0 data sheet.
>
> Note that the BSP has patches to move the ipmmu_mm nodes first, to
> work around probe order issues.
That might have been appropriate for older IPMMU driver versions.
I think what is in upstream should not depend on any ordering.
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-24 8:18 ` Magnus Damm
@ 2018-05-24 8:24 ` Geert Uytterhoeven
2018-05-24 8:31 ` Magnus Damm
0 siblings, 1 reply; 13+ messages in thread
From: Geert Uytterhoeven @ 2018-05-24 8:24 UTC (permalink / raw)
To: Magnus Damm; +Cc: Simon Horman, Linux-Renesas
Hi Magnus,
On Thu, May 24, 2018 at 10:18 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> On Thu, May 24, 2018 at 4:25 PM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Thu, May 24, 2018 at 4:23 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> On Tue, May 22, 2018 at 10:10 PM, Simon Horman <horms@verge.net.au> wrote:
>>>> On Mon, May 21, 2018 at 11:45:01PM +0900, Magnus Damm wrote:
>>>>> From: Magnus Damm <damm+renesas@opensource.se>
>>>>>
>>>>> Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
>>>>>
>>>>> The r8a77980 IPMMU is quite similar to r8a77970 however VC0
>>>>> has been added. The IMSSTR bit assignment has also been
>>>>> reworked. Power domains are also quite different however the
>>>>> the documentation is rather unclear about this topic.
>>>>>
>>>>> Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
>>>>>
>>>>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>>>>> ---
>>>>>
>>>>> Developed on top of renesas-devel-20180518-v4.17-rc5
>>>>>
>>>>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
>>>>> 1 file changed, 49 insertions(+)
>>>>>
>>>>> --- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
>>>>> +++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
>>>>> @@ -387,6 +387,55 @@
>>>>> dma-channels = <16>;
>>>>> };
>>>>>
>>>>> + ipmmu_ds1: mmu@e7740000 {
>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>> + reg = <0 0xe7740000 0 0x1000>;
>>>>> + renesas,ipmmu-main = <&ipmmu_mm 0>;
>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>> + #iommu-cells = <1>;
>>>>> + };
>>>>> +
>>>>> + ipmmu_ir: mmu@ff8b0000 {
>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>> + reg = <0 0xff8b0000 0 0x1000>;
>>>>> + renesas,ipmmu-main = <&ipmmu_mm 3>;
>>>>> + power-domains = <&sysc R8A77980_PD_A3IR>;
>>>>> + #iommu-cells = <1>;
>>>>> + };
>>>>> +
>>>>> + ipmmu_mm: mmu@e67b0000 {
>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>> + reg = <0 0xe67b0000 0 0x1000>;
>>>>> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
>>>>> + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>> + #iommu-cells = <1>;
>>>>> + };
>>>>> +
>>>>> + ipmmu_rt: mmu@ffc80000 {
>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>> + reg = <0 0xffc80000 0 0x1000>;
>>>>> + renesas,ipmmu-main = <&ipmmu_mm 10>;
>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>> + #iommu-cells = <1>;
>>>>> + };
>>>>> +
>>>>> + ipmmu_vc0: mmu@fe6b0000 {
>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>> + reg = <0 0xfe6b0000 0 0x1000>;
>>>>> + renesas,ipmmu-main = <&ipmmu_mm 12>;
>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>> + #iommu-cells = <1>;
>>>>> + };
>>>>> +
>>>>> + ipmmu_vi0: mmu@febd0000 {
>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>> + reg = <0 0xfebd0000 0 0x1000>;
>>>>> + renesas,ipmmu-main = <&ipmmu_mm 14>;
>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>> + #iommu-cells = <1>;
>>>>> + };
>>>>> +
>>>>
>>>> nit: I believe the IPMMU nodes should go above the AVB rather than the
>>>> MMC node to preserve the current node sorting order of:
>>>>
>>>> 1) bus address
>>>> 2) IP block
>>>> 3) alphabetical
>>>
>>> Will reposition the IPMMU nodes in next version. Will also add vip0
>>> and vip1 IPMMU nodes as described in the 1.0 data sheet.
>>
>> Note that the BSP has patches to move the ipmmu_mm nodes first, to
>> work around probe order issues.
>
> That might have been appropriate for older IPMMU driver versions.
>
> I think what is in upstream should not depend on any ordering.
I don't know, it's an -EPROBE_DEFER issue.
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?id=903fa7776d24a095ecbbbc44c12cabcc096d88a6
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
2018-05-24 8:24 ` Geert Uytterhoeven
@ 2018-05-24 8:31 ` Magnus Damm
0 siblings, 0 replies; 13+ messages in thread
From: Magnus Damm @ 2018-05-24 8:31 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Simon Horman, Linux-Renesas
Hi Geert,
On Thu, May 24, 2018 at 5:24 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Thu, May 24, 2018 at 10:18 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> On Thu, May 24, 2018 at 4:25 PM, Geert Uytterhoeven
>> <geert@linux-m68k.org> wrote:
>>> On Thu, May 24, 2018 at 4:23 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>> On Tue, May 22, 2018 at 10:10 PM, Simon Horman <horms@verge.net.au> wrote:
>>>>> On Mon, May 21, 2018 at 11:45:01PM +0900, Magnus Damm wrote:
>>>>>> From: Magnus Damm <damm+renesas@opensource.se>
>>>>>>
>>>>>> Add IPMMU device nodes for the R-Car V3H SoC aka r8a77980.
>>>>>>
>>>>>> The r8a77980 IPMMU is quite similar to r8a77970 however VC0
>>>>>> has been added. The IMSSTR bit assignment has also been
>>>>>> reworked. Power domains are also quite different however the
>>>>>> the documentation is rather unclear about this topic.
>>>>>>
>>>>>> Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.
>>>>>>
>>>>>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>>>>>> ---
>>>>>>
>>>>>> Developed on top of renesas-devel-20180518-v4.17-rc5
>>>>>>
>>>>>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 49 +++++++++++++++++++++++++++++
>>>>>> 1 file changed, 49 insertions(+)
>>>>>>
>>>>>> --- 0001/arch/arm64/boot/dts/renesas/r8a77980.dtsi
>>>>>> +++ work/arch/arm64/boot/dts/renesas/r8a77980.dtsi 2018-05-21 22:31:52.460607110 +0900
>>>>>> @@ -387,6 +387,55 @@
>>>>>> dma-channels = <16>;
>>>>>> };
>>>>>>
>>>>>> + ipmmu_ds1: mmu@e7740000 {
>>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>>> + reg = <0 0xe7740000 0 0x1000>;
>>>>>> + renesas,ipmmu-main = <&ipmmu_mm 0>;
>>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>>> + #iommu-cells = <1>;
>>>>>> + };
>>>>>> +
>>>>>> + ipmmu_ir: mmu@ff8b0000 {
>>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>>> + reg = <0 0xff8b0000 0 0x1000>;
>>>>>> + renesas,ipmmu-main = <&ipmmu_mm 3>;
>>>>>> + power-domains = <&sysc R8A77980_PD_A3IR>;
>>>>>> + #iommu-cells = <1>;
>>>>>> + };
>>>>>> +
>>>>>> + ipmmu_mm: mmu@e67b0000 {
>>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>>> + reg = <0 0xe67b0000 0 0x1000>;
>>>>>> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
>>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>>> + #iommu-cells = <1>;
>>>>>> + };
>>>>>> +
>>>>>> + ipmmu_rt: mmu@ffc80000 {
>>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>>> + reg = <0 0xffc80000 0 0x1000>;
>>>>>> + renesas,ipmmu-main = <&ipmmu_mm 10>;
>>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>>> + #iommu-cells = <1>;
>>>>>> + };
>>>>>> +
>>>>>> + ipmmu_vc0: mmu@fe6b0000 {
>>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>>> + reg = <0 0xfe6b0000 0 0x1000>;
>>>>>> + renesas,ipmmu-main = <&ipmmu_mm 12>;
>>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>>> + #iommu-cells = <1>;
>>>>>> + };
>>>>>> +
>>>>>> + ipmmu_vi0: mmu@febd0000 {
>>>>>> + compatible = "renesas,ipmmu-r8a77980";
>>>>>> + reg = <0 0xfebd0000 0 0x1000>;
>>>>>> + renesas,ipmmu-main = <&ipmmu_mm 14>;
>>>>>> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
>>>>>> + #iommu-cells = <1>;
>>>>>> + };
>>>>>> +
>>>>>
>>>>> nit: I believe the IPMMU nodes should go above the AVB rather than the
>>>>> MMC node to preserve the current node sorting order of:
>>>>>
>>>>> 1) bus address
>>>>> 2) IP block
>>>>> 3) alphabetical
>>>>
>>>> Will reposition the IPMMU nodes in next version. Will also add vip0
>>>> and vip1 IPMMU nodes as described in the 1.0 data sheet.
>>>
>>> Note that the BSP has patches to move the ipmmu_mm nodes first, to
>>> work around probe order issues.
>>
>> That might have been appropriate for older IPMMU driver versions.
>>
>> I think what is in upstream should not depend on any ordering.
>
> I don't know, it's an -EPROBE_DEFER issue.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?id=903fa7776d24a095ecbbbc44c12cabcc096d88a6
Thanks, will have a look!
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes
2018-05-21 14:44 [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Magnus Damm
` (2 preceding siblings ...)
2018-05-21 14:45 ` [PATCH 03/03] arm64: dts: renesas: r8a77990: " Magnus Damm
@ 2018-05-28 9:05 ` Simon Horman
3 siblings, 0 replies; 13+ messages in thread
From: Simon Horman @ 2018-05-28 9:05 UTC (permalink / raw)
To: Magnus Damm; +Cc: linux-renesas-soc
On Mon, May 21, 2018 at 11:44:44PM +0900, Magnus Damm wrote:
> arm64: dts: renesas: Add IPMMU device nodes
>
> [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes
> [PATCH 02/03] arm64: dts: renesas: r8a77980: Add IPMMU devices nodes
> [PATCH 03/03] arm64: dts: renesas: r8a77990: Add IPMMU devices nodes
>
> This series adds IPMMU device nodes to R-Car M3-N, V3H and E3 SoCs.
>
> The IPMMU DT binding changes are not yet merged upstream however they
> have been documented by the following patches:
>
> [PATCH] iommu/ipmmu-vmsa: Document R-Car M3-N IPMMU DT bindings
> [PATCH] iommu/ipmmu-vmsa: Document R-Car V3H and E3 IPMMU DT bindings
Hi Magnus,
Given Olof Johansson's recent comments in ("Re: [GIT PULL] Renesas ARM64
Based SoC DT Updates for v4.18") please consider squashing this
series into a single patch when posting v2.
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2018-05-28 9:05 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-21 14:44 [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Magnus Damm
2018-05-21 14:44 ` [PATCH 01/03] arm64: dts: renesas: r8a77965: Add IPMMU devices nodes Magnus Damm
2018-05-22 12:55 ` Simon Horman
2018-05-21 14:45 ` [PATCH 02/03] arm64: dts: renesas: r8a77980: " Magnus Damm
2018-05-22 13:10 ` Simon Horman
2018-05-24 2:23 ` Magnus Damm
2018-05-24 7:25 ` Geert Uytterhoeven
2018-05-24 8:18 ` Magnus Damm
2018-05-24 8:24 ` Geert Uytterhoeven
2018-05-24 8:31 ` Magnus Damm
2018-05-21 14:45 ` [PATCH 03/03] arm64: dts: renesas: r8a77990: " Magnus Damm
2018-05-22 13:12 ` Simon Horman
2018-05-28 9:05 ` [PATCH 00/03] arm64: dts: renesas: Add IPMMU device nodes Simon Horman
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.