[PATCH 1/2] drm/amdgpu: correct SMU11 SYSPLL0 clock id values

[PATCH 1/2] drm/amdgpu: correct SMU11 SYSPLL0 clock id values

[Evan Quan]

Change-Id: I8dfafcce9e4ed6dabb7025a5a822d1135de6cb8a
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
 drivers/gpu/drm/amd/include/atomfirmware.h | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
index 95e187e..f25a16b 100644
--- a/drivers/gpu/drm/amd/include/atomfirmware.h
+++ b/drivers/gpu/drm/amd/include/atomfirmware.h
@@ -2112,17 +2112,16 @@ enum atom_smu11_syspll_id {
   SMU11_SYSPLL3_1_ID          = 6,
 };
 
-
-enum atom_smu11_syspll0_clock_id {
-  SMU11_SYSPLL0_SOCCLK_ID   = 0,       //	SOCCLK
-  SMU11_SYSPLL0_MP0CLK_ID   = 1,       //	MP0CLK
-  SMU11_SYSPLL0_DCLK_ID     = 2,       //	DCLK
-  SMU11_SYSPLL0_VCLK_ID     = 3,       //	VCLK
-  SMU11_SYSPLL0_ECLK_ID     = 4,       //	ECLK
+enum atom_smu11_syspll0_clock_id
+{
+  SMU11_SYSPLL0_ECLK_ID     = 0,       //	ECLK
+  SMU11_SYSPLL0_SOCCLK_ID   = 1,       //	SOCCLK
+  SMU11_SYSPLL0_MP0CLK_ID   = 2,       //	MP0CLK
+  SMU11_SYSPLL0_DCLK_ID     = 3,       //	DCLK
+  SMU11_SYSPLL0_VCLK_ID     = 4,       //	VCLK
   SMU11_SYSPLL0_DCEFCLK_ID  = 5,       //	DCEFCLK
 };
 
-
 enum atom_smu11_syspll1_0_clock_id {
   SMU11_SYSPLL1_0_UCLKA_ID   = 0,       // UCLK_a
 };
-- 
2.7.4

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[PATCH 2/2] drm/amd/powerplay: bug fixs for getsmuclockinfo

[Evan Quan]

The .syspll_id and .dfsdid are not initialzed correctly. And
le32_to_cpu transfer is needed on the output.

Signed-off-by: Evan Quan <evan.quan@amd.com>

Change-Id: I491e70b276554f38e1a296970892347474814e75
---
 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
index 60d591e..f9b5815c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
@@ -496,7 +496,9 @@ int pp_atomfwctrl__get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLK
 	uint32_t ix;
 
 	parameters.clk_id = id;
+	parameters.syspll_id = 0;
 	parameters.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
+	parameters.dfsdid = 0;
 
 	ix = GetIndexIntoMasterCmdTable(getsmuclockinfo);
 
@@ -505,7 +507,7 @@ int pp_atomfwctrl__get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLK
 		return -EINVAL;
 
 	output = (struct atom_get_smu_clock_info_output_parameters_v3_1 *)&parameters;
-	*frequency = output->atom_smu_outputclkfreq.smu_clock_freq_hz / 10000;
+	*frequency = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 10000;
 
 	return 0;
 }
-- 
2.7.4

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Re: [PATCH 1/2] drm/amdgpu: correct SMU11 SYSPLL0 clock id values

[Huang Rui]

Looks good except a few comments.

On Mon, May 28, 2018 at 09:11:03AM +0800, Evan Quan wrote:
> Change-Id: I8dfafcce9e4ed6dabb7025a5a822d1135de6cb8a

Evan, Rex, we'd better add a description for the commit, because community
don't like the empty commit log for the patches. Actually, we got pinged by
Linus...

> Signed-off-by: Evan Quan <evan.quan@amd.com>
> ---
>  drivers/gpu/drm/amd/include/atomfirmware.h | 15 +++++++--------
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
> index 95e187e..f25a16b 100644
> --- a/drivers/gpu/drm/amd/include/atomfirmware.h
> +++ b/drivers/gpu/drm/amd/include/atomfirmware.h
> @@ -2112,17 +2112,16 @@ enum atom_smu11_syspll_id {
>    SMU11_SYSPLL3_1_ID          = 6,
>  };
>  
> -
> -enum atom_smu11_syspll0_clock_id {
> -  SMU11_SYSPLL0_SOCCLK_ID   = 0,       //	SOCCLK
> -  SMU11_SYSPLL0_MP0CLK_ID   = 1,       //	MP0CLK
> -  SMU11_SYSPLL0_DCLK_ID     = 2,       //	DCLK
> -  SMU11_SYSPLL0_VCLK_ID     = 3,       //	VCLK
> -  SMU11_SYSPLL0_ECLK_ID     = 4,       //	ECLK
> +enum atom_smu11_syspll0_clock_id
> +{

Open brace '{' following enum go on the same line.

With that fixed, please add
Reviewed-by: Huang Rui <ray.huang@amd.com>

> +  SMU11_SYSPLL0_ECLK_ID     = 0,       //	ECLK
> +  SMU11_SYSPLL0_SOCCLK_ID   = 1,       //	SOCCLK
> +  SMU11_SYSPLL0_MP0CLK_ID   = 2,       //	MP0CLK
> +  SMU11_SYSPLL0_DCLK_ID     = 3,       //	DCLK
> +  SMU11_SYSPLL0_VCLK_ID     = 4,       //	VCLK
>    SMU11_SYSPLL0_DCEFCLK_ID  = 5,       //	DCEFCLK
>  };
>  
> -
>  enum atom_smu11_syspll1_0_clock_id {
>    SMU11_SYSPLL1_0_UCLKA_ID   = 0,       // UCLK_a
>  };
> -- 
> 2.7.4
> 
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> amd-gfx@lists.freedesktop.org
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Re: [PATCH 2/2] drm/amd/powerplay: bug fixs for getsmuclockinfo

[Huang Rui]

On Mon, May 28, 2018 at 09:11:04AM +0800, Evan Quan wrote:
> The .syspll_id and .dfsdid are not initialzed correctly. And
> le32_to_cpu transfer is needed on the output.
> 
> Signed-off-by: Evan Quan <evan.quan@amd.com>
> 

Reviewed-by: Huang Rui <ray.huang@amd.com>

> Change-Id: I491e70b276554f38e1a296970892347474814e75
> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
> index 60d591e..f9b5815c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
> @@ -496,7 +496,9 @@ int pp_atomfwctrl__get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLK
>  	uint32_t ix;
>  
>  	parameters.clk_id = id;
> +	parameters.syspll_id = 0;
>  	parameters.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
> +	parameters.dfsdid = 0;
>  
>  	ix = GetIndexIntoMasterCmdTable(getsmuclockinfo);
>  
> @@ -505,7 +507,7 @@ int pp_atomfwctrl__get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLK
>  		return -EINVAL;
>  
>  	output = (struct atom_get_smu_clock_info_output_parameters_v3_1 *)&parameters;
> -	*frequency = output->atom_smu_outputclkfreq.smu_clock_freq_hz / 10000;
> +	*frequency = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 10000;
>  
>  	return 0;
>  }
> -- 
> 2.7.4
> 
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> amd-gfx@lists.freedesktop.org
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