[PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch

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* [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
@ 2018-06-07  7:30 Chris Wilson
  2018-06-07  7:30 ` [PATCH 2/2] drm/i915/ringbuffer: Brute force context restore Chris Wilson
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Chris Wilson @ 2018-06-07  7:30 UTC (permalink / raw)
  To: intel-gfx

When using CS commands, PP_DIR is not sampled until the context is
loaded, but when doing manual mmio after reset we load the context
before the mm. Let's switch this over for consistency.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 65811e2fa7da..4051fb55a2cf 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -574,16 +574,7 @@ static void reset_ring(struct intel_engine_cs *engine,
 		struct intel_context *ce = request->hw_context;
 		struct i915_hw_ppgtt *ppgtt;
 
-		if (ce->state) {
-			I915_WRITE(CCID,
-				   i915_ggtt_offset(ce->state) |
-				   BIT(8) /* must be set! */ |
-				   CCID_EXTENDED_STATE_SAVE |
-				   CCID_EXTENDED_STATE_RESTORE |
-				   CCID_EN);
-		}
-
-		ppgtt = request->gem_context->ppgtt ?: engine->i915->mm.aliasing_ppgtt;
+		ppgtt = request->gem_context->ppgtt ?: dev_priv->mm.aliasing_ppgtt;
 		if (ppgtt) {
 			u32 pd_offset = ppgtt->pd.base.ggtt_offset << 10;
 
@@ -600,6 +591,16 @@ static void reset_ring(struct intel_engine_cs *engine,
 			ppgtt->pd_dirty_rings &= ~intel_engine_flag(engine);
 		}
 
+		if (ce->state) {
+			I915_WRITE(CCID,
+				   i915_ggtt_offset(ce->state) |
+				   BIT(8) /* must be set! */ |
+				   CCID_EXTENDED_STATE_SAVE |
+				   CCID_EXTENDED_STATE_RESTORE |
+				   CCID_EN);
+		}
+
+
 		/* If the rq hung, jump to its breadcrumb and skip the batch */
 		if (request->fence.error == -EIO)
 			request->ring->head = request->postfix;
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] drm/i915/ringbuffer: Brute force context restore
  2018-06-07  7:30 [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
@ 2018-06-07  7:30 ` Chris Wilson
  2018-06-07  7:33 ` [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2018-06-07  7:30 UTC (permalink / raw)
  To: intel-gfx

An issue encountered with switching mm on gen7 is that the GPU likes to
hang (with the VS unit busy) when told to force restore the current
context. We can simply workaround this by substituting the
MI_FORCE_RESTORE flag with a round-trip through the kernel_context,
forcing the context to be saved and restored; thereby reloading the
PP_DIR registers and updating the modified page directory!

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 30 ++++++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 4051fb55a2cf..9e6883606b1f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1459,6 +1459,7 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags)
 		(HAS_LEGACY_SEMAPHORES(i915) && IS_GEN7(i915)) ?
 		INTEL_INFO(i915)->num_rings - 1 :
 		0;
+	bool force_restore = false;
 	int len;
 	u32 *cs;
 
@@ -1472,6 +1473,12 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags)
 	len = 4;
 	if (IS_GEN7(i915))
 		len += 2 + (num_rings ? 4*num_rings + 6 : 0);
+	if (flags & MI_FORCE_RESTORE) {
+		GEM_BUG_ON(flags & MI_RESTORE_INHIBIT);
+		flags &= ~MI_FORCE_RESTORE;
+		force_restore = true;
+		len += 2;
+	}
 
 	cs = intel_ring_begin(rq, len);
 	if (IS_ERR(cs))
@@ -1497,6 +1504,20 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags)
 	}
 
 	*cs++ = MI_NOOP;
+	if (force_restore) {
+		/*
+		 * The HW doesn't handle being told to restore the current
+		 * context very well. Quite often it likes goes to go off and
+		 * sulk, especially when it is meant to be reloading PP_DIR.
+		 * A very simple fix to force the reload is to simply switch
+		 * away from the current context and back again.
+		 */
+		*cs++ = MI_SET_CONTEXT;
+		*cs++ = i915_ggtt_offset(to_intel_context(i915->kernel_context,
+							  engine)->state) |
+			MI_MM_SPACE_GTT |
+			MI_RESTORE_INHIBIT;
+	}
 	*cs++ = MI_SET_CONTEXT;
 	*cs++ = i915_ggtt_offset(rq->hw_context->state) | flags;
 	/*
@@ -1586,11 +1607,14 @@ static int switch_context(struct i915_request *rq)
 
 		to_mm->pd_dirty_rings &= ~intel_engine_flag(engine);
 		engine->legacy_active_ppgtt = to_mm;
-		hw_flags = MI_FORCE_RESTORE;
+
+		if (to_ctx == from_ctx) {
+			hw_flags = MI_FORCE_RESTORE;
+			from_ctx = NULL;
+		}
 	}
 
-	if (rq->hw_context->state &&
-	    (to_ctx != from_ctx || hw_flags & MI_FORCE_RESTORE)) {
+	if (rq->hw_context->state && to_ctx != from_ctx) {
 		GEM_BUG_ON(engine->id != RCS);
 
 		/*
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
  2018-06-07  7:30 [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
  2018-06-07  7:30 ` [PATCH 2/2] drm/i915/ringbuffer: Brute force context restore Chris Wilson
@ 2018-06-07  7:33 ` Chris Wilson
  2018-06-07  8:34 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2018-06-07  7:33 UTC (permalink / raw)
  To: intel-gfx

Mark order? I have no idea. Let me go get some coffee.

Quoting Chris Wilson (2018-06-07 08:30:24)
> When using CS commands, PP_DIR is not sampled until the context is
> loaded, but when doing manual mmio after reset we load the context
> before the mm. Let's switch this over for consistency.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 21 +++++++++++----------
>  1 file changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 65811e2fa7da..4051fb55a2cf 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -574,16 +574,7 @@ static void reset_ring(struct intel_engine_cs *engine,
>                 struct intel_context *ce = request->hw_context;
>                 struct i915_hw_ppgtt *ppgtt;
>  
> -               if (ce->state) {
> -                       I915_WRITE(CCID,
> -                                  i915_ggtt_offset(ce->state) |
> -                                  BIT(8) /* must be set! */ |
> -                                  CCID_EXTENDED_STATE_SAVE |
> -                                  CCID_EXTENDED_STATE_RESTORE |
> -                                  CCID_EN);
> -               }
> -
> -               ppgtt = request->gem_context->ppgtt ?: engine->i915->mm.aliasing_ppgtt;
> +               ppgtt = request->gem_context->ppgtt ?: dev_priv->mm.aliasing_ppgtt;
>                 if (ppgtt) {
>                         u32 pd_offset = ppgtt->pd.base.ggtt_offset << 10;
>  
> @@ -600,6 +591,16 @@ static void reset_ring(struct intel_engine_cs *engine,
>                         ppgtt->pd_dirty_rings &= ~intel_engine_flag(engine);
>                 }
>  
> +               if (ce->state) {
> +                       I915_WRITE(CCID,
> +                                  i915_ggtt_offset(ce->state) |
> +                                  BIT(8) /* must be set! */ |
> +                                  CCID_EXTENDED_STATE_SAVE |
> +                                  CCID_EXTENDED_STATE_RESTORE |
> +                                  CCID_EN);
> +               }
> +
> +
>                 /* If the rq hung, jump to its breadcrumb and skip the batch */
>                 if (request->fence.error == -EIO)
>                         request->ring->head = request->postfix;
> -- 
> 2.17.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
  2018-06-07  7:30 [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
  2018-06-07  7:30 ` [PATCH 2/2] drm/i915/ringbuffer: Brute force context restore Chris Wilson
  2018-06-07  7:33 ` [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
@ 2018-06-07  8:34 ` Patchwork
  2018-06-07  8:52 ` ✓ Fi.CI.BAT: success " Patchwork
  2018-06-07 10:31 ` ✓ Fi.CI.IGT: " Patchwork
  4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-07  8:34 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
URL   : https://patchwork.freedesktop.org/series/44392/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
b79de1db57c5 drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
-:51: CHECK:LINE_SPACING: Please don't use multiple blank lines
#51: FILE: drivers/gpu/drm/i915/intel_ringbuffer.c:603:
+
+

total: 0 errors, 0 warnings, 1 checks, 33 lines checked
2dd0b7205b8c drm/i915/ringbuffer: Brute force context restore

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
  2018-06-07  7:30 [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
                   ` (2 preceding siblings ...)
  2018-06-07  8:34 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
@ 2018-06-07  8:52 ` Patchwork
  2018-06-07 10:31 ` ✓ Fi.CI.IGT: " Patchwork
  4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-07  8:52 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
URL   : https://patchwork.freedesktop.org/series/44392/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4287 -> Patchwork_9226 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44392/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9226 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    igt@gem_sync@basic-many-each:
      fi-cnl-y3:          NOTRUN -> INCOMPLETE (fdo#105086)

    igt@kms_flip@basic-flip-vs-modeset:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106000)

    
    ==== Possible fixes ====

    igt@debugfs_test@read_all_entries:
      fi-cnl-y3:          INCOMPLETE (fdo#105086) -> PASS

    igt@kms_flip@basic-plain-flip:
      fi-glk-j4005:       DMESG-WARN (fdo#106097) -> PASS

    
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#105086 https://bugs.freedesktop.org/show_bug.cgi?id=105086
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097


== Participating hosts (41 -> 37) ==

  Missing    (4): fi-byt-squawks fi-bdw-gvtdvm fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4287 -> Patchwork_9226

  CI_DRM_4287: 3da21a5f843f8c11efe3326f3f7854df8ecd72c0 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4509: c8f1ae58e1b7da17af4722a5ce5a9cd8b9a34059 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9226: 2dd0b7205b8cc0789023a6645b6b704689a50b01 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

2dd0b7205b8c drm/i915/ringbuffer: Brute force context restore
b79de1db57c5 drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9226/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
  2018-06-07  7:30 [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
                   ` (3 preceding siblings ...)
  2018-06-07  8:52 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-06-07 10:31 ` Patchwork
  4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-07 10:31 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context()
URL   : https://patchwork.freedesktop.org/series/44392/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4287_full -> Patchwork_9226_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9226_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9226_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9226_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_schedule@deep-vebox:
      shard-kbl:          SKIP -> PASS +1

    igt@gem_mocs_settings@mocs-rc6-bsd1:
      shard-kbl:          PASS -> SKIP

    igt@kms_vblank@pipe-b-wait-forked:
      shard-snb:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_9226_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_gtt:
      shard-glk:          PASS -> INCOMPLETE (fdo#103359, k.org#198133)
      shard-apl:          PASS -> INCOMPLETE (fdo#103927)

    igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@dpms-vs-vblank-race-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103060)

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103928) +2

    igt@kms_setmode@basic:
      shard-apl:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_hangcheck:
      shard-kbl:          DMESG-FAIL (fdo#106560) -> PASS

    igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
      shard-glk:          FAIL (fdo#105703) -> PASS

    igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
      shard-hsw:          FAIL (fdo#105767) -> PASS

    igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
      shard-glk:          FAIL (fdo#105454, fdo#106509) -> PASS

    igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
      shard-hsw:          FAIL (fdo#102887) -> PASS +1

    igt@kms_flip@dpms-vs-vblank-race:
      shard-glk:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@modeset-vs-vblank-race:
      shard-hsw:          FAIL (fdo#103060) -> PASS

    igt@kms_flip_tiling@flip-x-tiled:
      shard-glk:          FAIL (fdo#104724) -> PASS +1

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
      shard-glk:          FAIL (fdo#103167, fdo#104724) -> PASS

    igt@kms_setmode@basic:
      shard-kbl:          FAIL (fdo#99912) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454
  fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703
  fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
  fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509
  fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4287 -> Patchwork_9226

  CI_DRM_4287: 3da21a5f843f8c11efe3326f3f7854df8ecd72c0 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4509: c8f1ae58e1b7da17af4722a5ce5a9cd8b9a34059 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9226: 2dd0b7205b8cc0789023a6645b6b704689a50b01 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9226/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-06-07 10:31 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-07  7:30 [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
2018-06-07  7:30 ` [PATCH 2/2] drm/i915/ringbuffer: Brute force context restore Chris Wilson
2018-06-07  7:33 ` [PATCH 1/2] drm/i915: Mark order of mmio to CCID/PP_DIR with switch_context() Chris Wilson
2018-06-07  8:34 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
2018-06-07  8:52 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-07 10:31 ` ✓ Fi.CI.IGT: " Patchwork

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