* [PATCH/RFT 0/2] Add PCIe support for r8a77965
@ 2018-06-07 12:11 ` Yoshihiro Kaneko
0 siblings, 0 replies; 14+ messages in thread
From: Yoshihiro Kaneko @ 2018-06-07 12:11 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Simon Horman, Magnus Damm, linux-arm-kernel
This series adds PCIe support for r8a77965 (R-Car M3-N).
It is not necessary to update driver and PFC.
This series is based on the devel branch of Simon Horman's renesas tree.
Takeshi Kihara (1):
arm64: dts: renesas: r8a77965: Add PCIe device nodes
Yoshihiro Kaneko (1):
PCI: rcar: Add compatible string for r8a77965
Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 48 +++++++++++++++++++++-
2 files changed, 47 insertions(+), 2 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH/RFT 0/2] Add PCIe support for r8a77965
@ 2018-06-07 12:11 ` Yoshihiro Kaneko
0 siblings, 0 replies; 14+ messages in thread
From: Yoshihiro Kaneko @ 2018-06-07 12:11 UTC (permalink / raw)
To: linux-arm-kernel
This series adds PCIe support for r8a77965 (R-Car M3-N).
It is not necessary to update driver and PFC.
This series is based on the devel branch of Simon Horman's renesas tree.
Takeshi Kihara (1):
arm64: dts: renesas: r8a77965: Add PCIe device nodes
Yoshihiro Kaneko (1):
PCI: rcar: Add compatible string for r8a77965
Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 48 +++++++++++++++++++++-
2 files changed, 47 insertions(+), 2 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH/RFT 1/2] PCI: rcar: Add compatible string for r8a77965
2018-06-07 12:11 ` Yoshihiro Kaneko
@ 2018-06-07 12:11 ` Yoshihiro Kaneko
-1 siblings, 0 replies; 14+ messages in thread
From: Yoshihiro Kaneko @ 2018-06-07 12:11 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Simon Horman, Magnus Damm, linux-arm-kernel
This patch adds support for r8a77965 (R-Car M3-N)
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
---
Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
index 1fb614e..dd71cfe 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
+++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
@@ -8,6 +8,7 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
"renesas,pcie-r8a7793" for the R8A7793 SoC;
"renesas,pcie-r8a7795" for the R8A7795 SoC;
"renesas,pcie-r8a7796" for the R8A7796 SoC;
+ "renesas,pcie-r8a77965" for the R8A77965 SoC;
"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
RZ/G1 compatible device.
"renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
--
1.9.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH/RFT 1/2] PCI: rcar: Add compatible string for r8a77965
@ 2018-06-07 12:11 ` Yoshihiro Kaneko
0 siblings, 0 replies; 14+ messages in thread
From: Yoshihiro Kaneko @ 2018-06-07 12:11 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds support for r8a77965 (R-Car M3-N)
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
---
Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
index 1fb614e..dd71cfe 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
+++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
@@ -8,6 +8,7 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
"renesas,pcie-r8a7793" for the R8A7793 SoC;
"renesas,pcie-r8a7795" for the R8A7795 SoC;
"renesas,pcie-r8a7796" for the R8A7796 SoC;
+ "renesas,pcie-r8a77965" for the R8A77965 SoC;
"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
RZ/G1 compatible device.
"renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
--
1.9.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes
2018-06-07 12:11 ` Yoshihiro Kaneko
@ 2018-06-07 12:11 ` Yoshihiro Kaneko
-1 siblings, 0 replies; 14+ messages in thread
From: Yoshihiro Kaneko @ 2018-06-07 12:11 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Simon Horman, Magnus Damm, linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
Based on a similar patches of the R8A7796 device tree
by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 48 +++++++++++++++++++++++++++++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index d740c79..0d39a31 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1433,13 +1433,57 @@
};
pciec0: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a77965",
+ "renesas,pcie-rcar-gen3";
reg = <0 0xfe000000 0 0x80000>;
- /* placeholder */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
};
pciec1: pcie@ee800000 {
+ compatible = "renesas,pcie-r8a77965",
+ "renesas,pcie-rcar-gen3";
reg = <0 0xee800000 0 0x80000>;
- /* placeholder */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
+ 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
+ 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
+ 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
};
fcpf0: fcp@fe950000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes
@ 2018-06-07 12:11 ` Yoshihiro Kaneko
0 siblings, 0 replies; 14+ messages in thread
From: Yoshihiro Kaneko @ 2018-06-07 12:11 UTC (permalink / raw)
To: linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
Based on a similar patches of the R8A7796 device tree
by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 48 +++++++++++++++++++++++++++++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index d740c79..0d39a31 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1433,13 +1433,57 @@
};
pciec0: pcie at fe000000 {
+ compatible = "renesas,pcie-r8a77965",
+ "renesas,pcie-rcar-gen3";
reg = <0 0xfe000000 0 0x80000>;
- /* placeholder */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
};
pciec1: pcie at ee800000 {
+ compatible = "renesas,pcie-r8a77965",
+ "renesas,pcie-rcar-gen3";
reg = <0 0xee800000 0 0x80000>;
- /* placeholder */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
+ 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
+ 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
+ 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
};
fcpf0: fcp at fe950000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH/RFT 1/2] PCI: rcar: Add compatible string for r8a77965
2018-06-07 12:11 ` Yoshihiro Kaneko
@ 2018-06-11 8:20 ` Simon Horman
-1 siblings, 0 replies; 14+ messages in thread
From: Simon Horman @ 2018-06-11 8:20 UTC (permalink / raw)
To: Yoshihiro Kaneko; +Cc: linux-renesas-soc, Magnus Damm, linux-arm-kernel
On Thu, Jun 07, 2018 at 09:11:33PM +0900, Yoshihiro Kaneko wrote:
> This patch adds support for r8a77965 (R-Car M3-N)
>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
> index 1fb614e..dd71cfe 100644
> --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
> @@ -8,6 +8,7 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
> "renesas,pcie-r8a7793" for the R8A7793 SoC;
> "renesas,pcie-r8a7795" for the R8A7795 SoC;
> "renesas,pcie-r8a7796" for the R8A7796 SoC;
> + "renesas,pcie-r8a77965" for the R8A77965 SoC;
> "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
> RZ/G1 compatible device.
> "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH/RFT 1/2] PCI: rcar: Add compatible string for r8a77965
@ 2018-06-11 8:20 ` Simon Horman
0 siblings, 0 replies; 14+ messages in thread
From: Simon Horman @ 2018-06-11 8:20 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jun 07, 2018 at 09:11:33PM +0900, Yoshihiro Kaneko wrote:
> This patch adds support for r8a77965 (R-Car M3-N)
>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
> index 1fb614e..dd71cfe 100644
> --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
> @@ -8,6 +8,7 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
> "renesas,pcie-r8a7793" for the R8A7793 SoC;
> "renesas,pcie-r8a7795" for the R8A7795 SoC;
> "renesas,pcie-r8a7796" for the R8A7796 SoC;
> + "renesas,pcie-r8a77965" for the R8A77965 SoC;
> "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
> RZ/G1 compatible device.
> "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes
2018-06-07 12:11 ` Yoshihiro Kaneko
@ 2018-06-11 8:28 ` Simon Horman
-1 siblings, 0 replies; 14+ messages in thread
From: Simon Horman @ 2018-06-11 8:28 UTC (permalink / raw)
To: Yoshihiro Kaneko; +Cc: linux-renesas-soc, Magnus Damm, linux-arm-kernel
On Thu, Jun 07, 2018 at 09:11:34PM +0900, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
>
> Based on a similar patches of the R8A7796 device tree
> by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Hi,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes
@ 2018-06-11 8:28 ` Simon Horman
0 siblings, 0 replies; 14+ messages in thread
From: Simon Horman @ 2018-06-11 8:28 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jun 07, 2018 at 09:11:34PM +0900, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
>
> Based on a similar patches of the R8A7796 device tree
> by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Hi,
This looks fine to me but I will wait to see if there are other reviews
before applying.
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH/RFT 1/2] PCI: rcar: Add compatible string for r8a77965
2018-06-07 12:11 ` Yoshihiro Kaneko
@ 2018-06-11 10:16 ` Geert Uytterhoeven
-1 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2018-06-11 10:16 UTC (permalink / raw)
To: Yoshihiro Kaneko; +Cc: Linux-Renesas, Simon Horman, Magnus Damm, Linux ARM
On Thu, Jun 7, 2018 at 2:14 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote:
> This patch adds support for r8a77965 (R-Car M3-N)
>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH/RFT 1/2] PCI: rcar: Add compatible string for r8a77965
@ 2018-06-11 10:16 ` Geert Uytterhoeven
0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2018-06-11 10:16 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jun 7, 2018 at 2:14 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote:
> This patch adds support for r8a77965 (R-Car M3-N)
>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes
2018-06-11 8:28 ` Simon Horman
@ 2018-06-13 10:59 ` Simon Horman
-1 siblings, 0 replies; 14+ messages in thread
From: Simon Horman @ 2018-06-13 10:59 UTC (permalink / raw)
To: Yoshihiro Kaneko; +Cc: linux-renesas-soc, Magnus Damm, linux-arm-kernel
On Mon, Jun 11, 2018 at 10:28:22AM +0200, Simon Horman wrote:
> On Thu, Jun 07, 2018 at 09:11:34PM +0900, Yoshihiro Kaneko wrote:
> > From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> >
> > This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
> >
> > Based on a similar patches of the R8A7796 device tree
> > by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
> >
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
>
> Hi,
>
> This looks fine to me but I will wait to see if there are other reviews
> before applying.
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Thanks Kaneko-san, applied.
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes
@ 2018-06-13 10:59 ` Simon Horman
0 siblings, 0 replies; 14+ messages in thread
From: Simon Horman @ 2018-06-13 10:59 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 11, 2018 at 10:28:22AM +0200, Simon Horman wrote:
> On Thu, Jun 07, 2018 at 09:11:34PM +0900, Yoshihiro Kaneko wrote:
> > From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> >
> > This patch adds PCIe{0,1} device nodes to R8A77965 SoC.
> >
> > Based on a similar patches of the R8A7796 device tree
> > by Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com>.
> >
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
>
> Hi,
>
> This looks fine to me but I will wait to see if there are other reviews
> before applying.
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Thanks Kaneko-san, applied.
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2018-06-13 10:59 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
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2018-06-07 12:11 [PATCH/RFT 0/2] Add PCIe support for r8a77965 Yoshihiro Kaneko
2018-06-07 12:11 ` Yoshihiro Kaneko
2018-06-07 12:11 ` [PATCH/RFT 1/2] PCI: rcar: Add compatible string " Yoshihiro Kaneko
2018-06-07 12:11 ` Yoshihiro Kaneko
2018-06-11 8:20 ` Simon Horman
2018-06-11 8:20 ` Simon Horman
2018-06-11 10:16 ` Geert Uytterhoeven
2018-06-11 10:16 ` Geert Uytterhoeven
2018-06-07 12:11 ` [PATCH/RFT 2/2] arm64: dts: renesas: r8a77965: Add PCIe device nodes Yoshihiro Kaneko
2018-06-07 12:11 ` Yoshihiro Kaneko
2018-06-11 8:28 ` Simon Horman
2018-06-11 8:28 ` Simon Horman
2018-06-13 10:59 ` Simon Horman
2018-06-13 10:59 ` Simon Horman
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