[U-Boot] [PATCH 0/6] ARM: uniphier: some more updates for v2018.07-rc2

[U-Boot] [PATCH 0/6] ARM: uniphier: some more updates for v2018.07-rc2

[Masahiro Yamada]

Masahiro Yamada (6):
  ARM: uniphier: enable CONFIG_SNI_AVE and disable CONFIG_SMC911X
  reset: uniphier: sync reset data with Linux 4.18-rc1
  serial: uniphier: rename struct uniphier_serial_private_data
  serial: uniphier: set clock rate without clock-frequency property
  ARM: dts: uniphier: sync DT with Linux 4.18-rc1
  ARM: dts: uniphier: enable SD card for PXs3 reference board

 arch/arm/dts/uniphier-ld11.dtsi    |  4 ---
 arch/arm/dts/uniphier-ld20.dtsi    |  4 ---
 arch/arm/dts/uniphier-ld4.dtsi     |  4 ---
 arch/arm/dts/uniphier-pro4.dtsi    |  6 +----
 arch/arm/dts/uniphier-pro5.dtsi    |  4 ---
 arch/arm/dts/uniphier-pxs2.dtsi    |  4 ---
 arch/arm/dts/uniphier-pxs3-ref.dts |  4 +++
 arch/arm/dts/uniphier-pxs3.dtsi    |  4 ---
 arch/arm/dts/uniphier-sld8.dtsi    |  4 ---
 configs/uniphier_v7_defconfig      |  6 ++---
 configs/uniphier_v8_defconfig      |  6 ++---
 drivers/reset/reset-uniphier.c     | 13 ++++++----
 drivers/serial/serial_uniphier.c   | 51 ++++++++++++++++++++++++++++++++------
 13 files changed, 60 insertions(+), 54 deletions(-)

-- 
2.7.4

[U-Boot] [PATCH 1/6] ARM: uniphier: enable CONFIG_SNI_AVE and disable CONFIG_SMC911X

[Masahiro Yamada]

Enable the on-chip ethernet driver for uniphier_{v7,v8}_defconfig.
Disable the on-board SMC911x because it has not migrated to the
driver model yet - it is not possible to enable DM and non-DM
drivers at the same time.

The CONFIG_SMC911X for uniphier_ld4_sld8_defconfig is still kept
because the on-chip ethernet driver for LD4, sLD8 is not supported
yet.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 configs/uniphier_v7_defconfig | 6 ++----
 configs/uniphier_v8_defconfig | 6 ++----
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index 785f1ab..89b7b4a 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -42,10 +42,8 @@ CONFIG_NAND=y
 CONFIG_NAND_DENALI_DT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SPL_NAND_DENALI=y
-CONFIG_NETDEVICES=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x0
-CONFIG_SMC911X_32_BIT=y
+CONFIG_DM_ETH=y
+CONFIG_SNI_AVE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index cb7680a..93df2f6 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -39,10 +39,8 @@ CONFIG_MMC_SDHCI_CADENCE=y
 CONFIG_NAND=y
 CONFIG_NAND_DENALI_DT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
-CONFIG_NETDEVICES=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x0
-CONFIG_SMC911X_32_BIT=y
+CONFIG_DM_ETH=y
+CONFIG_SNI_AVE=y
 CONFIG_PINCONF=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
-- 
2.7.4

[U-Boot] [PATCH 2/6] reset: uniphier: sync reset data with Linux 4.18-rc1

[Masahiro Yamada]

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/reset/reset-uniphier.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 657243a..39d684b 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -71,7 +71,7 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = {
 	UNIPHIER_RESETX(4, 0x200c, 2),		/* eMMC */
 	UNIPHIER_RESETX(6, 0x200c, 6),		/* ETHER */
 	UNIPHIER_RESETX(8, 0x200c, 8),		/* STDMAC */
-	UNIPHIER_RESETX(12, 0x200c, 5),		/* GIO */
+	UNIPHIER_RESETX(14, 0x200c, 5),		/* USB30 */
 	UNIPHIER_RESETX(16, 0x200c, 12),	/* USB30-PHY0 */
 	UNIPHIER_RESETX(17, 0x200c, 13),	/* USB30-PHY1 */
 	UNIPHIER_RESETX(18, 0x200c, 14),	/* USB30-PHY2 */
@@ -85,10 +85,13 @@ static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = {
 	UNIPHIER_RESETX(6, 0x200c, 9),		/* ETHER0 */
 	UNIPHIER_RESETX(7, 0x200c, 10),		/* ETHER1 */
 	UNIPHIER_RESETX(8, 0x200c, 12),		/* STDMAC */
-	UNIPHIER_RESETX(12, 0x200c, 5),		/* USB30 (GIO0) */
-	UNIPHIER_RESETX(13, 0x200c, 6),		/* USB31 (GIO1) */
-	UNIPHIER_RESETX(16, 0x200c, 16),	/* USB30-PHY */
-	UNIPHIER_RESETX(20, 0x200c, 17),	/* USB31-PHY */
+	UNIPHIER_RESETX(12, 0x200c, 4),		/* USB30 link */
+	UNIPHIER_RESETX(13, 0x200c, 5),		/* USB31 link */
+	UNIPHIER_RESETX(16, 0x200c, 16),	/* USB30-PHY0 */
+	UNIPHIER_RESETX(17, 0x200c, 18),	/* USB30-PHY1 */
+	UNIPHIER_RESETX(18, 0x200c, 20),	/* USB30-PHY2 */
+	UNIPHIER_RESETX(20, 0x200c, 17),	/* USB31-PHY0 */
+	UNIPHIER_RESETX(21, 0x200c, 19),	/* USB31-PHY1 */
 	UNIPHIER_RESET_END,
 };
 
-- 
2.7.4

[U-Boot] [PATCH 3/6] serial: uniphier: rename struct uniphier_serial_private_data

[Masahiro Yamada]

Just for making it shorter.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/serial/serial_uniphier.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index 8878079..b06fc00 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -33,17 +33,17 @@ struct uniphier_serial {
 	u32 dlr;		/* Divisor Latch Register */
 };
 
-struct uniphier_serial_private_data {
+struct uniphier_serial_priv {
 	struct uniphier_serial __iomem *membase;
 	unsigned int uartclk;
 };
 
 #define uniphier_serial_port(dev)	\
-	((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
+	((struct uniphier_serial_priv *)dev_get_priv(dev))->membase
 
 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
 {
-	struct uniphier_serial_private_data *priv = dev_get_priv(dev);
+	struct uniphier_serial_priv *priv = dev_get_priv(dev);
 	struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
 	const unsigned int mode_x_div = 16;
 	unsigned int divisor;
@@ -90,7 +90,7 @@ static int uniphier_serial_pending(struct udevice *dev, bool input)
 static int uniphier_serial_probe(struct udevice *dev)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	struct uniphier_serial_private_data *priv = dev_get_priv(dev);
+	struct uniphier_serial_priv *priv = dev_get_priv(dev);
 	struct uniphier_serial __iomem *port;
 	fdt_addr_t base;
 	u32 tmp;
@@ -133,6 +133,6 @@ U_BOOT_DRIVER(uniphier_serial) = {
 	.id = UCLASS_SERIAL,
 	.of_match = uniphier_uart_of_match,
 	.probe = uniphier_serial_probe,
-	.priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
+	.priv_auto_alloc_size = sizeof(struct uniphier_serial_priv),
 	.ops = &uniphier_serial_ops,
 };
-- 
2.7.4

[U-Boot] [PATCH 4/6] serial: uniphier: set clock rate without clock-frequency property

[Masahiro Yamada]

In Linux, the clock rate of the UART is given by the clock driver.

If you try to follow that in U-Boot, you would end up with adding
more u-boot,dm-pre-reloc properties, and also the clock driver would
be too big for SPL, which is used for UniPhier ARMv7 platform.

The current solution is to add 'clock-frequency' property to the
UART nodes, but it does not exist in the DT files in Linux.  I do
not want to let DT diverge for U-Boot.

Check the SoC compatible and set the clock rate according to it.
This will be helpful to sync DT between Linux and U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/serial/serial_uniphier.c | 41 +++++++++++++++++++++++++++++++++++++---
 1 file changed, 38 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index b06fc00..c7f46e5 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <linux/bug.h>
 #include <linux/io.h>
 #include <linux/serial_reg.h>
 #include <linux/sizes.h>
@@ -87,11 +88,34 @@ static int uniphier_serial_pending(struct udevice *dev, bool input)
 		return !(readl(&port->lsr) & UART_LSR_THRE);
 }
 
+/*
+ * SPL does not have enough memory footprint for the clock driver.
+ * Hardcode clock frequency for each SoC.
+ */
+struct uniphier_serial_clk_data {
+	const char *compatible;
+	unsigned int clk_rate;
+};
+
+static const struct uniphier_serial_clk_data uniphier_serial_clk_data[] = {
+	{ .compatible = "socionext,uniphier-ld4",  .clk_rate = 36864000 },
+	{ .compatible = "socionext,uniphier-pro4", .clk_rate = 73728000 },
+	{ .compatible = "socionext,uniphier-sld8", .clk_rate = 80000000 },
+	{ .compatible = "socionext,uniphier-pro5", .clk_rate = 73728000 },
+	{ .compatible = "socionext,uniphier-pxs2", .clk_rate = 88888888 },
+	{ .compatible = "socionext,uniphier-ld6b", .clk_rate = 88888888 },
+	{ .compatible = "socionext,uniphier-ld11", .clk_rate = 58823529 },
+	{ .compatible = "socionext,uniphier-ld20", .clk_rate = 58823529 },
+	{ .compatible = "socionext,uniphier-pxs3", .clk_rate = 58823529 },
+	{ /* sentinel */ },
+};
+
 static int uniphier_serial_probe(struct udevice *dev)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	struct uniphier_serial_priv *priv = dev_get_priv(dev);
 	struct uniphier_serial __iomem *port;
+	const struct uniphier_serial_clk_data *clk_data;
+	ofnode root_node;
 	fdt_addr_t base;
 	u32 tmp;
 
@@ -105,8 +129,19 @@ static int uniphier_serial_probe(struct udevice *dev)
 
 	priv->membase = port;
 
-	priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
-				       "clock-frequency", 0);
+	root_node = ofnode_path("/");
+	clk_data = uniphier_serial_clk_data;
+	while (clk_data->compatible) {
+		if (ofnode_device_is_compatible(root_node,
+						clk_data->compatible))
+			break;
+		clk_data++;
+	}
+
+	if (WARN_ON(!clk_data->compatible))
+		return -ENOTSUPP;
+
+	priv->uartclk = clk_data->clk_rate;
 
 	tmp = readl(&port->lcr_mcr);
 	tmp &= ~LCR_MASK;
-- 
2.7.4

[U-Boot] [PATCH 5/6] ARM: dts: uniphier: sync DT with Linux 4.18-rc1

[Masahiro Yamada]

Now that the clock-frequency information has been moved to the
driver, more DT sync is possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/dts/uniphier-ld11.dtsi | 4 ----
 arch/arm/dts/uniphier-ld20.dtsi | 4 ----
 arch/arm/dts/uniphier-ld4.dtsi  | 4 ----
 arch/arm/dts/uniphier-pro4.dtsi | 6 +-----
 arch/arm/dts/uniphier-pro5.dtsi | 4 ----
 arch/arm/dts/uniphier-pxs2.dtsi | 4 ----
 arch/arm/dts/uniphier-pxs3.dtsi | 4 ----
 arch/arm/dts/uniphier-sld8.dtsi | 4 ----
 8 files changed, 1 insertion(+), 33 deletions(-)

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index e7514f0..3f9237c 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -124,7 +124,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -136,7 +135,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -148,7 +146,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -160,7 +157,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 3>;
 		};
 
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 31bc124..6ffbf18 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -230,7 +230,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -242,7 +241,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -254,7 +252,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -266,7 +263,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 3>;
 		};
 
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index 5e43a92..4545056 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -71,7 +71,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <36864000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -83,7 +82,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <36864000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -95,7 +93,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <36864000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -107,7 +104,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <36864000>;
 			resets = <&peri_rst 3>;
 		};
 
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 0004863..8185b54 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -79,7 +79,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -91,7 +90,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -103,7 +101,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -115,7 +112,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 3>;
 		};
 
@@ -429,7 +425,7 @@
 			pinctrl-0 = <&pinctrl_ether_rgmii>;
 			clock-names = "gio", "ether", "ether-gb", "ether-phy";
 			clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
-				<&sys_clk 10>;
+				 <&sys_clk 10>;
 			reset-names = "gio", "ether";
 			resets = <&sys_rst 12>, <&sys_rst 6>;
 			phy-mode = "rgmii";
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 32debf5..6aea9af 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -164,7 +164,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -176,7 +175,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -188,7 +186,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -200,7 +197,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <73728000>;
 			resets = <&peri_rst 3>;
 		};
 
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index 20f3935..f4101c0 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -172,7 +172,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <88900000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -184,7 +183,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <88900000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -196,7 +194,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <88900000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -208,7 +205,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <88900000>;
 			resets = <&peri_rst 3>;
 		};
 
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index ae867cb..cfeeecd 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -152,7 +152,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -164,7 +163,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -176,7 +174,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -188,7 +185,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <58820000>;
 			resets = <&peri_rst 3>;
 		};
 
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index 67d6977..f20926e 100644
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -71,7 +71,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
 			clocks = <&peri_clk 0>;
-			clock-frequency = <80000000>;
 			resets = <&peri_rst 0>;
 		};
 
@@ -83,7 +82,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
 			clocks = <&peri_clk 1>;
-			clock-frequency = <80000000>;
 			resets = <&peri_rst 1>;
 		};
 
@@ -95,7 +93,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
 			clocks = <&peri_clk 2>;
-			clock-frequency = <80000000>;
 			resets = <&peri_rst 2>;
 		};
 
@@ -107,7 +104,6 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
 			clocks = <&peri_clk 3>;
-			clock-frequency = <80000000>;
 			resets = <&peri_rst 3>;
 		};
 
-- 
2.7.4

[U-Boot] [PATCH 6/6] ARM: dts: uniphier: enable SD card for PXs3 reference board

[Masahiro Yamada]

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/dts/uniphier-pxs3-ref.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts
index 3b9931a..4fb12b8 100644
--- a/arch/arm/dts/uniphier-pxs3-ref.dts
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -75,6 +75,10 @@
 	status = "okay";
 };
 
+&sd {
+	status = "okay";
+};
+
 &eth0 {
 	status = "okay";
 	phy-handle = <&ethphy0>;
-- 
2.7.4

[U-Boot] [PATCH 0/6] ARM: uniphier: some more updates for v2018.07-rc2

[Masahiro Yamada]

2018-06-19 16:11 GMT+09:00 Masahiro Yamada <yamada.masahiro@socionext.com>:
> Masahiro Yamada (6):
>   ARM: uniphier: enable CONFIG_SNI_AVE and disable CONFIG_SMC911X
>   reset: uniphier: sync reset data with Linux 4.18-rc1
>   serial: uniphier: rename struct uniphier_serial_private_data
>   serial: uniphier: set clock rate without clock-frequency property
>   ARM: dts: uniphier: sync DT with Linux 4.18-rc1
>   ARM: dts: uniphier: enable SD card for PXs3 reference board


Series, applied to u-boot-uniphier.





-- 
Best Regards
Masahiro Yamada