* [Qemu-devel] [PATCH v3 1/8] target/mips: Update maintainer's email addresses
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-04 20:09 ` Philippe Mathieu-Daudé
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c Aleksandar Markovic
` (7 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Update email addresses of Aleksandar Markovic and Paul Burton in the
MAINTAINERS file. Also, add corresponding items in the .mailmap file.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
.mailmap | 7 +++++--
MAINTAINERS | 9 +++++----
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/.mailmap b/.mailmap
index 778a4d4..2c2b9b1 100644
--- a/.mailmap
+++ b/.mailmap
@@ -12,8 +12,11 @@ Fabrice Bellard <fabrice@bellard.org> bellard <bellard@c046a42c-6fe2-441c-8c8c-7
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
Jocelyn Mayer <l_indien@magic.fr> j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>
Paul Brook <paul@codesourcery.com> pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
-Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
-Paul Burton <paul.burton@mips.com> <paul@archlinuxmips.org>
+Aleksandar Markovic <amarkovic@wavecomp.com> <aleksandar.markovic@mips.com>
+Aleksandar Markovic <amarkovic@wavecomp.com> <aleksandar.markovic@imgtec.com>
+Paul Burton <pburton@wavecomp.com> <paul.burton@mips.com>
+Paul Burton <pburton@wavecomp.com> <paul.burton@imgtec.com>
+Paul Burton <pburton@wavecomp.com> <paul@archlinuxmips.org>
Thiemo Seufer <ths@networkno.de> ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
malc <av1474@comtv.ru> malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162>
diff --git a/MAINTAINERS b/MAINTAINERS
index 6630d69..f3863b1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -187,7 +187,7 @@ F: disas/microblaze.c
MIPS
M: Aurelien Jarno <aurelien@aurel32.net>
-M: Aleksandar Markovic <aleksandar.markovic@mips.com>
+M: Aleksandar Markovic <amarkovic@wavecomp.com>
S: Maintained
F: target/mips/
F: hw/mips/
@@ -718,7 +718,7 @@ S: Maintained
F: hw/mips/mips_malta.c
Mipssim
-M: Aleksandar Markovic <aleksandar.markovic@mips.com>
+M: Aleksandar Markovic <amarkovic@wavecomp.com>
S: Odd Fixes
F: hw/mips/mips_mipssim.c
F: hw/net/mipsnet.c
@@ -729,14 +729,15 @@ S: Maintained
F: hw/mips/mips_r4k.c
Fulong 2E
-M: Aleksandar Markovic <aleksandar.markovic@mips.com>
+M: Aleksandar Markovic <amarkovic@wavecomp.com>
S: Odd Fixes
F: hw/mips/mips_fulong2e.c
F: hw/isa/vt82c686.c
+
F: include/hw/isa/vt82c686.h
Boston
-M: Paul Burton <paul.burton@mips.com>
+M: Paul Burton <pburton@wavecomp.com>
S: Maintained
F: hw/core/loader-fit.c
F: hw/mips/boston.c
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 1/8] target/mips: Update maintainer's email addresses
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 1/8] target/mips: Update maintainer's email addresses Aleksandar Markovic
@ 2018-07-04 20:09 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-07-04 20:09 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
Hi Aleksandar,
It's a bit funny you sent this email from yet another company, RT-RK =)
The mips.com is dead, long live the MIPS!
On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> Update email addresses of Aleksandar Markovic and Paul Burton in the
> MAINTAINERS file. Also, add corresponding items in the .mailmap file.
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> .mailmap | 7 +++++--
> MAINTAINERS | 9 +++++----
> 2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/.mailmap b/.mailmap
> index 778a4d4..2c2b9b1 100644
> --- a/.mailmap
> +++ b/.mailmap
> @@ -12,8 +12,11 @@ Fabrice Bellard <fabrice@bellard.org> bellard <bellard@c046a42c-6fe2-441c-8c8c-7
> James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
> Jocelyn Mayer <l_indien@magic.fr> j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>
> Paul Brook <paul@codesourcery.com> pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>
> +Aleksandar Markovic <amarkovic@wavecomp.com> <aleksandar.markovic@mips.com>
> +Aleksandar Markovic <amarkovic@wavecomp.com> <aleksandar.markovic@imgtec.com>
> +Paul Burton <pburton@wavecomp.com> <paul.burton@mips.com>
> -Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
> +Paul Burton <pburton@wavecomp.com> <paul.burton@imgtec.com>
> -Paul Burton <paul.burton@mips.com> <paul@archlinuxmips.org>
> +Paul Burton <pburton@wavecomp.com> <paul@archlinuxmips.org>
reordered a bit to follow, ok.
> Thiemo Seufer <ths@networkno.de> ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
> malc <av1474@comtv.ru> malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162>
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6630d69..f3863b1 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -187,7 +187,7 @@ F: disas/microblaze.c
>
> MIPS
> M: Aurelien Jarno <aurelien@aurel32.net>
> -M: Aleksandar Markovic <aleksandar.markovic@mips.com>
> +M: Aleksandar Markovic <amarkovic@wavecomp.com>
> S: Maintained
> F: target/mips/
> F: hw/mips/
> @@ -718,7 +718,7 @@ S: Maintained
> F: hw/mips/mips_malta.c
>
> Mipssim
> -M: Aleksandar Markovic <aleksandar.markovic@mips.com>
> +M: Aleksandar Markovic <amarkovic@wavecomp.com>
> S: Odd Fixes
> F: hw/mips/mips_mipssim.c
> F: hw/net/mipsnet.c
> @@ -729,14 +729,15 @@ S: Maintained
> F: hw/mips/mips_r4k.c
>
> Fulong 2E
> -M: Aleksandar Markovic <aleksandar.markovic@mips.com>
> +M: Aleksandar Markovic <amarkovic@wavecomp.com>
> S: Odd Fixes
> F: hw/mips/mips_fulong2e.c
> F: hw/isa/vt82c686.c
> +
> F: include/hw/isa/vt82c686.h
>
> Boston
> -M: Paul Burton <paul.burton@mips.com>
> +M: Paul Burton <pburton@wavecomp.com>
> S: Maintained
> F: hw/core/loader-fit.c
> F: hw/mips/boston.c
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 1/8] target/mips: Update maintainer's email addresses Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-04 20:11 ` Philippe Mathieu-Daudé
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions Aleksandar Markovic
` (6 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Aleksandar Markovic <amarkovic@wavecomp.com>
If checkpatch.pl is applied (using switch "-f") on file
target/mips/msa_helper.c, it will hang.
This is a workaround by correcting the source file. The workaround is
found by partial deleting and undeleting of the code in msa_helper.c
in binary search fashion.
The bug (for checkpatch.pl) is already reported to the qemu-devel list.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/msa_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index c74e3cd..1691b70 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -2750,8 +2750,8 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
#define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
do { \
- uint## BITS ##_t S = _S, T = _T; \
- uint## BITS ##_t as, at, xs, xt, xd; \
+ uint## BITS ## _t S = _S, T = _T; \
+ uint## BITS ## _t as, at, xs, xt, xd; \
if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
T = S; \
} \
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c Aleksandar Markovic
@ 2018-07-04 20:11 ` Philippe Mathieu-Daudé
2018-07-05 9:59 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
0 siblings, 1 reply; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-07-04 20:11 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
Hi Aleksandar,
On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> If checkpatch.pl is applied (using switch "-f") on file
> target/mips/msa_helper.c, it will hang.
>
> This is a workaround by correcting the source file. The workaround is
> found by partial deleting and undeleting of the code in msa_helper.c
> in binary search fashion.
>
> The bug (for checkpatch.pl) is already reported to the qemu-devel list.
Paolo already sent a fix for this bug:
http://lists.nongnu.org/archive/html/qemu-devel/2018-07/msg01250.html
Can you test it?
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/msa_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index c74e3cd..1691b70 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -2750,8 +2750,8 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
>
> #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
> do { \
> - uint## BITS ##_t S = _S, T = _T; \
> - uint## BITS ##_t as, at, xs, xt, xd; \
> + uint## BITS ## _t S = _S, T = _T; \
> + uint## BITS ## _t as, at, xs, xt, xd; \
> if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
> T = S; \
> } \
>
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] ?==?utf-8?q? [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c
2018-07-04 20:11 ` Philippe Mathieu-Daudé
@ 2018-07-05 9:59 ` Aleksandar Markovic
0 siblings, 0 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-05 9:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton, qemu-devel
> Hi Aleksandar,
>
> On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> > From: Aleksandar Markovic <amarkovic@wavecomp.com>
> >
> > If checkpatch.pl is applied (using switch "-f") on file
> > target/mips/msa_helper.c, it will hang.
> >
> > This is a workaround by correcting the source file. The workaround is
> > found by partial deleting and undeleting of the code in msa_helper.c
> > in binary search fashion.
> >
> > The bug (for checkpatch.pl) is already reported to the qemu-devel list.
>
> Paolo already sent a fix for this bug:
> http://lists.nongnu.org/archive/html/qemu-devel/2018-07/msg01250.html
>
> Can you test it?
Philippe, I tested Paolo's fix and I confirm that it fixed the original issue - there is no hang.
Regards,
Aleksandar
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 1/8] target/mips: Update maintainer's email addresses Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 2/8] target/mips: Workaround for checkpatch.pl hanging on msa_helper.c Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-04 20:16 ` Philippe Mathieu-Daudé
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges Aleksandar Markovic
` (5 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Update CP0 registers Config0, Config1, and Config5 bit definitions.
Some of these bits will be utilized by upcoming nanoMIPS changes.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/cpu.h | 41 ++++++++++++++++++++++++++++-------------
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index cfe1735..edbb66d 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -388,26 +388,27 @@ struct CPUMIPSState {
target_ulong CP0_CMGCRBase;
int32_t CP0_Config0;
#define CP0C0_M 31
-#define CP0C0_K23 28
-#define CP0C0_KU 25
+#define CP0C0_K23 28 /* 30..28 */
+#define CP0C0_KU 25 /* 27..25 */
#define CP0C0_MDU 20
#define CP0C0_MM 18
#define CP0C0_BM 16
+#define CP0C0_Impl 16 /* 24..16 */
#define CP0C0_BE 15
-#define CP0C0_AT 13
-#define CP0C0_AR 10
-#define CP0C0_MT 7
+#define CP0C0_AT 13 /* 14..13 */
+#define CP0C0_AR 10 /* 12..10 */
+#define CP0C0_MT 7 /* 9..7 */
#define CP0C0_VI 3
-#define CP0C0_K0 0
+#define CP0C0_K0 0 /* 2..0 */
int32_t CP0_Config1;
#define CP0C1_M 31
-#define CP0C1_MMU 25
-#define CP0C1_IS 22
-#define CP0C1_IL 19
-#define CP0C1_IA 16
-#define CP0C1_DS 13
-#define CP0C1_DL 10
-#define CP0C1_DA 7
+#define CP0C1_MMU 25 /* 30..25 */
+#define CP0C1_IS 22 /* 24..22 */
+#define CP0C1_IL 19 /* 21..19 */
+#define CP0C1_IA 16 /* 18..16 */
+#define CP0C1_DS 13 /* 15..13 */
+#define CP0C1_DL 10 /* 12..10 */
+#define CP0C1_DA 7 /* 9..7 */
#define CP0C1_C2 6
#define CP0C1_MD 5
#define CP0C1_PC 4
@@ -468,7 +469,21 @@ struct CPUMIPSState {
#define CP0C5_CV 29
#define CP0C5_EVA 28
#define CP0C5_MSAEn 27
+#define CP0C5_PMJ2 25
+#define CP0C5_PMJ1 24
+#define CP0C5_PMJ0 23
+#define CP0C5_WR2 22
+#define CP0C5_NMS 21
+#define CP0C5_ULS 20
+#define CP0C5_XPA 19
+#define CP0C5_CRCP 18
+#define CP0C5_MI 17
+#define CP0C5_GI1 16
+#define CP0C5_GI0 15
+#define CP0C5_CA2 14
#define CP0C5_XNP 13
+#define CP0C5_DEC 11
+#define CP0C5_L2C 10
#define CP0C5_UFE 9
#define CP0C5_FRE 8
#define CP0C5_VP 7
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions Aleksandar Markovic
@ 2018-07-04 20:16 ` Philippe Mathieu-Daudé
2018-07-05 10:04 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
0 siblings, 1 reply; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-07-04 20:16 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
Hi Aleksandar,
On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> Update CP0 registers Config0, Config1, and Config5 bit definitions.
>
> Some of these bits will be utilized by upcoming nanoMIPS changes.
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/cpu.h | 41 ++++++++++++++++++++++++++++-------------
> 1 file changed, 28 insertions(+), 13 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index cfe1735..edbb66d 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -388,26 +388,27 @@ struct CPUMIPSState {
> target_ulong CP0_CMGCRBase;
> int32_t CP0_Config0;
> #define CP0C0_M 31
> -#define CP0C0_K23 28
> -#define CP0C0_KU 25
> +#define CP0C0_K23 28 /* 30..28 */
> +#define CP0C0_KU 25 /* 27..25 */
> #define CP0C0_MDU 20
> #define CP0C0_MM 18
> #define CP0C0_BM 16
> +#define CP0C0_Impl 16 /* 24..16 */
> #define CP0C0_BE 15
> -#define CP0C0_AT 13
> -#define CP0C0_AR 10
> -#define CP0C0_MT 7
> +#define CP0C0_AT 13 /* 14..13 */
> +#define CP0C0_AR 10 /* 12..10 */
> +#define CP0C0_MT 7 /* 9..7 */
> #define CP0C0_VI 3
> -#define CP0C0_K0 0
> +#define CP0C0_K0 0 /* 2..0 */
> int32_t CP0_Config1;
> #define CP0C1_M 31
> -#define CP0C1_MMU 25
> -#define CP0C1_IS 22
> -#define CP0C1_IL 19
> -#define CP0C1_IA 16
> -#define CP0C1_DS 13
> -#define CP0C1_DL 10
> -#define CP0C1_DA 7
> +#define CP0C1_MMU 25 /* 30..25 */
> +#define CP0C1_IS 22 /* 24..22 */
> +#define CP0C1_IL 19 /* 21..19 */
> +#define CP0C1_IA 16 /* 18..16 */
> +#define CP0C1_DS 13 /* 15..13 */
> +#define CP0C1_DL 10 /* 12..10 */
> +#define CP0C1_DA 7 /* 9..7 */
> #define CP0C1_C2 6
> #define CP0C1_MD 5
> #define CP0C1_PC 4
> @@ -468,7 +469,21 @@ struct CPUMIPSState {
> #define CP0C5_CV 29
> #define CP0C5_EVA 28
> #define CP0C5_MSAEn 27
> +#define CP0C5_PMJ2 25
> +#define CP0C5_PMJ1 24
> +#define CP0C5_PMJ0 23
Why not use:
#define CP0C5_PMJ 23 /* 25..23 */
> +#define CP0C5_WR2 22
> +#define CP0C5_NMS 21
> +#define CP0C5_ULS 20
> +#define CP0C5_XPA 19
> +#define CP0C5_CRCP 18
> +#define CP0C5_MI 17
> +#define CP0C5_GI1 16
> +#define CP0C5_GI0 15
Ditto:
#define CP0C5_GI 15 /* 16..15 */
> +#define CP0C5_CA2 14
> #define CP0C5_XNP 13
> +#define CP0C5_DEC 11
> +#define CP0C5_L2C 10
> #define CP0C5_UFE 9
> #define CP0C5_FRE 8
> #define CP0C5_VP 7
Regardless:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] ?==?utf-8?q? [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions
2018-07-04 20:16 ` Philippe Mathieu-Daudé
@ 2018-07-05 10:04 ` Aleksandar Markovic
0 siblings, 0 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-05 10:04 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton, qemu-devel
Hi, Philippe!
I truly appreciate your review.
> > #define CP0C5_EVA 28
> > #define CP0C5_MSAEn 27
> > +#define CP0C5_PMJ2 25
> > +#define CP0C5_PMJ1 24
> > +#define CP0C5_PMJ0 23
>
> Why not use:
>
> #define CP0C5_PMJ 23 /* 25..23 */
>
I now think that the way you suggested here is better, and will integrate it in v4.
> > +#define CP0C5_WR2 22
> > +#define CP0C5_NMS 21
> > +#define CP0C5_ULS 20
> > +#define CP0C5_XPA 19
> > +#define CP0C5_CRCP 18
> > +#define CP0C5_MI 17
> > +#define CP0C5_GI1 16
> > +#define CP0C5_GI0 15
>
> Ditto:
>
> #define CP0C5_GI 15 /* 16..15 */
>
The same.
> > +#define CP0C5_CA2 14
> > #define CP0C5_XNP 13
> > +#define CP0C5_DEC 11
Sincerely,
Aleksandar
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
` (2 preceding siblings ...)
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 3/8] target/mips: Update some CP0 registers bit definitions Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
[not found] ` <51b61976-e024-77c4-afa5-b3d55a93bfb5@amsat.org>
2018-07-05 15:49 ` Richard Henderson
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register Aleksandar Markovic
` (4 subsequent siblings)
8 siblings, 2 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Remove "range style" case statements to make code analysis easier.
This is needed also for some upcoming nanoMIPS-related refactorings.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 257 +++++++++++++++++++++++++++++++++++++++---------
1 file changed, 208 insertions(+), 49 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 20b43c0..88699ae 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5494,7 +5494,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 18:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_1e0i(mfc0_watchlo, arg, sel);
rn = "WatchLo";
break;
@@ -5504,7 +5511,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 19:
switch (sel) {
- case 0 ...7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_1e0i(mfc0_watchhi, arg, sel);
rn = "WatchHi";
break;
@@ -5630,7 +5644,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 27:
switch (sel) {
- case 0 ... 3:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
tcg_gen_movi_tl(arg, 0); /* unimplemented */
rn = "CacheErr";
break;
@@ -5701,7 +5718,12 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
rn = "DESAVE";
break;
- case 2 ... 7:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_ld_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -6167,7 +6189,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 18:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_0e1i(mtc0_watchlo, arg, sel);
rn = "WatchLo";
break;
@@ -6177,7 +6206,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 19:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_0e1i(mtc0_watchhi, arg, sel);
rn = "WatchHi";
break;
@@ -6315,7 +6351,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 27:
switch (sel) {
- case 0 ... 3:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
/* ignored */
rn = "CacheErr";
break;
@@ -6381,7 +6420,12 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
rn = "DESAVE";
break;
- case 2 ... 7:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_st_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -6842,7 +6886,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 18:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_1e0i(dmfc0_watchlo, arg, sel);
rn = "WatchLo";
break;
@@ -6852,7 +6903,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 19:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_1e0i(mfc0_watchhi, arg, sel);
rn = "WatchHi";
break;
@@ -6975,7 +7033,10 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
case 27:
switch (sel) {
/* ignored */
- case 0 ... 3:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
tcg_gen_movi_tl(arg, 0); /* unimplemented */
rn = "CacheErr";
break;
@@ -7040,7 +7101,12 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
rn = "DESAVE";
break;
- case 2 ... 7:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_ld_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -7497,7 +7563,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 18:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_0e1i(mtc0_watchlo, arg, sel);
rn = "WatchLo";
break;
@@ -7507,7 +7580,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 19:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_0e1i(mtc0_watchhi, arg, sel);
rn = "WatchHi";
break;
@@ -7641,7 +7721,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case 27:
switch (sel) {
- case 0 ... 3:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
/* ignored */
rn = "CacheErr";
break;
@@ -7707,7 +7790,12 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
rn = "DESAVE";
break;
- case 2 ... 7:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
CP0_CHECK(ctx->kscrexist & (1 << sel));
tcg_gen_st_tl(arg, cpu_env,
offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
@@ -7843,7 +7931,14 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
break;
case 16:
switch (sel) {
- case 0 ... 7:
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
gen_helper_mftc0_configx(t0, cpu_env, tcg_const_tl(sel));
break;
default:
@@ -17231,7 +17326,10 @@ static void decode_opc_special_r6(CPUMIPSState *env, DisasContext *ctx)
case OPC_LSA:
gen_lsa(ctx, op1, rd, rs, rt, extract32(ctx->opcode, 6, 2));
break;
- case OPC_MULT ... OPC_DIVU:
+ case OPC_MULT:
+ case OPC_MULTU:
+ case OPC_DIV:
+ case OPC_DIVU:
op2 = MASK_R6_MULDIV(ctx->opcode);
switch (op2) {
case R6_OPC_MUL:
@@ -17291,7 +17389,15 @@ static void decode_opc_special_r6(CPUMIPSState *env, DisasContext *ctx)
generate_exception_end(ctx, EXCP_RI);
}
break;
- case OPC_DMULT ... OPC_DDIVU:
+ case OPC_DMULT:
+ case OPC_DMULTU:
+ case OPC_DIV:
+ case OPC_DIVU:
+ case OPC_DMULT:
+ case OPC_DMULTU:
+ case OPC_DDIV:
+ case OPC_DDIVU:
+
op2 = MASK_R6_MULDIV(ctx->opcode);
switch (op2) {
case R6_OPC_DMUL:
@@ -17370,7 +17476,14 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx)
gen_muldiv(ctx, op1, 0, rs, rt);
break;
#if defined(TARGET_MIPS64)
- case OPC_DMULT ... OPC_DDIVU:
+ case OPC_DMULT:
+ case OPC_DMULTU:
+ case OPC_DIV:
+ case OPC_DIVU:
+ case OPC_DMULT:
+ case OPC_DMULTU:
+ case OPC_DDIV:
+ case OPC_DDIVU:
check_insn(ctx, ISA_MIPS3);
check_mips_64(ctx);
gen_muldiv(ctx, op1, 0, rs, rt);
@@ -17437,7 +17550,10 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
- case OPC_ADD ... OPC_SUBU:
+ case OPC_ADD:
+ case OPC_ADDU:
+ case OPC_SUB:
+ case OPC_SUBU:
gen_arith(ctx, op1, rd, rs, rt);
break;
case OPC_SLLV: /* Shifts */
@@ -17473,7 +17589,11 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
case OPC_JALR:
gen_compute_branch(ctx, op1, 4, rs, rd, sa, 4);
break;
- case OPC_TGE ... OPC_TEQ: /* Traps */
+ case OPC_TGE: /* Traps */
+ case OPC_TGEU:
+ case OPC_TLT:
+ case OPC_TLTU:
+ case OPC_TEQ:
case OPC_TNE:
check_insn(ctx, ISA_MIPS2);
gen_trap(ctx, op1, rs, rt, -1);
@@ -17549,7 +17669,10 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
- case OPC_DADD ... OPC_DSUBU:
+ case OPC_DADD:
+ case OPC_DADDU:
+ case OPC_DSUB:
+ case OPC_DSUBU:
check_insn(ctx, ISA_MIPS3);
check_mips_64(ctx);
gen_arith(ctx, op1, rd, rs, rt);
@@ -17607,8 +17730,10 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
op1 = MASK_SPECIAL2(ctx->opcode);
switch (op1) {
- case OPC_MADD ... OPC_MADDU: /* Multiply and add/sub */
- case OPC_MSUB ... OPC_MSUBU:
+ case OPC_MADD: /* Multiply and add/sub */
+ case OPC_MADDU:
+ case OPC_MSUB:
+ case OPC_MSUBU:
check_insn(ctx, ISA_MIPS32);
gen_muldiv(ctx, op1, rd & 3, rs, rt);
break;
@@ -17705,7 +17830,8 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
}
op2 = MASK_BSHFL(ctx->opcode);
switch (op2) {
- case OPC_ALIGN ... OPC_ALIGN_END:
+ case OPC_ALIGN:
+ case OPC_ALIGN_END:
gen_align(ctx, OPC_ALIGN, rd, rs, rt, sa & 3);
break;
case OPC_BITSWAP:
@@ -17730,7 +17856,8 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
}
op2 = MASK_DBSHFL(ctx->opcode);
switch (op2) {
- case OPC_DALIGN ... OPC_DALIGN_END:
+ case OPC_DALIGN:
+ case OPC_DALIGN_END:
gen_align(ctx, OPC_DALIGN, rd, rs, rt, sa & 7);
break;
case OPC_DBITSWAP:
@@ -17759,9 +17886,12 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
op1 = MASK_SPECIAL3(ctx->opcode);
switch (op1) {
- case OPC_DIV_G_2E ... OPC_DIVU_G_2E:
- case OPC_MOD_G_2E ... OPC_MODU_G_2E:
- case OPC_MULT_G_2E ... OPC_MULTU_G_2E:
+ case OPC_DIV_G_2E:
+ case OPC_DIVU_G_2E:
+ case OPC_MOD_G_2E:
+ case OPC_MODU_G_2E:
+ case OPC_MULT_G_2E:
+ case OPC_MULTU_G_2E:
/* OPC_MULT_G_2E, OPC_ADDUH_QB_DSP, OPC_MUL_PH_DSP have
* the same mask and op1. */
if ((ctx->insn_flags & ASE_DSPR2) && (op1 == OPC_MULT_G_2E)) {
@@ -18025,9 +18155,12 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
}
break;
#if defined(TARGET_MIPS64)
- case OPC_DDIV_G_2E ... OPC_DDIVU_G_2E:
- case OPC_DMULT_G_2E ... OPC_DMULTU_G_2E:
- case OPC_DMOD_G_2E ... OPC_DMODU_G_2E:
+ case OPC_DDIV_G_2E:
+ case OPC_DDIVU_G_2E:
+ case OPC_DMULT_G_2E:
+ case OPC_DMULTU_G_2E:
+ case OPC_DMOD_G_2E:
+ case OPC_DMODU_G_2E:
check_insn(ctx, INSN_LOONGSON2E);
gen_loongson_integer(ctx, op1, rd, rs, rt);
break;
@@ -18289,18 +18422,25 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
*/
if (ctx->eva) {
switch (op1) {
- case OPC_LWLE ... OPC_LWRE:
+ case OPC_LWLE:
+ case OPC_LWRE:
check_insn_opc_removed(ctx, ISA_MIPS32R6);
/* fall through */
- case OPC_LBUE ... OPC_LHUE:
- case OPC_LBE ... OPC_LWE:
+ case OPC_LBUE:
+ case OPC_LHUE:
+ case OPC_LBE:
+ case OPC_LHE:
+ case OPC_LLE:
+ case OPC_LWE:
check_cp0_enabled(ctx);
gen_ld(ctx, op1, rt, rs, imm);
return;
- case OPC_SWLE ... OPC_SWRE:
+ case OPC_SWLE:
+ case OPC_SWRE:
check_insn_opc_removed(ctx, ISA_MIPS32R6);
/* fall through */
- case OPC_SBE ... OPC_SHE:
+ case OPC_SBE:
+ case OPC_SHE:
case OPC_SWE:
check_cp0_enabled(ctx);
gen_st(ctx, op1, rt, rs, imm);
@@ -18332,7 +18472,8 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
case OPC_BSHFL:
op2 = MASK_BSHFL(ctx->opcode);
switch (op2) {
- case OPC_ALIGN ... OPC_ALIGN_END:
+ case OPC_ALIGN:
+ case OPC_ALIGN_END:
case OPC_BITSWAP:
check_insn(ctx, ISA_MIPS32R6);
decode_opc_special3_r6(env, ctx);
@@ -18344,8 +18485,12 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
}
break;
#if defined(TARGET_MIPS64)
- case OPC_DEXTM ... OPC_DEXT:
- case OPC_DINSM ... OPC_DINS:
+ case OPC_DEXTM:
+ case OPC_DEXTU:
+ case OPC_DEXT:
+ case OPC_DINSM:
+ case OPC_DINSU:
+ case OPC_DINS:
check_insn(ctx, ISA_MIPS64R2);
check_mips_64(ctx);
gen_bitops(ctx, op1, rt, rs, sa, rd);
@@ -18353,7 +18498,8 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
case OPC_DBSHFL:
op2 = MASK_DBSHFL(ctx->opcode);
switch (op2) {
- case OPC_DALIGN ... OPC_DALIGN_END:
+ case OPC_DALIGN:
+ case OPC_DALIGN_END:
case OPC_DBITSWAP:
check_insn(ctx, ISA_MIPS32R6);
decode_opc_special3_r6(env, ctx);
@@ -19584,7 +19730,12 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2, 4);
}
break;
- case OPC_TGEI ... OPC_TEQI: /* REGIMM traps */
+ case OPC_TGEI: /* REGIMM traps */
+ case OPC_TGEIU:
+ case OPC_TLTI:
+ case OPC_TLTIU:
+ case OPC_TEQI:
+
case OPC_TNEI:
check_insn(ctx, ISA_MIPS2);
check_insn_opc_removed(ctx, ISA_MIPS32R6);
@@ -19759,7 +19910,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
case OPC_XORI:
gen_logic_imm(ctx, op, rt, rs, imm);
break;
- case OPC_J ... OPC_JAL: /* Jump */
+ case OPC_J: /* Jump */
+ case OPC_JAL: /* Jump */
offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
gen_compute_branch(ctx, op, 4, rs, rt, offset, 4);
break;
@@ -19826,15 +19978,20 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
case OPC_LWR:
check_insn_opc_removed(ctx, ISA_MIPS32R6);
/* Fallthrough */
- case OPC_LB ... OPC_LH:
- case OPC_LW ... OPC_LHU:
+ case OPC_LB:
+ case OPC_LH:
+ case OPC_LW:
+ case OPC_LWPC:
+ case OPC_LBU:
+ case OPC_LHU:
gen_ld(ctx, op, rt, rs, imm);
break;
case OPC_SWL:
case OPC_SWR:
check_insn_opc_removed(ctx, ISA_MIPS32R6);
/* fall through */
- case OPC_SB ... OPC_SH:
+ case OPC_SB:
+ case OPC_SH:
case OPC_SW:
gen_st(ctx, op, rt, rs, imm);
break;
@@ -20105,7 +20262,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
#if defined(TARGET_MIPS64)
/* MIPS64 opcodes */
- case OPC_LDL ... OPC_LDR:
+ case OPC_LDL:
+ case OPC_LDR:
case OPC_LLD:
check_insn_opc_removed(ctx, ISA_MIPS32R6);
/* fall through */
@@ -20115,7 +20273,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
check_mips_64(ctx);
gen_ld(ctx, op, rt, rs, imm);
break;
- case OPC_SDL ... OPC_SDR:
+ case OPC_SDL:
+ case OPC_SDR:
check_insn_opc_removed(ctx, ISA_MIPS32R6);
/* fall through */
case OPC_SD:
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread[parent not found: <51b61976-e024-77c4-afa5-b3d55a93bfb5@amsat.org>]
* Re: [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges
[not found] ` <51b61976-e024-77c4-afa5-b3d55a93bfb5@amsat.org>
@ 2018-07-05 15:23 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-07-05 15:23 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: aurelien, amarkovic, smarkovic, pjovanovic, pburton
On 07/04/2018 05:28 PM, Philippe Mathieu-Daudé wrote:
> On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
>> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>>
>> Remove "range style" case statements to make code analysis easier.
> Why not...
>
>>
>> This is needed also for some upcoming nanoMIPS-related refactorings.
>>
>> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
>> ---
>> target/mips/translate.c | 257 +++++++++++++++++++++++++++++++++++++++---------
>> 1 file changed, 208 insertions(+), 49 deletions(-)
>>
>> diff --git a/target/mips/translate.c b/target/mips/translate.c
>> index 20b43c0..88699ae 100644
>> --- a/target/mips/translate.c
>> +++ b/target/mips/translate.c
>> @@ -5494,7 +5494,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 18:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_1e0i(mfc0_watchlo, arg, sel);
>> rn = "WatchLo";
>> break;
>> @@ -5504,7 +5511,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 19:
>> switch (sel) {
>> - case 0 ...7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_1e0i(mfc0_watchhi, arg, sel);
>> rn = "WatchHi";
>> break;
>> @@ -5630,7 +5644,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 27:
>> switch (sel) {
>> - case 0 ... 3:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> tcg_gen_movi_tl(arg, 0); /* unimplemented */
>> rn = "CacheErr";
>> break;
>> @@ -5701,7 +5718,12 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
>> rn = "DESAVE";
>> break;
>> - case 2 ... 7:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> CP0_CHECK(ctx->kscrexist & (1 << sel));
>> tcg_gen_ld_tl(arg, cpu_env,
>> offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
>> @@ -6167,7 +6189,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 18:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_0e1i(mtc0_watchlo, arg, sel);
>> rn = "WatchLo";
>> break;
>> @@ -6177,7 +6206,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 19:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_0e1i(mtc0_watchhi, arg, sel);
>> rn = "WatchHi";
>> break;
>> @@ -6315,7 +6351,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 27:
>> switch (sel) {
>> - case 0 ... 3:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> /* ignored */
>> rn = "CacheErr";
>> break;
>> @@ -6381,7 +6420,12 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
>> rn = "DESAVE";
>> break;
>> - case 2 ... 7:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> CP0_CHECK(ctx->kscrexist & (1 << sel));
>> tcg_gen_st_tl(arg, cpu_env,
>> offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
>> @@ -6842,7 +6886,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 18:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_1e0i(dmfc0_watchlo, arg, sel);
>> rn = "WatchLo";
>> break;
>> @@ -6852,7 +6903,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 19:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_1e0i(mfc0_watchhi, arg, sel);
>> rn = "WatchHi";
>> break;
>> @@ -6975,7 +7033,10 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> case 27:
>> switch (sel) {
>> /* ignored */
>> - case 0 ... 3:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> tcg_gen_movi_tl(arg, 0); /* unimplemented */
>> rn = "CacheErr";
>> break;
>> @@ -7040,7 +7101,12 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
>> rn = "DESAVE";
>> break;
>> - case 2 ... 7:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> CP0_CHECK(ctx->kscrexist & (1 << sel));
>> tcg_gen_ld_tl(arg, cpu_env,
>> offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
>> @@ -7497,7 +7563,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 18:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_0e1i(mtc0_watchlo, arg, sel);
>> rn = "WatchLo";
>> break;
>> @@ -7507,7 +7580,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 19:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_0e1i(mtc0_watchhi, arg, sel);
>> rn = "WatchHi";
>> break;
>> @@ -7641,7 +7721,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> break;
>> case 27:
>> switch (sel) {
>> - case 0 ... 3:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> /* ignored */
>> rn = "CacheErr";
>> break;
>> @@ -7707,7 +7790,12 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>> gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
>> rn = "DESAVE";
>> break;
>> - case 2 ... 7:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> CP0_CHECK(ctx->kscrexist & (1 << sel));
>> tcg_gen_st_tl(arg, cpu_env,
>> offsetof(CPUMIPSState, CP0_KScratch[sel-2]));
>> @@ -7843,7 +7931,14 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
>> break;
>> case 16:
>> switch (sel) {
>> - case 0 ... 7:
>> + case 0:
>> + case 1:
>> + case 2:
>> + case 3:
>> + case 4:
>> + case 5:
>> + case 6:
>> + case 7:
>> gen_helper_mftc0_configx(t0, cpu_env, tcg_const_tl(sel));
>> break;
>> default:
>> @@ -17231,7 +17326,10 @@ static void decode_opc_special_r6(CPUMIPSState *env, DisasContext *ctx)
>> case OPC_LSA:
>> gen_lsa(ctx, op1, rd, rs, rt, extract32(ctx->opcode, 6, 2));
>> break;
>> - case OPC_MULT ... OPC_DIVU:
>> + case OPC_MULT:
>> + case OPC_MULTU:
>> + case OPC_DIV:
>> + case OPC_DIVU:
>> op2 = MASK_R6_MULDIV(ctx->opcode);
>> switch (op2) {
>> case R6_OPC_MUL:
>> @@ -17291,7 +17389,15 @@ static void decode_opc_special_r6(CPUMIPSState *env, DisasContext *ctx)
>> generate_exception_end(ctx, EXCP_RI);
>> }
>> break;
>> - case OPC_DMULT ... OPC_DDIVU:
>> + case OPC_DMULT:
>> + case OPC_DMULTU:
Watch out here this part <...
>> + case OPC_DIV:
>> + case OPC_DIVU:
>> + case OPC_DMULT:
>> + case OPC_DMULTU:
...> looks like a failed copy/pasting.
Simply remove it in your v4.
>> + case OPC_DDIV:
>> + case OPC_DDIVU:
>
>> +
>
> extra line?
>
>> op2 = MASK_R6_MULDIV(ctx->opcode);
>> switch (op2) {
>> case R6_OPC_DMUL:
>> @@ -17370,7 +17476,14 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx)
>> gen_muldiv(ctx, op1, 0, rs, rt);
>> break;
>> #if defined(TARGET_MIPS64)
>> - case OPC_DMULT ... OPC_DDIVU:
>> + case OPC_DMULT:
>> + case OPC_DMULTU:
<...
>> + case OPC_DIV:
>> + case OPC_DIVU:
>> + case OPC_DMULT:
>> + case OPC_DMULTU:
...> Ditto.
>> + case OPC_DDIV:
>> + case OPC_DDIVU:
>> check_insn(ctx, ISA_MIPS3);
>> check_mips_64(ctx);
>> gen_muldiv(ctx, op1, 0, rs, rt);
>> @@ -17437,7 +17550,10 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
>> break;
>> }
>> break;
>> - case OPC_ADD ... OPC_SUBU:
>> + case OPC_ADD:
>> + case OPC_ADDU:
>> + case OPC_SUB:
>> + case OPC_SUBU:
>> gen_arith(ctx, op1, rd, rs, rt);
>> break;
>> case OPC_SLLV: /* Shifts */
>> @@ -17473,7 +17589,11 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
>> case OPC_JALR:
>> gen_compute_branch(ctx, op1, 4, rs, rd, sa, 4);
>> break;
>> - case OPC_TGE ... OPC_TEQ: /* Traps */
>> + case OPC_TGE: /* Traps */
>> + case OPC_TGEU:
>> + case OPC_TLT:
>> + case OPC_TLTU:
>> + case OPC_TEQ:
>> case OPC_TNE:
>> check_insn(ctx, ISA_MIPS2);
>> gen_trap(ctx, op1, rs, rt, -1);
>> @@ -17549,7 +17669,10 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
>> break;
>> }
>> break;
>> - case OPC_DADD ... OPC_DSUBU:
>> + case OPC_DADD:
>> + case OPC_DADDU:
>> + case OPC_DSUB:
>> + case OPC_DSUBU:
>> check_insn(ctx, ISA_MIPS3);
>> check_mips_64(ctx);
>> gen_arith(ctx, op1, rd, rs, rt);
>> @@ -17607,8 +17730,10 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
>>
>> op1 = MASK_SPECIAL2(ctx->opcode);
>> switch (op1) {
>> - case OPC_MADD ... OPC_MADDU: /* Multiply and add/sub */
>> - case OPC_MSUB ... OPC_MSUBU:
>> + case OPC_MADD: /* Multiply and add/sub */
>
> Now the comment would be /* Multiply and add */
>
>> + case OPC_MADDU:
>> + case OPC_MSUB:
>
> and here /* Multiply and sub */.
>
>> + case OPC_MSUBU:
>> check_insn(ctx, ISA_MIPS32);
>> gen_muldiv(ctx, op1, rd & 3, rs, rt);
>> break;
>> @@ -17705,7 +17830,8 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
>> }
>> op2 = MASK_BSHFL(ctx->opcode);
>> switch (op2) {
>> - case OPC_ALIGN ... OPC_ALIGN_END:
>> + case OPC_ALIGN:
>> + case OPC_ALIGN_END:
>> gen_align(ctx, OPC_ALIGN, rd, rs, rt, sa & 3);
>> break;
>> case OPC_BITSWAP:
>> @@ -17730,7 +17856,8 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
>> }
>> op2 = MASK_DBSHFL(ctx->opcode);
>> switch (op2) {
>> - case OPC_DALIGN ... OPC_DALIGN_END:
>> + case OPC_DALIGN:
>> + case OPC_DALIGN_END:
>> gen_align(ctx, OPC_DALIGN, rd, rs, rt, sa & 7);
>> break;
>> case OPC_DBITSWAP:
>> @@ -17759,9 +17886,12 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
>>
>> op1 = MASK_SPECIAL3(ctx->opcode);
>> switch (op1) {
>> - case OPC_DIV_G_2E ... OPC_DIVU_G_2E:
>> - case OPC_MOD_G_2E ... OPC_MODU_G_2E:
>> - case OPC_MULT_G_2E ... OPC_MULTU_G_2E:
>> + case OPC_DIV_G_2E:
>> + case OPC_DIVU_G_2E:
>> + case OPC_MOD_G_2E:
>> + case OPC_MODU_G_2E:
>> + case OPC_MULT_G_2E:
>> + case OPC_MULTU_G_2E:
>> /* OPC_MULT_G_2E, OPC_ADDUH_QB_DSP, OPC_MUL_PH_DSP have
>> * the same mask and op1. */
>> if ((ctx->insn_flags & ASE_DSPR2) && (op1 == OPC_MULT_G_2E)) {
>> @@ -18025,9 +18155,12 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
>> }
>> break;
>> #if defined(TARGET_MIPS64)
>> - case OPC_DDIV_G_2E ... OPC_DDIVU_G_2E:
>> - case OPC_DMULT_G_2E ... OPC_DMULTU_G_2E:
>> - case OPC_DMOD_G_2E ... OPC_DMODU_G_2E:
>> + case OPC_DDIV_G_2E:
>> + case OPC_DDIVU_G_2E:
>> + case OPC_DMULT_G_2E:
>> + case OPC_DMULTU_G_2E:
>> + case OPC_DMOD_G_2E:
>> + case OPC_DMODU_G_2E:
>> check_insn(ctx, INSN_LOONGSON2E);
>> gen_loongson_integer(ctx, op1, rd, rs, rt);
>> break;
>> @@ -18289,18 +18422,25 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
>> */
>> if (ctx->eva) {
>> switch (op1) {
>> - case OPC_LWLE ... OPC_LWRE:
>> + case OPC_LWLE:
>> + case OPC_LWRE:
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> /* fall through */
>> - case OPC_LBUE ... OPC_LHUE:
>> - case OPC_LBE ... OPC_LWE:
>> + case OPC_LBUE:
>> + case OPC_LHUE:
>> + case OPC_LBE:
>> + case OPC_LHE:
>> + case OPC_LLE:
>> + case OPC_LWE:
>> check_cp0_enabled(ctx);
>> gen_ld(ctx, op1, rt, rs, imm);
>> return;
>> - case OPC_SWLE ... OPC_SWRE:
>> + case OPC_SWLE:
>> + case OPC_SWRE:
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> /* fall through */
>> - case OPC_SBE ... OPC_SHE:
>> + case OPC_SBE:
>> + case OPC_SHE:
>> case OPC_SWE:
>> check_cp0_enabled(ctx);
>> gen_st(ctx, op1, rt, rs, imm);
>> @@ -18332,7 +18472,8 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
>> case OPC_BSHFL:
>> op2 = MASK_BSHFL(ctx->opcode);
>> switch (op2) {
>> - case OPC_ALIGN ... OPC_ALIGN_END:
>> + case OPC_ALIGN:
>> + case OPC_ALIGN_END:
>> case OPC_BITSWAP:
>> check_insn(ctx, ISA_MIPS32R6);
>> decode_opc_special3_r6(env, ctx);
>> @@ -18344,8 +18485,12 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
>> }
>> break;
>> #if defined(TARGET_MIPS64)
>> - case OPC_DEXTM ... OPC_DEXT:
>> - case OPC_DINSM ... OPC_DINS:
>> + case OPC_DEXTM:
>> + case OPC_DEXTU:
>> + case OPC_DEXT:
>> + case OPC_DINSM:
>> + case OPC_DINSU:
>> + case OPC_DINS:
>> check_insn(ctx, ISA_MIPS64R2);
>> check_mips_64(ctx);
>> gen_bitops(ctx, op1, rt, rs, sa, rd);
>> @@ -18353,7 +18498,8 @@ static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
>> case OPC_DBSHFL:
>> op2 = MASK_DBSHFL(ctx->opcode);
>> switch (op2) {
>> - case OPC_DALIGN ... OPC_DALIGN_END:
>> + case OPC_DALIGN:
>> + case OPC_DALIGN_END:
>> case OPC_DBITSWAP:
>> check_insn(ctx, ISA_MIPS32R6);
>> decode_opc_special3_r6(env, ctx);
>> @@ -19584,7 +19730,12 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
>> gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2, 4);
>> }
>> break;
>> - case OPC_TGEI ... OPC_TEQI: /* REGIMM traps */
>> + case OPC_TGEI: /* REGIMM traps */
>> + case OPC_TGEIU:
>> + case OPC_TLTI:
>> + case OPC_TLTIU:
>> + case OPC_TEQI:
>> +
>> case OPC_TNEI:
>> check_insn(ctx, ISA_MIPS2);
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> @@ -19759,7 +19910,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
>> case OPC_XORI:
>> gen_logic_imm(ctx, op, rt, rs, imm);
>> break;
>> - case OPC_J ... OPC_JAL: /* Jump */
>> + case OPC_J: /* Jump */
>
> OK
>
>> + case OPC_JAL: /* Jump */
>
> Maybe we can drop this comment, instead of using /* Jump And Link */.
>
>> offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
>> gen_compute_branch(ctx, op, 4, rs, rt, offset, 4);
>> break;
>> @@ -19826,15 +19978,20 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
>> case OPC_LWR:
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> /* Fallthrough */
>> - case OPC_LB ... OPC_LH:
>> - case OPC_LW ... OPC_LHU:
>> + case OPC_LB:
>> + case OPC_LH:
>> + case OPC_LW:
>> + case OPC_LWPC:
>> + case OPC_LBU:
>> + case OPC_LHU:
>> gen_ld(ctx, op, rt, rs, imm);
>> break;
>> case OPC_SWL:
>> case OPC_SWR:
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> /* fall through */
>> - case OPC_SB ... OPC_SH:
>> + case OPC_SB:
>> + case OPC_SH:
>> case OPC_SW:
>> gen_st(ctx, op, rt, rs, imm);
>> break;
>> @@ -20105,7 +20262,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
>>
>> #if defined(TARGET_MIPS64)
>> /* MIPS64 opcodes */
>> - case OPC_LDL ... OPC_LDR:
>> + case OPC_LDL:
>> + case OPC_LDR:
>> case OPC_LLD:
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> /* fall through */
>> @@ -20115,7 +20273,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
>> check_mips_64(ctx);
>> gen_ld(ctx, op, rt, rs, imm);
>> break;
>> - case OPC_SDL ... OPC_SDR:
>> + case OPC_SDL:
>> + case OPC_SDR:
>> check_insn_opc_removed(ctx, ISA_MIPS32R6);
>> /* fall through */
>> case OPC_SD:
>>
>
> With comments cleanup:
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges Aleksandar Markovic
[not found] ` <51b61976-e024-77c4-afa5-b3d55a93bfb5@amsat.org>
@ 2018-07-05 15:49 ` Richard Henderson
2018-07-06 9:04 ` Aleksandar Markovic
1 sibling, 1 reply; 26+ messages in thread
From: Richard Henderson @ 2018-07-05 15:49 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: pburton, smarkovic, philippe.mathieu.daude, amarkovic,
pjovanovic, aurelien
On 07/04/2018 12:30 PM, Aleksandar Markovic wrote:
> case 18:
> switch (sel) {
> - case 0 ... 7:
> + case 0:
> + case 1:
> + case 2:
> + case 3:
> + case 4:
> + case 5:
> + case 6:
> + case 7:
I don't see the point in this. It is clear what 0 ... 7 means.
> - case OPC_MULT ... OPC_DIVU:
> + case OPC_MULT:
> + case OPC_MULTU:
> + case OPC_DIV:
> + case OPC_DIVU:
These on the other hand are a good cleanup, because there's no obvious
relationship between the beginning and end of the range.
r~
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges
2018-07-05 15:49 ` Richard Henderson
@ 2018-07-06 9:04 ` Aleksandar Markovic
0 siblings, 0 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-06 9:04 UTC (permalink / raw)
To: Richard Henderson, Aleksandar Markovic, qemu-devel
Cc: Paul Burton, Stefan Markovic, philippe.mathieu.daude,
Petar Jovanovic, aurelien
> > case 18:
> > switch (sel) {
> > - case 0 ... 7:
> > + case 0:
> > + case 1:
> > + case 2:
> > + case 3:
> > + case 4:
> > + case 5:
> > + case 6:
> > + case 7:
>
> I don't see the point in this. It is clear what 0 ... 7 means.
The point is to avoid using ranges altogether, regardless of the clarity of a particular instance.
Let me further explain the reason: Consider this: Let's say we plan to replace 0, 1, 2, 3, 4, 5, 6, 7 with some preprocessor constants, appropriate for the particular context. If we keep "0 ... 7" notation, that line will look like "case ABC_KLM ... ABC_RST:" and will suddenly become much less clear.
As a mattter of fact, there is a plan to switch from hardcoded numbers to preprocessor constants in this instance, but it is a low priority task.
Regards,
Aleksandar
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
` (3 preceding siblings ...)
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 4/8] target/mips: Avoid case statements formulated by ranges Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-04 20:31 ` Philippe Mathieu-Daudé
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 6/8] target/mips: Amend CP0 WatchHi register implementation Aleksandar Markovic
` (3 subsequent siblings)
8 siblings, 1 reply; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Stefan Markovic <smarkovic@wavecomp.com>
Add CP0 BadInstrX register. This register will be used in nanoMIPS.
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/cpu.h | 1 +
target/mips/machine.c | 5 +++--
target/mips/translate.c | 20 +++++++++++++++++++-
3 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index edbb66d..8ccbc21 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -323,6 +323,7 @@ struct CPUMIPSState {
target_ulong CP0_BadVAddr;
uint32_t CP0_BadInstr;
uint32_t CP0_BadInstrP;
+ uint32_t CP0_BadInstrX;
int32_t CP0_Count;
target_ulong CP0_EntryHi;
#define CP0EnHi_EHINV 10
diff --git a/target/mips/machine.c b/target/mips/machine.c
index 20100d5..5ba78ac 100644
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -212,8 +212,8 @@ const VMStateDescription vmstate_tlb = {
const VMStateDescription vmstate_mips_cpu = {
.name = "cpu",
- .version_id = 10,
- .minimum_version_id = 10,
+ .version_id = 11,
+ .minimum_version_id = 11,
.post_load = cpu_post_load,
.fields = (VMStateField[]) {
/* Active TC */
@@ -266,6 +266,7 @@ const VMStateDescription vmstate_mips_cpu = {
VMSTATE_UINTTL(env.CP0_BadVAddr, MIPSCPU),
VMSTATE_UINT32(env.CP0_BadInstr, MIPSCPU),
VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU),
+ VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
VMSTATE_INT32(env.CP0_Count, MIPSCPU),
VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
VMSTATE_INT32(env.CP0_Compare, MIPSCPU),
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 88699ae..0562851 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5315,7 +5315,12 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
rn = "BadInstrP";
break;
- default:
+ case 3:
+ CP0_CHECK(ctx->bi);
+ gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
+ rn = "BadInstrX";
+ break;
+ default:
goto cp0_unimplemented;
}
break;
@@ -6006,6 +6011,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
/* ignored */
rn = "BadInstrP";
break;
+ case 3:
+ /* ignored */
+ rn = "BadInstrX";
+ break;
default:
goto cp0_unimplemented;
}
@@ -6711,6 +6720,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
rn = "BadInstrP";
break;
+ case 3:
+ CP0_CHECK(ctx->bi);
+ gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
+ rn = "BadInstrX";
+ break;
default:
goto cp0_unimplemented;
}
@@ -7385,6 +7399,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
/* ignored */
rn = "BadInstrP";
break;
+ case 3:
+ /* ignored */
+ rn = "BadInstrX";
+ break;
default:
goto cp0_unimplemented;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register Aleksandar Markovic
@ 2018-07-04 20:31 ` Philippe Mathieu-Daudé
2018-07-05 10:08 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
2018-07-05 13:27 ` [Qemu-devel] " Stefan Markovic
0 siblings, 2 replies; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-07-04 20:31 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel, Richard Henderson
Cc: aurelien, amarkovic, smarkovic, pjovanovic, pburton
Hi Aleksandar,
On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> From: Stefan Markovic <smarkovic@wavecomp.com>
>
> Add CP0 BadInstrX register. This register will be used in nanoMIPS.
>
> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/cpu.h | 1 +
> target/mips/machine.c | 5 +++--
> target/mips/translate.c | 20 +++++++++++++++++++-
> 3 files changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index edbb66d..8ccbc21 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -323,6 +323,7 @@ struct CPUMIPSState {
> target_ulong CP0_BadVAddr;
> uint32_t CP0_BadInstr;
> uint32_t CP0_BadInstrP;
> + uint32_t CP0_BadInstrX;
> int32_t CP0_Count;
> target_ulong CP0_EntryHi;
> #define CP0EnHi_EHINV 10
> diff --git a/target/mips/machine.c b/target/mips/machine.c
> index 20100d5..5ba78ac 100644
> --- a/target/mips/machine.c
> +++ b/target/mips/machine.c
> @@ -212,8 +212,8 @@ const VMStateDescription vmstate_tlb = {
>
> const VMStateDescription vmstate_mips_cpu = {
> .name = "cpu",
> - .version_id = 10,
> - .minimum_version_id = 10,
> + .version_id = 11,
> + .minimum_version_id = 11,
> .post_load = cpu_post_load,
> .fields = (VMStateField[]) {
> /* Active TC */
> @@ -266,6 +266,7 @@ const VMStateDescription vmstate_mips_cpu = {
> VMSTATE_UINTTL(env.CP0_BadVAddr, MIPSCPU),
> VMSTATE_UINT32(env.CP0_BadInstr, MIPSCPU),
> VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU),
> + VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
> VMSTATE_INT32(env.CP0_Count, MIPSCPU),
> VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
> VMSTATE_INT32(env.CP0_Compare, MIPSCPU),
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 88699ae..0562851 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -5315,7 +5315,12 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
> rn = "BadInstrP";
> break;
> - default:
> + case 3:
> + CP0_CHECK(ctx->bi);
> + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
> + rn = "BadInstrX";
> + break;
> + default:
> goto cp0_unimplemented;
> }
> break;
> @@ -6006,6 +6011,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> /* ignored */
> rn = "BadInstrP";
> break;
> + case 3:
> + /* ignored */
> + rn = "BadInstrX";
> + break;
> default:
> goto cp0_unimplemented;
> }
> @@ -6711,6 +6720,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
> rn = "BadInstrP";
> break;
> + case 3:
> + CP0_CHECK(ctx->bi);
> + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
I'm unsure re-using gen_mfc0_load32() is enough, shouldn't we zero the
16 lower bits?
> + rn = "BadInstrX";
> + break;
> default:
> goto cp0_unimplemented;
> }
> @@ -7385,6 +7399,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> /* ignored */
> rn = "BadInstrP";
> break;
> + case 3:
> + /* ignored */
> + rn = "BadInstrX";
> + break;
> default:
> goto cp0_unimplemented;
> }
>
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] ?==?utf-8?q? [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register
2018-07-04 20:31 ` Philippe Mathieu-Daudé
@ 2018-07-05 10:08 ` Aleksandar Markovic
2018-07-05 13:27 ` [Qemu-devel] " Stefan Markovic
1 sibling, 0 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-05 10:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Richard Henderson, aurelien, amarkovic, smarkovic, pjovanovic,
pburton, qemu-devel
Hi, Philippe!
> > @@ -6711,6 +6720,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> > gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
> > rn = "BadInstrP";
> > break;
> > + case 3:
> > + CP0_CHECK(ctx->bi);
> > + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
>
> I'm unsure re-using gen_mfc0_load32() is enough, shouldn't we zero the
> 16 lower bits?
I contacted Stefan, and he says that you are right - zeroing 16 lower bits seems to be necessary. We'll hopefully fix this in v4.
Yours,
Aleksandar
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register
2018-07-04 20:31 ` Philippe Mathieu-Daudé
2018-07-05 10:08 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
@ 2018-07-05 13:27 ` Stefan Markovic
[not found] ` <6bed7e02-a3d3-ea93-7291-96799d4d2a83@amsat.org>
1 sibling, 1 reply; 26+ messages in thread
From: Stefan Markovic @ 2018-07-05 13:27 UTC (permalink / raw)
To: Philippe Mathieu-Daudé,
Aleksandar Markovic, qemu-devel, Richard Henderson
Cc: aurelien, Aleksandar Markovic, Petar Jovanovic, Paul Burton
Hi Philippe,
Following fix will be added in v4:
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 79a59fd..98ff8d0 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -5354,6 +5354,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
case 3:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
+ tcg_gen_andi_i32(arg, arg, 0xffff0000);
rn = "BadInstrX";
break;
default:
@@ -6719,6 +6720,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
case 3:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
+ tcg_gen_andi_i32(arg, arg, 0xffff0000);
rn = "BadInstrX";
break;
default:
Regards,
Stefan
________________________________
From: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> on behalf of Philippe Mathieu-Daudé <f4bug@amsat.org>
Sent: Wednesday, July 4, 2018 10:31:27 PM
To: Aleksandar Markovic; qemu-devel@nongnu.org; Richard Henderson
Cc: aurelien@aurel32.net; Aleksandar Markovic; Stefan Markovic; Petar Jovanovic; Paul Burton
Subject: Re: [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register
Hi Aleksandar,
On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> From: Stefan Markovic <smarkovic@wavecomp.com>
>
> Add CP0 BadInstrX register. This register will be used in nanoMIPS.
>
> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/cpu.h | 1 +
> target/mips/machine.c | 5 +++--
> target/mips/translate.c | 20 +++++++++++++++++++-
> 3 files changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index edbb66d..8ccbc21 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -323,6 +323,7 @@ struct CPUMIPSState {
> target_ulong CP0_BadVAddr;
> uint32_t CP0_BadInstr;
> uint32_t CP0_BadInstrP;
> + uint32_t CP0_BadInstrX;
> int32_t CP0_Count;
> target_ulong CP0_EntryHi;
> #define CP0EnHi_EHINV 10
> diff --git a/target/mips/machine.c b/target/mips/machine.c
> index 20100d5..5ba78ac 100644
> --- a/target/mips/machine.c
> +++ b/target/mips/machine.c
> @@ -212,8 +212,8 @@ const VMStateDescription vmstate_tlb = {
>
> const VMStateDescription vmstate_mips_cpu = {
> .name = "cpu",
> - .version_id = 10,
> - .minimum_version_id = 10,
> + .version_id = 11,
> + .minimum_version_id = 11,
> .post_load = cpu_post_load,
> .fields = (VMStateField[]) {
> /* Active TC */
> @@ -266,6 +266,7 @@ const VMStateDescription vmstate_mips_cpu = {
> VMSTATE_UINTTL(env.CP0_BadVAddr, MIPSCPU),
> VMSTATE_UINT32(env.CP0_BadInstr, MIPSCPU),
> VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU),
> + VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
> VMSTATE_INT32(env.CP0_Count, MIPSCPU),
> VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
> VMSTATE_INT32(env.CP0_Compare, MIPSCPU),
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 88699ae..0562851 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -5315,7 +5315,12 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
> rn = "BadInstrP";
> break;
> - default:
> + case 3:
> + CP0_CHECK(ctx->bi);
> + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
> + rn = "BadInstrX";
> + break;
> + default:
> goto cp0_unimplemented;
> }
> break;
> @@ -6006,6 +6011,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> /* ignored */
> rn = "BadInstrP";
> break;
> + case 3:
> + /* ignored */
> + rn = "BadInstrX";
> + break;
> default:
> goto cp0_unimplemented;
> }
> @@ -6711,6 +6720,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
> rn = "BadInstrP";
> break;
> + case 3:
> + CP0_CHECK(ctx->bi);
> + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
I'm unsure re-using gen_mfc0_load32() is enough, shouldn't we zero the
16 lower bits?
> + rn = "BadInstrX";
> + break;
> default:
> goto cp0_unimplemented;
> }
> @@ -7385,6 +7399,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> /* ignored */
> rn = "BadInstrP";
> break;
> + case 3:
> + /* ignored */
> + rn = "BadInstrX";
> + break;
> default:
> goto cp0_unimplemented;
> }
>
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v3 6/8] target/mips: Amend CP0 WatchHi register implementation
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
` (4 preceding siblings ...)
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 5/8] target/mips: Add CP0 BadInstrX register Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 7/8] target/mips: Don't update BadVAddr register in Debug Mode Aleksandar Markovic
` (2 subsequent siblings)
8 siblings, 0 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Yongbok Kim <yongbok.kim@mips.com>
WatchHi is extended by the field MemoryMapID with the GINVT instruction.
The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/
DMFC0 in 64-bit architectures.
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/cpu.h | 2 +-
target/mips/helper.h | 3 +++
target/mips/machine.c | 6 +++---
target/mips/op_helper.c | 23 +++++++++++++++++++++--
target/mips/translate.c | 28 +++++++++++++++++++++++++++-
5 files changed, 55 insertions(+), 7 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 8ccbc21..3253b7d 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -506,7 +506,7 @@ struct CPUMIPSState {
uint64_t CP0_LLAddr_rw_bitmask;
int CP0_LLAddr_shift;
target_ulong CP0_WatchLo[8];
- int32_t CP0_WatchHi[8];
+ uint64_t CP0_WatchHi[8];
#define CP0WH_ASID 16
target_ulong CP0_XContext;
int32_t CP0_Framemask;
diff --git a/target/mips/helper.h b/target/mips/helper.h
index 5f49234..151441a 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -74,6 +74,7 @@ DEF_HELPER_1(mfc0_maar, tl, env)
DEF_HELPER_1(mfhc0_maar, tl, env)
DEF_HELPER_2(mfc0_watchlo, tl, env, i32)
DEF_HELPER_2(mfc0_watchhi, tl, env, i32)
+DEF_HELPER_2(mfhc0_watchhi, tl, env, i32)
DEF_HELPER_1(mfc0_debug, tl, env)
DEF_HELPER_1(mftc0_debug, tl, env)
#ifdef TARGET_MIPS64
@@ -85,6 +86,7 @@ DEF_HELPER_1(dmfc0_tcschefback, tl, env)
DEF_HELPER_1(dmfc0_lladdr, tl, env)
DEF_HELPER_1(dmfc0_maar, tl, env)
DEF_HELPER_2(dmfc0_watchlo, tl, env, i32)
+DEF_HELPER_2(dmfc0_watchhi, tl, env, i32)
#endif /* TARGET_MIPS64 */
DEF_HELPER_2(mtc0_index, void, env, tl)
@@ -148,6 +150,7 @@ DEF_HELPER_2(mthc0_maar, void, env, tl)
DEF_HELPER_2(mtc0_maari, void, env, tl)
DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32)
DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32)
+DEF_HELPER_3(mthc0_watchhi, void, env, tl, i32)
DEF_HELPER_2(mtc0_xcontext, void, env, tl)
DEF_HELPER_2(mtc0_framemask, void, env, tl)
DEF_HELPER_2(mtc0_debug, void, env, tl)
diff --git a/target/mips/machine.c b/target/mips/machine.c
index 5ba78ac..5e9c559 100644
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -212,8 +212,8 @@ const VMStateDescription vmstate_tlb = {
const VMStateDescription vmstate_mips_cpu = {
.name = "cpu",
- .version_id = 11,
- .minimum_version_id = 11,
+ .version_id = 12,
+ .minimum_version_id = 12,
.post_load = cpu_post_load,
.fields = (VMStateField[]) {
/* Active TC */
@@ -288,7 +288,7 @@ const VMStateDescription vmstate_mips_cpu = {
VMSTATE_INT32(env.CP0_MAARI, MIPSCPU),
VMSTATE_UINT64(env.lladdr, MIPSCPU),
VMSTATE_UINTTL_ARRAY(env.CP0_WatchLo, MIPSCPU, 8),
- VMSTATE_INT32_ARRAY(env.CP0_WatchHi, MIPSCPU, 8),
+ VMSTATE_UINT64_ARRAY(env.CP0_WatchHi, MIPSCPU, 8),
VMSTATE_UINTTL(env.CP0_XContext, MIPSCPU),
VMSTATE_INT32(env.CP0_Framemask, MIPSCPU),
VMSTATE_INT32(env.CP0_Debug, MIPSCPU),
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 41d3634..0b8ec7d 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -893,7 +893,12 @@ target_ulong helper_mfc0_watchlo(CPUMIPSState *env, uint32_t sel)
target_ulong helper_mfc0_watchhi(CPUMIPSState *env, uint32_t sel)
{
- return env->CP0_WatchHi[sel];
+ return (int32_t) env->CP0_WatchHi[sel];
+}
+
+target_ulong helper_mfhc0_watchhi(CPUMIPSState *env, uint32_t sel)
+{
+ return env->CP0_WatchHi[sel] >> 32;
}
target_ulong helper_mfc0_debug(CPUMIPSState *env)
@@ -961,6 +966,11 @@ target_ulong helper_dmfc0_watchlo(CPUMIPSState *env, uint32_t sel)
{
return env->CP0_WatchLo[sel];
}
+
+target_ulong helper_dmfc0_watchhi(CPUMIPSState *env, uint32_t sel)
+{
+ return env->CP0_WatchHi[sel];
+}
#endif /* TARGET_MIPS64 */
void helper_mtc0_index(CPUMIPSState *env, target_ulong arg1)
@@ -1662,11 +1672,20 @@ void helper_mtc0_watchlo(CPUMIPSState *env, target_ulong arg1, uint32_t sel)
void helper_mtc0_watchhi(CPUMIPSState *env, target_ulong arg1, uint32_t sel)
{
- int mask = 0x40000FF8 | (env->CP0_EntryHi_ASID_mask << CP0WH_ASID);
+ uint64_t mask = 0x40000FF8 | (env->CP0_EntryHi_ASID_mask << CP0WH_ASID);
+ if ((env->CP0_Config5 >> CP0C5_MI) & 1) {
+ mask |= 0xFFFFFFFF00000000ULL; /* MMID */
+ }
env->CP0_WatchHi[sel] = arg1 & mask;
env->CP0_WatchHi[sel] &= ~(env->CP0_WatchHi[sel] & arg1 & 0x7);
}
+void helper_mthc0_watchhi(CPUMIPSState *env, target_ulong arg1, uint32_t sel)
+{
+ env->CP0_WatchHi[sel] = ((uint64_t) (arg1) << 32) |
+ (env->CP0_WatchHi[sel] & 0x00000000ffffffffULL);
+}
+
void helper_mtc0_xcontext(CPUMIPSState *env, target_ulong arg1)
{
target_ulong mask = (1ULL << (env->SEGBITS - 7)) - 1;
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 0562851..fa1da7e 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1458,6 +1458,7 @@ typedef struct DisasContext {
bool mrp;
bool nan2008;
bool abs2008;
+ bool mi;
} DisasContext;
#define DISAS_STOP DISAS_TARGET_0
@@ -4923,6 +4924,18 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
goto cp0_unimplemented;
}
break;
+ case 19:
+ switch (sel) {
+ case 0 ...7:
+ /* upper 32 bits are only available when Config5MI != 0 */
+ CP0_CHECK(ctx->mi);
+ gen_mfhc0_load64(arg, offsetof(CPUMIPSState, CP0_WatchHi[sel]), 0);
+ rn = "WatchHi";
+ break;
+ default:
+ goto cp0_unimplemented;
+ }
+ break;
case 28:
switch (sel) {
case 0:
@@ -4995,6 +5008,18 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
goto cp0_unimplemented;
}
break;
+ case 19:
+ switch (sel) {
+ case 0 ...7:
+ /* upper 32 bits are only available when Config5MI != 0 */
+ CP0_CHECK(ctx->mi);
+ gen_helper_0e1i(mthc0_watchhi, arg, sel);
+ rn = "WatchHi";
+ break;
+ default:
+ goto cp0_unimplemented;
+ }
+ break;
case 28:
switch (sel) {
case 0:
@@ -6925,7 +6950,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
case 5:
case 6:
case 7:
- gen_helper_1e0i(mfc0_watchhi, arg, sel);
+ gen_helper_1e0i(dmfc0_watchhi, arg, sel);
rn = "WatchHi";
break;
default:
@@ -20401,6 +20426,7 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
ctx->mrp = (env->CP0_Config5 >> CP0C5_MRP) & 1;
ctx->nan2008 = (env->active_fpu.fcr31 >> FCR31_NAN2008) & 1;
ctx->abs2008 = (env->active_fpu.fcr31 >> FCR31_ABS2008) & 1;
+ ctx->mi = (env->CP0_Config5 >> CP0C5_MI) & 1;
restore_cpu_state(env, ctx);
#ifdef CONFIG_USER_ONLY
ctx->mem_idx = MIPS_HFLAG_UM;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v3 7/8] target/mips: Don't update BadVAddr register in Debug Mode
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
` (5 preceding siblings ...)
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 6/8] target/mips: Amend CP0 WatchHi register implementation Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-04 20:34 ` Philippe Mathieu-Daudé
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 Aleksandar Markovic
2018-07-04 22:51 ` [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements no-reply
8 siblings, 1 reply; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Yongbok Kim <yongbok.kim@mips.com>
BadVAddr should not be updated if (env->hflags & MIPS_HFLAG_DM) is
set.
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
---
target/mips/helper.c | 4 +++-
target/mips/op_helper.c | 12 +++++++++---
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/mips/helper.c b/target/mips/helper.c
index 8cf91ce..e215af9 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -502,7 +502,9 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
break;
}
/* Raise exception */
- env->CP0_BadVAddr = address;
+ if (!(env->hflags & MIPS_HFLAG_DM)) {
+ env->CP0_BadVAddr = address;
+ }
env->CP0_Context = (env->CP0_Context & ~0x007fffff) |
((address >> 9) & 0x007ffff0);
env->CP0_EntryHi = (env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask) |
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 0b8ec7d..a6a57bd 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -271,7 +271,9 @@ static inline hwaddr do_translate_address(CPUMIPSState *env,
target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \
{ \
if (arg & almask) { \
- env->CP0_BadVAddr = arg; \
+ if (!(env->hflags & MIPS_HFLAG_DM)) { \
+ env->CP0_BadVAddr = arg; \
+ } \
do_raise_exception(env, EXCP_AdEL, GETPC()); \
} \
env->lladdr = do_translate_address(env, arg, 0, GETPC()); \
@@ -291,7 +293,9 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg1, \
target_long tmp; \
\
if (arg2 & almask) { \
- env->CP0_BadVAddr = arg2; \
+ if (!(env->hflags & MIPS_HFLAG_DM)) { \
+ env->CP0_BadVAddr = arg2; \
+ } \
do_raise_exception(env, EXCP_AdES, GETPC()); \
} \
if (do_translate_address(env, arg2, 1, GETPC()) == env->lladdr) { \
@@ -2456,7 +2460,9 @@ void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
int error_code = 0;
int excp;
- env->CP0_BadVAddr = addr;
+ if (!(env->hflags & MIPS_HFLAG_DM)) {
+ env->CP0_BadVAddr = addr;
+ }
if (access_type == MMU_DATA_STORE) {
excp = EXCP_AdES;
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 7/8] target/mips: Don't update BadVAddr register in Debug Mode
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 7/8] target/mips: Don't update BadVAddr register in Debug Mode Aleksandar Markovic
@ 2018-07-04 20:34 ` Philippe Mathieu-Daudé
2018-07-05 10:12 ` [Qemu-devel] ?==?utf-8?q? " Aleksandar Markovic
0 siblings, 1 reply; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-07-04 20:34 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: aurelien, amarkovic, smarkovic, pjovanovic, pburton
Hi Aleksandar,
On 07/04/2018 04:30 PM, Aleksandar Markovic wrote:
> From: Yongbok Kim <yongbok.kim@mips.com>
>
> BadVAddr should not be updated if (env->hflags & MIPS_HFLAG_DM) is
> set.
>
> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Watch out in
http://lists.nongnu.org/archive/html/qemu-devel/2018-06/msg06407.html I
used another email:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> target/mips/helper.c | 4 +++-
> target/mips/op_helper.c | 12 +++++++++---
> 2 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/target/mips/helper.c b/target/mips/helper.c
> index 8cf91ce..e215af9 100644
> --- a/target/mips/helper.c
> +++ b/target/mips/helper.c
> @@ -502,7 +502,9 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
> break;
> }
> /* Raise exception */
> - env->CP0_BadVAddr = address;
> + if (!(env->hflags & MIPS_HFLAG_DM)) {
> + env->CP0_BadVAddr = address;
> + }
> env->CP0_Context = (env->CP0_Context & ~0x007fffff) |
> ((address >> 9) & 0x007ffff0);
> env->CP0_EntryHi = (env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask) |
> diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
> index 0b8ec7d..a6a57bd 100644
> --- a/target/mips/op_helper.c
> +++ b/target/mips/op_helper.c
> @@ -271,7 +271,9 @@ static inline hwaddr do_translate_address(CPUMIPSState *env,
> target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \
> { \
> if (arg & almask) { \
> - env->CP0_BadVAddr = arg; \
> + if (!(env->hflags & MIPS_HFLAG_DM)) { \
> + env->CP0_BadVAddr = arg; \
> + } \
> do_raise_exception(env, EXCP_AdEL, GETPC()); \
> } \
> env->lladdr = do_translate_address(env, arg, 0, GETPC()); \
> @@ -291,7 +293,9 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg1, \
> target_long tmp; \
> \
> if (arg2 & almask) { \
> - env->CP0_BadVAddr = arg2; \
> + if (!(env->hflags & MIPS_HFLAG_DM)) { \
> + env->CP0_BadVAddr = arg2; \
> + } \
> do_raise_exception(env, EXCP_AdES, GETPC()); \
> } \
> if (do_translate_address(env, arg2, 1, GETPC()) == env->lladdr) { \
> @@ -2456,7 +2460,9 @@ void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
> int error_code = 0;
> int excp;
>
> - env->CP0_BadVAddr = addr;
> + if (!(env->hflags & MIPS_HFLAG_DM)) {
> + env->CP0_BadVAddr = addr;
> + }
>
> if (access_type == MMU_DATA_STORE) {
> excp = EXCP_AdES;
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v3 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
` (6 preceding siblings ...)
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 7/8] target/mips: Don't update BadVAddr register in Debug Mode Aleksandar Markovic
@ 2018-07-04 19:30 ` Aleksandar Markovic
2018-07-06 15:46 ` Aleksandar Markovic
2018-07-04 22:51 ` [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements no-reply
8 siblings, 1 reply; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-04 19:30 UTC (permalink / raw)
To: qemu-devel
Cc: philippe.mathieu.daude, aurelien, amarkovic, smarkovic,
pjovanovic, pburton
From: Yongbok Kim <yongbok.kim@mips.com>
MFHC0 and MTHC0 used to handle EntryLo0 and EntryLo1 registers only,
and placing ELPA flag checks befor switch statement were technically
correct. However, after adding handling more registers, these checks
should be moved to act only in cases of handling EntryLo0 and
EntryLo1.
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index fa1da7e..c01cafe 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -4885,12 +4885,11 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
{
const char *rn = "invalid";
- CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
-
switch (reg) {
case 2:
switch (sel) {
case 0:
+ CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo0));
rn = "EntryLo0";
break;
@@ -4901,6 +4900,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
case 3:
switch (sel) {
case 0:
+ CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
rn = "EntryLo1";
break;
@@ -4965,12 +4965,11 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
const char *rn = "invalid";
uint64_t mask = ctx->PAMask >> 36;
- CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
-
switch (reg) {
case 2:
switch (sel) {
case 0:
+ CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
tcg_gen_andi_tl(arg, arg, mask);
gen_mthc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo0));
rn = "EntryLo0";
@@ -4982,6 +4981,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
case 3:
switch (sel) {
case 0:
+ CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
tcg_gen_andi_tl(arg, arg, mask);
gen_mthc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
rn = "EntryLo1";
--
2.7.4
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v3 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 Aleksandar Markovic
@ 2018-07-06 15:46 ` Aleksandar Markovic
0 siblings, 0 replies; 26+ messages in thread
From: Aleksandar Markovic @ 2018-07-06 15:46 UTC (permalink / raw)
To: Aleksandar Markovic, qemu-devel
Cc: philippe.mathieu.daude, aurelien, Stefan Markovic,
Petar Jovanovic, Paul Burton
> From: Yongbok Kim <yongbok.kim@mips.com>
>
> MFHC0 and MTHC0 used to handle EntryLo0 and EntryLo1 registers only,
> and placing ELPA flag checks befor switch statement were technically
> correct. However, after adding handling more registers, these checks
> should be moved to act only in cases of handling EntryLo0 and
> EntryLo1.
>
> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/translate.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
(ctx->hflags & MIPS_HFLAG_ELPA) is set to be a flag that depends on both
LPA and ELPA. This does not seem to me the best way to do this - I would rather have separate bits for this and similar occasions. It would be easier to check the code against the documentation - and that is more imortant IMHO than having spent extra bit, or having slightly more to check in tha tcode. But, this is ooutside of the scope of this patch. The outcome of the patch seems to be in accirdance with the documentation. So:
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index fa1da7e..c01cafe 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -4885,12 +4885,11 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int > reg, int sel)
> {
> const char *rn = "invalid";
>
> - CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
> -
> switch (reg) {
> case 2:
> switch (sel) {
> case 0:
> + CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
> gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo0));
> rn = "EntryLo0";
> break;
> @@ -4901,6 +4900,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, > int sel)
> case 3:
> switch (sel) {
> case 0:
> + CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
> gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
> rn = "EntryLo1";
> break;
> @@ -4965,12 +4965,11 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int > reg, int sel)
> const char *rn = "invalid";
> uint64_t mask = ctx->PAMask >> 36;
>
> - CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
> -
> switch (reg) {
> case 2:
> switch (sel) {
> case 0:
> + CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
> tcg_gen_andi_tl(arg, arg, mask);
> gen_mthc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo0));
> rn = "EntryLo0";
> @@ -4982,6 +4981,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, > int sel)
> case 3:
> switch (sel) {
> case 0:
> + CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
> tcg_gen_andi_tl(arg, arg, mask);
> gen_mthc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1));
> rn = "EntryLo1";
> --
> 2.7.4
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements
2018-07-04 19:30 [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements Aleksandar Markovic
` (7 preceding siblings ...)
2018-07-04 19:30 ` [Qemu-devel] [PATCH v3 8/8] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 Aleksandar Markovic
@ 2018-07-04 22:51 ` no-reply
8 siblings, 0 replies; 26+ messages in thread
From: no-reply @ 2018-07-04 22:51 UTC (permalink / raw)
To: aleksandar.markovic
Cc: famz, qemu-devel, pburton, smarkovic, philippe.mathieu.daude,
amarkovic, pjovanovic, aurelien
Hi,
This series failed build test on s390x host. Please find the details below.
Type: series
Message-id: 1530732637-28606-1-git-send-email-aleksandar.markovic@rt-rk.com
Subject: [Qemu-devel] [PATCH v3 0/8] target/mips: Maintenance and misc fixes and improvements
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo "=== ENV ==="
env
echo "=== PACKAGES ==="
rpm -qa
echo "=== TEST BEGIN ==="
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=$PWD/build
echo -n "Using CC: "
realpath $CC
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
# XXX: we need reliable clean up
# make check -j4 V=1
make install
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20180704183855.18304-1-laurent@vivier.eu -> patchew/20180704183855.18304-1-laurent@vivier.eu
Switched to a new branch 'test'
a7711827a8 target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0
1449ba787a target/mips: Don't update BadVAddr register in Debug Mode
0d74472892 target/mips: Amend CP0 WatchHi register implementation
be54cc67a3 target/mips: Add CP0 BadInstrX register
14fea8801c target/mips: Avoid case statements formulated by ranges
68ca3a371b target/mips: Update some CP0 registers bit definitions
2380c60dfb target/mips: Workaround for checkpatch.pl hanging on msa_helper.c
ed29cae716 target/mips: Update maintainer's email addresses
=== OUTPUT BEGIN ===
=== ENV ===
LANG=en_US.UTF-8
XDG_SESSION_ID=261134
USER=fam
PWD=/var/tmp/patchew-tester-tmp-uz7tgcdy/src
HOME=/home/fam
SHELL=/bin/sh
SHLVL=2
PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug
LOGNAME=fam
DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus
XDG_RUNTIME_DIR=/run/user/1012
PATH=/usr/bin:/bin
_=/usr/bin/env
=== PACKAGES ===
gpg-pubkey-873529b8-54e386ff
glibc-debuginfo-common-2.24-10.fc25.s390x
fedora-release-26-1.noarch
dejavu-sans-mono-fonts-2.35-4.fc26.noarch
xemacs-filesystem-21.5.34-22.20170124hgf412e9f093d4.fc26.noarch
bash-4.4.12-7.fc26.s390x
libSM-1.2.2-5.fc26.s390x
libmpc-1.0.2-6.fc26.s390x
libaio-0.3.110-7.fc26.s390x
libverto-0.2.6-7.fc26.s390x
perl-Scalar-List-Utils-1.48-1.fc26.s390x
iptables-libs-1.6.1-2.fc26.s390x
tcl-8.6.6-2.fc26.s390x
libxshmfence-1.2-4.fc26.s390x
expect-5.45-23.fc26.s390x
perl-Thread-Queue-3.12-1.fc26.noarch
perl-encoding-2.19-6.fc26.s390x
keyutils-1.5.10-1.fc26.s390x
gmp-devel-6.1.2-4.fc26.s390x
enchant-1.6.0-16.fc26.s390x
python-gobject-base-3.24.1-1.fc26.s390x
python3-enchant-1.6.10-1.fc26.noarch
python-lockfile-0.11.0-6.fc26.noarch
python2-pyparsing-2.1.10-3.fc26.noarch
python2-lxml-4.1.1-1.fc26.s390x
librados2-10.2.7-2.fc26.s390x
trousers-lib-0.3.13-7.fc26.s390x
libdatrie-0.2.9-4.fc26.s390x
libsoup-2.58.2-1.fc26.s390x
passwd-0.79-9.fc26.s390x
bind99-libs-9.9.10-3.P3.fc26.s390x
python3-rpm-4.13.0.2-1.fc26.s390x
systemd-233-7.fc26.s390x
virglrenderer-0.6.0-1.20170210git76b3da97b.fc26.s390x
s390utils-ziomon-1.36.1-3.fc26.s390x
s390utils-osasnmpd-1.36.1-3.fc26.s390x
libXrandr-1.5.1-2.fc26.s390x
libglvnd-glx-1.0.0-1.fc26.s390x
texlive-ifxetex-svn19685.0.5-33.fc26.2.noarch
texlive-psnfss-svn33946.9.2a-33.fc26.2.noarch
texlive-dvipdfmx-def-svn40328-33.fc26.2.noarch
texlive-natbib-svn20668.8.31b-33.fc26.2.noarch
texlive-xdvi-bin-svn40750-33.20160520.fc26.2.s390x
texlive-cm-svn32865.0-33.fc26.2.noarch
texlive-beton-svn15878.0-33.fc26.2.noarch
texlive-fpl-svn15878.1.002-33.fc26.2.noarch
texlive-mflogo-svn38628-33.fc26.2.noarch
texlive-texlive-docindex-svn41430-33.fc26.2.noarch
texlive-luaotfload-bin-svn34647.0-33.20160520.fc26.2.noarch
texlive-koma-script-svn41508-33.fc26.2.noarch
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mesa-libglapi-17.2.4-2.fc26.s390x
perl-Unicode-Normalize-1.25-366.fc26.s390x
perl-IO-Socket-IP-0.39-1.fc26.noarch
hunspell-en-US-0.20140811.1-6.fc26.noarch
libxcb-1.12-3.fc26.s390x
perl-Pod-Escapes-1.07-366.fc26.noarch
perl-Pod-Usage-1.69-2.fc26.noarch
libtheora-1.1.1-15.fc26.s390x
tcp_wrappers-7.6-85.fc26.s390x
coreutils-8.27-7.fc26.s390x
libmount-2.30.2-1.fc26.s390x
python2-iniparse-0.4-24.fc26.noarch
python2-decorator-4.0.11-2.fc26.noarch
ModemManager-glib-1.6.10-1.fc26.s390x
python3-decorator-4.0.11-2.fc26.noarch
python3-cffi-1.9.1-2.fc26.s390x
python-bugzilla-cli-2.1.0-1.fc26.noarch
python2-funcsigs-1.0.2-5.fc26.noarch
python2-babel-2.3.4-5.fc26.noarch
python-bugzilla-2.1.0-1.fc26.noarch
libradosstriper1-10.2.7-2.fc26.s390x
snappy-1.1.4-3.fc26.s390x
libmpcdec-1.2.6-17.fc26.s390x
rpm-libs-4.13.0.2-1.fc26.s390x
python-urlgrabber-3.10.1-11.fc26.noarch
sysfsutils-2.1.0-20.fc26.s390x
python3-hawkey-0.11.1-1.fc26.s390x
iputils-20161105-5.fc26.s390x
plymouth-scripts-0.9.3-0.7.20160620git0e65b86c.fc26.s390x
cronie-1.5.1-5.fc26.s390x
libini_config-1.3.1-34.fc26.s390x
libX11-1.6.5-2.fc26.s390x
libglvnd-egl-1.0.0-1.fc26.s390x
texlive-kpathsea-svn41139-33.fc26.2.noarch
texlive-thumbpdf-bin-svn6898.0-33.20160520.fc26.2.noarch
texlive-subfig-svn15878.1.3-33.fc26.2.noarch
texlive-gsftopk-bin-svn40473-33.20160520.fc26.2.s390x
texlive-tex-ini-files-svn40533-33.fc26.2.noarch
texlive-qstest-svn15878.0-33.fc26.2.noarch
texlive-palatino-svn31835.0-33.fc26.2.noarch
texlive-ec-svn25033.1.0-33.fc26.2.noarch
texlive-iftex-svn29654.0.2-33.fc26.2.noarch
texlive-pslatex-svn16416.0-33.fc26.2.noarch
texlive-algorithms-svn38085.0.1-33.fc26.2.noarch
texlive-filehook-svn24280.0.5d-33.fc26.2.noarch
texlive-pst-node-svn40743-33.fc26.2.noarch
texlive-rotating-svn16832.2.16b-33.fc26.2.noarch
texlive-seminar-svn34011.1.62-33.fc26.2.noarch
libuuid-devel-2.30.2-1.fc26.s390x
libXinerama-devel-1.1.3-7.fc26.s390x
emacs-common-25.3-3.fc26.s390x
fedora-packager-0.6.0.1-2.fc26.noarch
snappy-devel-1.1.4-3.fc26.s390x
authconfig-7.0.1-2.fc26.s390x
newt-python3-0.52.20-1.fc26.s390x
python-decoratortools-1.8-13.fc26.noarch
python-systemd-doc-234-1.fc26.s390x
openssl-libs-1.1.0g-1.fc26.s390x
lsof-4.89-5.fc26.s390x
glibc-all-langpacks-2.25-13.fc26.s390x
audit-libs-2.8.2-1.fc26.s390x
gcc-7.3.1-2.fc26.s390x
pcre2-utf16-10.23-13.fc26.s390x
kernel-core-4.15.4-200.fc26.s390x
dracut-config-rescue-046-8.git20180105.fc26.s390x
webkitgtk4-plugin-process-gtk2-2.18.6-1.fc26.s390x
perl-Time-HiRes-1.9753-1.fc26.s390x
haveged-1.9.1-6.fc26.s390x
p11-kit-0.23.10-1.fc26.s390x
boost-system-1.63.0-11.fc26.s390x
glusterfs-fuse-3.10.11-1.fc26.s390x
vim-common-8.0.1553-1.fc26.s390x
systemtap-devel-3.2-7.fc26.s390x
perl-SelfLoader-1.23-396.fc26.noarch
nss-tools-3.36.0-1.0.fc26.s390x
libwebp-0.6.1-8.fc26.s390x
python3-configargparse-0.12.0-1.fc26.noarch
gpg-pubkey-a0a7badb-52844296
gpg-pubkey-e372e838-56fd7943
gpg-pubkey-3b921d09-57a87096
google-roboto-slab-fonts-1.100263-0.5.20150923git.fc26.noarch
libreport-filesystem-2.9.1-3.fc26.s390x
libcom_err-1.43.4-2.fc26.s390x
libffi-3.1-12.fc26.s390x
keyutils-libs-1.5.10-1.fc26.s390x
diffutils-3.5-3.fc26.s390x
apr-util-1.5.4-6.fc26.s390x
bluez-libs-5.46-6.fc26.s390x
libksba-1.3.5-3.fc26.s390x
ncurses-6.0-8.20170212.fc26.s390x
libteam-1.27-1.fc26.s390x
perl-Fedora-VSP-0.001-5.fc26.noarch
libusb-0.1.5-8.fc26.s390x
acl-2.2.52-15.fc26.s390x
dwz-0.12-3.fc26.s390x
libblkid-2.30.2-1.fc26.s390x
polkit-libs-0.113-8.fc26.s390x
dbus-python-1.2.4-6.fc26.s390x
gts-0.7.6-30.20121130.fc26.s390x
libfdisk-2.30.2-1.fc26.s390x
python3-pycparser-2.14-10.fc26.noarch
python3-bugzilla-2.1.0-1.fc26.noarch
python2-docutils-0.13.1-4.fc26.noarch
python2-requests-2.13.0-1.fc26.noarch
libcephfs-devel-10.2.7-2.fc26.s390x
ncurses-c++-libs-6.0-8.20170212.fc26.s390x
GeoIP-1.6.11-1.fc26.s390x
liblockfile-1.09-5.fc26.s390x
rpm-plugin-selinux-4.13.0.2-1.fc26.s390x
libsysfs-2.1.0-20.fc26.s390x
libdnf-0.11.1-1.fc26.s390x
mesa-libgbm-17.2.4-2.fc26.s390x
lvm2-libs-2.02.168-6.fc26.s390x
libXfixes-5.0.3-2.fc26.s390x
brlapi-0.6.6-5.fc26.s390x
texlive-metafont-svn40793-33.fc26.2.noarch
texlive-graphics-cfg-svn40269-33.fc26.2.noarch
texlive-mptopdf-svn41282-33.fc26.2.noarch
texlive-makeindex-bin-svn40473-33.20160520.fc26.2.s390x
texlive-texlive-scripts-bin-svn29741.0-33.20160520.fc26.2.noarch
texlive-sauerj-svn15878.0-33.fc26.2.noarch
texlive-txfonts-svn15878.0-33.fc26.2.noarch
texlive-filecontents-svn24250.1.3-33.fc26.2.noarch
texlive-lualibs-svn40370-33.fc26.2.noarch
texlive-section-svn20180.0-33.fc26.2.noarch
texlive-ucharcat-svn38907-33.fc26.2.noarch
texlive-hyperref-svn41396-33.fc26.2.noarch
texlive-pst-3d-svn17257.1.10-33.fc26.2.noarch
texlive-oberdiek-svn41346-33.fc26.2.noarch
texlive-ae-svn15878.1.4-33.fc26.2.noarch
texlive-collection-basic-svn41149-33.20160520.fc26.2.noarch
gnat-srpm-macros-4-2.fc26.noarch
glib2-devel-2.52.3-2.fc26.s390x
netpbm-progs-10.80.00-2.fc26.s390x
libXxf86vm-devel-1.1.4-4.fc26.s390x
nettle-devel-3.3-2.fc26.s390x
cairo-gobject-devel-1.14.10-1.fc26.s390x
fedora-rpm-macros-26-2.fc26.noarch
libidn-devel-1.33-2.fc26.s390x
s390utils-1.36.1-3.fc26.s390x
libtool-2.4.6-17.fc26.s390x
python3-cssselect-0.9.2-4.fc26.noarch
python2-cssselect-0.9.2-4.fc26.noarch
bison-3.0.4-6.fc26.s390x
rootfiles-8.1-20.fc26.noarch
python3-urllib3-1.20-2.fc26.noarch
libgcc-7.3.1-2.fc26.s390x
python3-distro-1.2.0-1.fc26.noarch
libnfsidmap-2.2.1-4.rc2.fc26.s390x
kernel-4.15.4-200.fc26.s390x
glibc-static-2.25-13.fc26.s390x
xapian-core-libs-1.4.5-1.fc26.s390x
elfutils-libelf-0.170-4.fc26.s390x
nss-3.36.0-1.0.fc26.s390x
nss-softokn-freebl-devel-3.36.0-1.0.fc26.s390x
koji-1.15.0-4.fc26.noarch
perl-Git-2.13.6-3.fc26.noarch
elfutils-default-yama-scope-0.170-4.fc26.noarch
selinux-policy-targeted-3.13.1-260.20.fc26.noarch
curl-7.53.1-16.fc26.s390x
publicsuffix-list-dafsa-20180223-1.fc26.noarch
python3-funcsigs-1.0.2-5.fc26.noarch
=== TEST BEGIN ===
Using CC: /home/fam/bin/cc
Install prefix /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install
BIOS directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/share/qemu
firmware path /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/share/qemu-firmware
binary directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/bin
library directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/lib
module directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/lib/qemu
libexec directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/libexec
include directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/include
config directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/etc
local state directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/var
Manual directory /var/tmp/patchew-tester-tmp-uz7tgcdy/src/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /var/tmp/patchew-tester-tmp-uz7tgcdy/src
GIT binary git
GIT submodules ui/keycodemapdb capstone
C compiler /home/fam/bin/cc
Host C compiler cc
C++ compiler c++
Objective-C compiler /home/fam/bin/cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wexpansion-to-defined -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I$(SRC_PATH)/capstone/include
LDFLAGS -Wl,--warn-common -m64 -g
QEMU_LDFLAGS
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU s390x
host big endian yes
target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu hppa-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu riscv32-softmmu riscv64-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64_be-linux-user aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user riscv32-linux-user riscv64-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user xtensaeb-linux-user xtensa-linux-user
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
SDL support yes (2.0.7)
GTK support yes (3.22.21)
GTK GL support yes
VTE support yes (0.48.4)
TLS priority NORMAL
GNUTLS support yes
GNUTLS rnd yes
libgcrypt no
libgcrypt kdf no
nettle yes (3.3)
nettle kdf yes
libtasn1 yes
curses support yes
virgl support yes (0.6.0)
curl support yes
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support yes
Multipath support no
VNC support yes
VNC SASL support yes
VNC JPEG support yes
VNC PNG support yes
xen support no
brlapi support yes
bluez support yes
Documentation yes
PIE no
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
HVF support no
WHPX support no
TCG support yes
TCG debug enabled no
TCG interpreter no
malloc trim support yes
RDMA support no
fdt support system
membarrier no
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
posix_memalign yes
libcap-ng support yes
vhost-net support yes
vhost-crypto support yes
vhost-scsi support yes
vhost-vsock support yes
vhost-user support yes
Trace backends log
spice support no
rbd support yes
xfsctl support no
smartcard support yes
libusb yes
usb net redir yes
OpenGL support yes
OpenGL dmabufs yes
libiscsi support yes
libnfs support yes
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support yes
coroutine backend ucontext
coroutine pool yes
debug stack usage no
mutex debugging no
crypto afalg no
GlusterFS support yes
gcov gcov
gcov enabled no
TPM support yes
libssh2 support yes
TPM passthrough no
TPM emulator yes
QOM debugging yes
Live block migration yes
lzo support yes
snappy support yes
bzip2 support yes
NUMA host support no
libxml2 yes
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
VxHS block device no
capstone git
docker no
NOTE: cross-compilers enabled: '/home/fam/bin/cc' '/home/fam/bin/cc'
GEN aarch64-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak
GEN cris-softmmu/config-devices.mak
GEN hppa-softmmu/config-devices.mak.tmp
GEN i386-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak
GEN aarch64-softmmu/config-devices.mak
GEN lm32-softmmu/config-devices.mak.tmp
GEN m68k-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak
GEN microblazeel-softmmu/config-devices.mak.tmp
GEN hppa-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak.tmp
GEN i386-softmmu/config-devices.mak
GEN mips64el-softmmu/config-devices.mak.tmp
GEN microblaze-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak.tmp
GEN mipsel-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak
GEN mips-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak.tmp
GEN moxie-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak
GEN ppc-softmmu/config-devices.mak.tmp
GEN riscv32-softmmu/config-devices.mak.tmp
GEN riscv32-softmmu/config-devices.mak
GEN ppc64-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak
GEN ppc-softmmu/config-devices.mak
GEN riscv64-softmmu/config-devices.mak.tmp
GEN s390x-softmmu/config-devices.mak.tmp
GEN sh4eb-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak.tmp
GEN riscv64-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak.tmp
GEN sparc-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak
GEN tricore-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak
GEN unicore32-softmmu/config-devices.mak
GEN xtensaeb-softmmu/config-devices.mak.tmp
GEN sparc64-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak.tmp
GEN aarch64_be-linux-user/config-devices.mak.tmp
GEN xtensaeb-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak
GEN x86_64-softmmu/config-devices.mak
GEN aarch64-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak.tmp
GEN aarch64_be-linux-user/config-devices.mak
GEN aarch64-linux-user/config-devices.mak
GEN arm-linux-user/config-devices.mak.tmp
GEN cris-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak
GEN alpha-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak.tmp
GEN cris-linux-user/config-devices.mak
GEN arm-linux-user/config-devices.mak
GEN m68k-linux-user/config-devices.mak.tmp
GEN hppa-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak
GEN microblaze-linux-user/config-devices.mak.tmp
GEN mips64el-linux-user/config-devices.mak.tmp
GEN m68k-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak.tmp
GEN microblazeel-linux-user/config-devices.mak
GEN mipsel-linux-user/config-devices.mak.tmp
GEN mips64el-linux-user/config-devices.mak
GEN microblaze-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak
GEN mipsn32el-linux-user/config-devices.mak
GEN nios2-linux-user/config-devices.mak.tmp
GEN mips-linux-user/config-devices.mak
GEN mipsn32-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak.tmp
GEN ppc64le-linux-user/config-devices.mak.tmp
GEN nios2-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak.tmp
GEN or1k-linux-user/config-devices.mak
GEN ppc64le-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak.tmp
GEN riscv32-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak
GEN riscv64-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak.tmp
GEN ppc-linux-user/config-devices.mak
GEN riscv32-linux-user/config-devices.mak
GEN riscv64-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak
GEN sparc-linux-user/config-devices.mak.tmp
GEN tilegx-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak.tmp
GEN xtensaeb-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak
GEN tilegx-linux-user/config-devices.mak
GEN xtensaeb-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak
GEN xtensa-linux-user/config-devices.mak.tmp
GIT ui/keycodemapdb capstone
GEN config-host.h
GEN xtensa-linux-user/config-devices.mak
GEN qemu-options.def
GEN qapi-gen
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN trace/generated-helpers.c
GEN module_block.h
GEN tests/test-qapi-gen
GEN trace-root.h
GEN accel/kvm/trace.h
GEN accel/tcg/trace.h
GEN audio/trace.h
GEN block/trace.h
GEN chardev/trace.h
GEN crypto/trace.h
GEN hw/9pfs/trace.h
Submodule 'capstone' (git://git.qemu.org/capstone.git) registered for path 'capstone'
Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb'
GEN hw/acpi/trace.h
Cloning into '/var/tmp/patchew-tester-tmp-uz7tgcdy/src/capstone'...
GEN hw/alpha/trace.h
GEN hw/arm/trace.h
GEN hw/audio/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/display/trace.h
GEN hw/dma/trace.h
GEN hw/hppa/trace.h
GEN hw/i2c/trace.h
GEN hw/i386/trace.h
GEN hw/i386/xen/trace.h
GEN hw/ide/trace.h
GEN hw/input/trace.h
GEN hw/intc/trace.h
GEN hw/isa/trace.h
GEN hw/mem/trace.h
GEN hw/misc/trace.h
GEN hw/misc/macio/trace.h
GEN hw/net/trace.h
GEN hw/nvram/trace.h
GEN hw/pci/trace.h
GEN hw/pci-host/trace.h
GEN hw/ppc/trace.h
GEN hw/rdma/trace.h
GEN hw/rdma/vmw/trace.h
GEN hw/s390x/trace.h
GEN hw/scsi/trace.h
GEN hw/sd/trace.h
GEN hw/sparc/trace.h
GEN hw/sparc64/trace.h
GEN hw/timer/trace.h
GEN hw/tpm/trace.h
GEN hw/usb/trace.h
GEN hw/vfio/trace.h
GEN hw/virtio/trace.h
GEN hw/xen/trace.h
GEN io/trace.h
GEN linux-user/trace.h
GEN migration/trace.h
GEN nbd/trace.h
GEN net/trace.h
GEN qapi/trace.h
GEN qom/trace.h
GEN scsi/trace.h
GEN target/arm/trace.h
GEN target/i386/trace.h
GEN target/mips/trace.h
GEN target/ppc/trace.h
GEN target/s390x/trace.h
GEN target/sparc/trace.h
GEN ui/trace.h
GEN util/trace.h
GEN trace-root.c
GEN accel/kvm/trace.c
GEN accel/tcg/trace.c
GEN audio/trace.c
GEN block/trace.c
GEN chardev/trace.c
GEN crypto/trace.c
GEN hw/9pfs/trace.c
GEN hw/acpi/trace.c
GEN hw/alpha/trace.c
GEN hw/arm/trace.c
GEN hw/audio/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/display/trace.c
GEN hw/dma/trace.c
GEN hw/hppa/trace.c
GEN hw/i2c/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/ide/trace.c
GEN hw/input/trace.c
GEN hw/intc/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/misc/trace.c
GEN hw/misc/macio/trace.c
GEN hw/net/trace.c
GEN hw/nvram/trace.c
GEN hw/pci/trace.c
GEN hw/pci-host/trace.c
GEN hw/ppc/trace.c
GEN hw/rdma/trace.c
GEN hw/rdma/vmw/trace.c
GEN hw/s390x/trace.c
GEN hw/scsi/trace.c
GEN hw/sd/trace.c
GEN hw/sparc/trace.c
GEN hw/sparc64/trace.c
GEN hw/timer/trace.c
GEN hw/tpm/trace.c
GEN hw/usb/trace.c
GEN hw/vfio/trace.c
GEN hw/virtio/trace.c
GEN hw/xen/trace.c
GEN io/trace.c
GEN linux-user/trace.c
GEN migration/trace.c
GEN nbd/trace.c
GEN net/trace.c
GEN qapi/trace.c
GEN qom/trace.c
GEN scsi/trace.c
GEN target/arm/trace.c
GEN target/i386/trace.c
GEN target/mips/trace.c
GEN target/ppc/trace.c
GEN target/s390x/trace.c
GEN target/sparc/trace.c
GEN ui/trace.c
GEN util/trace.c
GEN config-all-devices.mak
Cloning into '/var/tmp/patchew-tester-tmp-uz7tgcdy/src/ui/keycodemapdb'...
GEN ui/input-keymap-atset1-to-qcode.c
GEN ui/input-keymap-linux-to-qcode.c
GEN ui/input-keymap-qcode-to-atset1.c
GEN ui/input-keymap-qcode-to-atset2.c
GEN ui/input-keymap-qcode-to-atset3.c
GEN ui/input-keymap-qcode-to-linux.c
GEN ui/input-keymap-qcode-to-qnum.c
GEN ui/input-keymap-qcode-to-sun.c
GEN ui/input-keymap-qnum-to-qcode.c
GEN ui/input-keymap-usb-to-qcode.c
CC cs.o
GEN ui/input-keymap-win32-to-qcode.c
GEN ui/input-keymap-x11-to-qcode.c
CC utils.o
GEN ui/input-keymap-xorgevdev-to-qcode.c
CC SStream.o
GEN ui/input-keymap-xorgkbd-to-qcode.c
GEN ui/input-keymap-xorgxquartz-to-qcode.c
CC MCInstrDesc.o
CC MCRegisterInfo.o
GEN ui/input-keymap-xorgxwin-to-qcode.c
GEN ui/input-keymap-osx-to-qcode.c
CC arch/ARM/ARMDisassembler.o
CC arch/ARM/ARMInstPrinter.o
CC arch/ARM/ARMMapping.o
CC arch/ARM/ARMModule.o
CC arch/AArch64/AArch64BaseInfo.o
CC arch/AArch64/AArch64Disassembler.o
CC arch/AArch64/AArch64InstPrinter.o
CC arch/AArch64/AArch64Mapping.o
CC arch/AArch64/AArch64Module.o
CC arch/Mips/MipsDisassembler.o
CC arch/Mips/MipsInstPrinter.o
CC arch/Mips/MipsMapping.o
CC arch/Mips/MipsModule.o
CC arch/PowerPC/PPCDisassembler.o
CC arch/PowerPC/PPCInstPrinter.o
CC arch/PowerPC/PPCMapping.o
CC arch/PowerPC/PPCModule.o
CC arch/Sparc/SparcDisassembler.o
CC arch/Sparc/SparcInstPrinter.o
CC arch/Sparc/SparcMapping.o
CC arch/Sparc/SparcModule.o
CC arch/SystemZ/SystemZDisassembler.o
CC arch/SystemZ/SystemZInstPrinter.o
CC arch/SystemZ/SystemZMapping.o
CC arch/SystemZ/SystemZModule.o
CC arch/SystemZ/SystemZMCTargetDesc.o
CC arch/X86/X86DisassemblerDecoder.o
CC arch/X86/X86Disassembler.o
CC arch/X86/X86IntelInstPrinter.o
CC arch/X86/X86ATTInstPrinter.o
CC arch/X86/X86Mapping.o
CC arch/X86/X86Module.o
CC arch/XCore/XCoreDisassembler.o
CC arch/XCore/XCoreInstPrinter.o
CC arch/XCore/XCoreMapping.o
CC arch/XCore/XCoreModule.o
CC MCInst.o
AR libcapstone.a
ar: creating /var/tmp/patchew-tester-tmp-uz7tgcdy/src/build/capstone/libcapstone.a
GEN docs/version.texi
GEN qemu-options.texi
CC tests/qemu-iotests/socket_scm_helper.o
GEN qemu-monitor.texi
GEN qemu-img-cmds.texi
GEN qemu-monitor-info.texi
GEN qemu-img.1
GEN qemu-nbd.8
GEN qemu-ga.8
GEN qga/qapi-generated/qapi-gen
GEN docs/qemu-block-drivers.7
GEN fsdev/virtfs-proxy-helper.1
CC qapi/qapi-builtin-types.o
CC qapi/qapi-types.o
CC qapi/qapi-types-block-core.o
CC qapi/qapi-types-block.o
CC qapi/qapi-types-char.o
CC qapi/qapi-types-common.o
CC qapi/qapi-types-crypto.o
CC qapi/qapi-types-introspect.o
CC qapi/qapi-types-job.o
CC qapi/qapi-types-migration.o
CC qapi/qapi-types-misc.o
CC qapi/qapi-types-net.o
CC qapi/qapi-types-rocker.o
CC qapi/qapi-types-run-state.o
CC qapi/qapi-types-sockets.o
CC qapi/qapi-types-tpm.o
CC qapi/qapi-types-trace.o
CC qapi/qapi-types-transaction.o
CC qapi/qapi-types-ui.o
CC qapi/qapi-builtin-visit.o
CC qapi/qapi-visit.o
CC qapi/qapi-visit-block-core.o
CC qapi/qapi-visit-block.o
CC qapi/qapi-visit-char.o
CC qapi/qapi-visit-common.o
CC qapi/qapi-visit-crypto.o
CC qapi/qapi-visit-introspect.o
CC qapi/qapi-visit-job.o
CC qapi/qapi-visit-migration.o
CC qapi/qapi-visit-misc.o
CC qapi/qapi-visit-net.o
CC qapi/qapi-visit-rocker.o
CC qapi/qapi-visit-run-state.o
CC qapi/qapi-visit-sockets.o
CC qapi/qapi-visit-tpm.o
CC qapi/qapi-visit-trace.o
CC qapi/qapi-visit-transaction.o
CC qapi/qapi-visit-ui.o
CC qapi/qapi-events.o
CC qapi/qapi-events-block-core.o
CC qapi/qapi-events-block.o
CC qapi/qapi-events-char.o
CC qapi/qapi-events-common.o
CC qapi/qapi-events-crypto.o
CC qapi/qapi-events-introspect.o
CC qapi/qapi-events-job.o
CC qapi/qapi-events-migration.o
CC qapi/qapi-events-misc.o
CC qapi/qapi-events-net.o
CC qapi/qapi-events-rocker.o
CC qapi/qapi-events-run-state.o
CC qapi/qapi-events-sockets.o
CC qapi/qapi-events-tpm.o
CC qapi/qapi-events-trace.o
CC qapi/qapi-events-transaction.o
CC qapi/qapi-events-ui.o
CC qapi/qapi-introspect.o
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/qmp-dispatch.o
CC qapi/string-input-visitor.o
CC qapi/string-output-visitor.o
CC qapi/opts-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qstring.o
CC qobject/qnum.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qbool.o
CC qobject/qlit.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC qobject/block-qdict.o
CC trace/control.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/aio-wait.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/main-loop.o
CC util/iohandler.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/oslib-posix.o
CC util/qemu-openpty.o
CC util/qemu-thread-posix.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/module.o
CC util/host-utils.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/fifo8.o
CC util/acl.o
CC util/cacheinfo.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/notify.o
CC util/qemu-option.o
CC util/qemu-progress.o
CC util/keyval.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/buffer.o
CC util/timed-average.o
CC util/base64.o
CC util/log.o
CC util/pagesize.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC util/stats64.o
CC util/systemd.o
CC util/iova-tree.o
CC util/vfio-helpers.o
CC trace-root.o
CC accel/kvm/trace.o
CC accel/tcg/trace.o
CC audio/trace.o
CC block/trace.o
CC chardev/trace.o
CC crypto/trace.o
CC hw/9pfs/trace.o
CC hw/acpi/trace.o
CC hw/alpha/trace.o
CC hw/arm/trace.o
CC hw/audio/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/char/trace.o
CC hw/display/trace.o
CC hw/dma/trace.o
CC hw/hppa/trace.o
CC hw/i2c/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/ide/trace.o
CC hw/input/trace.o
CC hw/intc/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/misc/trace.o
CC hw/misc/macio/trace.o
CC hw/net/trace.o
CC hw/nvram/trace.o
CC hw/pci/trace.o
CC hw/pci-host/trace.o
CC hw/ppc/trace.o
CC hw/rdma/trace.o
CC hw/rdma/vmw/trace.o
CC hw/s390x/trace.o
CC hw/scsi/trace.o
CC hw/sd/trace.o
CC hw/sparc/trace.o
CC hw/sparc64/trace.o
CC hw/timer/trace.o
CC hw/tpm/trace.o
CC hw/usb/trace.o
CC hw/vfio/trace.o
CC hw/virtio/trace.o
CC hw/xen/trace.o
CC io/trace.o
CC linux-user/trace.o
CC migration/trace.o
CC nbd/trace.o
CC net/trace.o
CC qapi/trace.o
CC qom/trace.o
CC scsi/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/mips/trace.o
CC target/ppc/trace.o
CC target/s390x/trace.o
CC target/sparc/trace.o
CC ui/trace.o
CC util/trace.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/clock-warp.o
CC stubs/cpu-get-clock.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/migr-blocker.o
CC stubs/change-state-handler.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/tpm.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_memory_device.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC stubs/vmgenid.o
CC stubs/xen-common.o
CC stubs/xen-hvm.o
CC stubs/pci-host-piix.o
CC stubs/ram-block.o
CC qemu-keymap.o
CC ui/input-keymap.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC qemu-nbd.o
CC block.o
CC blockjob.o
CC job.o
CC qemu-io-cmds.o
CC replication.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/vmdk.o
CC block/cloop.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qcow2-bitmap.o
CC block/qed.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/snapshot.o
CC block/qapi.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/create.o
CC block/throttle-groups.o
CC block/nvme.o
CC block/nbd.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/iscsi-opts.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/throttle.o
CC block/copy-on-read.o
CC block/crypto.o
CC nbd/server.o
CC nbd/client.o
CC nbd/common.o
CC scsi/utils.o
CC scsi/pr-manager.o
CC scsi/pr-manager-helper.o
CC block/iscsi.o
CC block/nfs.o
CC block/curl.o
CC block/rbd.o
CC block/gluster.o
CC block/ssh.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/aes.o
CC crypto/desrfb.o
CC crypto/cipher.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredspsk.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/secret.o
CC crypto/random-gnutls.o
CC crypto/pbkdf.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-qcow.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-tls.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/net-listener.o
CC io/task.o
CC qom/object.o
CC qom/container.o
CC qom/qom-qobject.o
CC qom/object_interfaces.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC fsdev/virtfs-proxy-helper.o
CC fsdev/9p-marshal.o
CC fsdev/9p-iov-marshal.o
CC scsi/qemu-pr-helper.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC bootdevice.o
CC iothread.o
CC job-qmp.o
CC qdev-monitor.o
CC device-hotplug.o
CC os-posix.o
CC bt-host.o
CC bt-vhci.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC qemu-seccomp.o
CC device_tree.o
CC qapi/qapi-commands.o
CC qapi/qapi-commands-block-core.o
CC qapi/qapi-commands-block.o
CC qapi/qapi-commands-char.o
CC qapi/qapi-commands-common.o
CC qapi/qapi-commands-crypto.o
CC qapi/qapi-commands-introspect.o
CC qapi/qapi-commands-job.o
CC qapi/qapi-commands-migration.o
CC qapi/qapi-commands-misc.o
CC qapi/qapi-commands-net.o
CC qapi/qapi-commands-rocker.o
CC qapi/qapi-commands-run-state.o
CC qapi/qapi-commands-sockets.o
CC qapi/qapi-commands-tpm.o
CC qapi/qapi-commands-trace.o
CC qapi/qapi-commands-transaction.o
CC qapi/qapi-commands-ui.o
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/wavaudio.o
CC audio/mixeng.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/rng-random.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC backends/cryptodev-vhost.o
CC backends/cryptodev-vhost-user.o
CC backends/hostmem-memfd.o
CC block/stream.o
CC chardev/msmouse.o
CC chardev/wctablet.o
CC chardev/testdev.o
CC chardev/baum.o
CC disas/alpha.o
CC disas/arm.o
CXX disas/arm-a64.o
CC disas/cris.o
CC disas/hppa.o
CC disas/i386.o
CC disas/m68k.o
CC disas/microblaze.o
CC disas/mips.o
CC disas/nios2.o
CC disas/moxie.o
CC disas/ppc.o
CC disas/riscv.o
CC disas/s390.o
CC disas/sh4.o
CC disas/sparc.o
CC disas/lm32.o
CC disas/xtensa.o
CXX disas/libvixl/vixl/utils.o
CXX disas/libvixl/vixl/compiler-intrinsics.o
CXX disas/libvixl/vixl/a64/instructions-a64.o
CXX disas/libvixl/vixl/a64/decoder-a64.o
CXX disas/libvixl/vixl/a64/disasm-a64.o
CC fsdev/qemu-fsdev.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-throttle.o
CC fsdev/qemu-fsdev-dummy.o
CC hw/9pfs/9p.o
CC hw/9pfs/9p-util.o
CC hw/9pfs/9p-local.o
CC hw/9pfs/9p-xattr.o
CC hw/9pfs/9p-xattr-user.o
CC hw/9pfs/9p-posix-acl.o
CC hw/9pfs/coth.o
CC hw/9pfs/cofs.o
CC hw/9pfs/codir.o
CC hw/9pfs/cofile.o
CC hw/9pfs/coxattr.o
CC hw/9pfs/9p-synth.o
CC hw/9pfs/9p-handle.o
CC hw/9pfs/9p-proxy.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/vmgenid.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/cs4231.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/milkymist-ac97.o
CC hw/audio/soundhw.o
CC hw/block/block.o
CC hw/block/cdrom.o
CC hw/block/hd-geometry.o
CC hw/block/fdc.o
CC hw/block/m25p80.o
CC hw/block/nand.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/escc.o
CC hw/char/parallel.o
CC hw/char/parallel-isa.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/virtio-console.o
CC hw/char/cadence_uart.o
CC hw/char/xilinx_uartlite.o
CC hw/char/cmsdk-apb-uart.o
CC hw/char/etraxfs_ser.o
CC hw/char/debugcon.o
CC hw/char/grlib_apbuart.o
CC hw/char/imx_serial.o
CC hw/char/lm32_juart.o
CC hw/char/lm32_uart.o
CC hw/char/milkymist-uart.o
CC hw/char/sclpconsole.o
CC hw/char/sclpconsole-lm.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/qdev-fw.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/nmi.o
CC hw/core/empty_slot.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/sysbus.o
CC hw/core/machine.o
CC hw/core/loader.o
CC hw/core/loader-fit.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/split-irq.o
CC hw/core/platform-bus.o
CC hw/cpu/core.o
CC hw/display/ramfb.o
CC hw/display/ramfb-standalone.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/g364fb.o
CC hw/display/jazz_led.o
CC hw/display/pl110.o
CC hw/display/sii9022.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/vga-pci.o
CC hw/display/bochs-display.o
CC hw/display/vga-isa.o
CC hw/display/vga-isa-mm.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/milkymist-vgafb.o
CC hw/display/tc6393xb.o
CC hw/display/milkymist-tmu2.o
CC hw/dma/puv3_dma.o
CC hw/dma/rc4030.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i82374.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/etraxfs_dma.o
CC hw/dma/sparc32_dma.o
CC hw/dma/xlnx-zdma.o
CC hw/gpio/max7310.o
CC hw/gpio/pl061.o
CC hw/gpio/puv3_gpio.o
CC hw/gpio/zaurus.o
CC hw/gpio/mpc8xxx.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/cmd646.o
CC hw/ide/macio.o
CC hw/ide/mmio.o
CC hw/ide/via.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/ide/ahci-allwinner.o
CC hw/ide/sii3112.o
CC hw/input/adb.o
CC hw/input/adb-mouse.o
CC hw/input/adb-kbd.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/ps2.o
CC hw/input/stellaris_input.o
CC hw/input/tsc2005.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/heathrow_pic.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/puv3_intc.o
CC hw/intc/xilinx_intc.o
CC hw/intc/xlnx-pmu-iomod-intc.o
CC hw/intc/xlnx-zynqmp-ipi.o
CC hw/intc/etraxfs_pic.o
CC hw/intc/imx_avic.o
CC hw/intc/imx_gpcv2.o
CC hw/intc/lm32_pic.o
CC hw/intc/realview_gic.o
CC hw/intc/slavio_intctl.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/openpic.o
CC hw/intc/intc.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/isa-superio.o
CC hw/isa/smc37c669-superio.o
CC hw/isa/apm.o
CC hw/isa/i82378.o
CC hw/isa/pc87312.o
CC hw/isa/piix4.o
CC hw/isa/vt82c686.o
CC hw/mem/pc-dimm.o
CC hw/mem/memory-device.o
CC hw/mem/nvdimm.o
CC hw/misc/applesmc.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/tmp421.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pc-testdev.o
CC hw/misc/pci-testdev.o
CC hw/misc/edu.o
CC hw/misc/pca9552.o
CC hw/misc/unimp.o
CC hw/misc/vmcoreinfo.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/misc/mos6522.o
CC hw/misc/puv3_pm.o
CC hw/misc/macio/macio.o
CC hw/misc/macio/cuda.o
CC hw/misc/macio/pmu.o
CC hw/misc/macio/mac_dbdma.o
CC hw/misc/macio/gpio.o
CC hw/net/dp8393x.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/opencores_eth.o
CC hw/net/xgmac.o
CC hw/net/mipsnet.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/lance.o
CC hw/net/sunhme.o
CC hw/net/ftgmac100.o
CC hw/net/sungem.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/net/can/can_sja1000.o
CC hw/net/can/can_kvaser_pci.o
CC hw/net/can/can_pcm3680_pci.o
CC hw/net/can/can_mioe3680_pci.o
CC hw/nvram/ds1225y.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/eeprom_at24c.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/nvram/mac_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pcie_pci_bridge.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-bridge/dec.o
CC hw/pci-bridge/simba.o
CC hw/pci-host/pam.o
CC hw/pci-host/prep.o
CC hw/pci-host/grackle.o
CC hw/pci-host/uninorth.o
CC hw/pci-host/ppce500.o
CC hw/pci-host/versatile.o
CC hw/pci-host/sabre.o
CC hw/pci-host/bonito.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/xilinx-pcie.o
CC hw/pci-host/designware.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/sd/sdmmc-internal.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/ssi/mss-spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/armv7m_systick.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/m41t80.o
CC hw/timer/m48t59.o
CC hw/timer/m48t59-isa.o
CC hw/timer/pl031.o
CC hw/timer/puv3_ost.o
CC hw/timer/twl92230.o
CC hw/timer/xilinx_timer.o
CC hw/timer/slavio_timer.o
CC hw/timer/etraxfs_timer.o
CC hw/timer/grlib_gptimer.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/lm32_timer.o
CC hw/timer/milkymist-sysctl.o
CC hw/timer/xlnx-zynqmp-rtc.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/sun4v-rtc.o
CC hw/timer/cmsdk-apb-timer.o
CC hw/timer/mss-timer.o
CC hw/tpm/tpm_util.o
CC hw/tpm/tpm_tis.o
CC hw/tpm/tpm_crb.o
CC hw/tpm/tpm_emulator.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-xhci-nec.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-network.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/redirect.o
CC hw/usb/quirks.o
CC hw/usb/host-libusb.o
CC hw/usb/host-stub.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_diag288.o
CC hw/watchdog/wdt_aspeed.o
CC migration/migration.o
CC migration/socket.o
CC migration/fd.o
CC migration/exec.o
CC migration/tls.o
CC migration/channel.o
CC migration/savevm.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/vmstate-types.o
CC migration/page_cache.o
CC migration/qemu-file.o
CC migration/global_state.o
CC migration/qemu-file-channel.o
CC migration/xbzrle.o
CC migration/postcopy-ram.o
CC migration/qjson.o
CC migration/block-dirty-bitmap.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/vhost-user.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC net/tap.o
CC net/tap-linux.o
CC net/can/can_core.o
CC net/can/can_host.o
CC net/can/can_socketcan.o
CC qom/cpu.o
CC replay/replay.o
CC replay/replay-internal.o
CC replay/replay-events.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC replay/replay-audio.o
CC slirp/cksum.o
CC slirp/if.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/tcp_timer.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC slirp/ncsi.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-auth-sasl.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
VERT ui/shader/texture-blit-vert.h
VERT ui/shader/texture-blit-flip-vert.h
CC ui/console-gl.o
FRAG ui/shader/texture-blit-frag.h
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/egl-headless.o
CC audio/ossaudio.o
CC ui/sdl2.o
CC ui/sdl2-input.o
CC ui/sdl2-2d.o
CC ui/sdl2-gl.o
CC ui/x_keymap.o
CC ui/gtk.o
CC ui/gtk-egl.o
CC ui/gtk-gl-area.o
CC ui/curses.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-fe.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
CCAS s390-ccw/start.o
LINK tests/qemu-iotests/socket_scm_helper
CC s390-ccw/main.o
GEN qemu-doc.html
CC s390-ccw/bootmap.o
GEN qemu-doc.txt
CC s390-ccw/jump2ipl.o
CC s390-ccw/sclp.o
GEN qemu.1
CC s390-ccw/menu.o
GEN docs/interop/qemu-qmp-ref.html
CC s390-ccw/virtio.o
CC s390-ccw/virtio-scsi.o
CC s390-ccw/virtio-blkdev.o
CC s390-ccw/libc.o
GEN docs/interop/qemu-qmp-ref.txt
GEN docs/interop/qemu-qmp-ref.7
s390-netboot.img not built since roms/SLOF/ is not available.
BUILD s390-ccw/s390-ccw.elf
STRIP s390-ccw/s390-ccw.img
CC qga/commands.o
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qapi-commands.o
AR libqemuutil.a
CC qemu-img.o
LINK qemu-io
LINK fsdev/virtfs-proxy-helper
LINK scsi/qemu-pr-helper
LINK qemu-bridge-helper
CC ui/shader.o
GEN docs/interop/qemu-ga-ref.html
GEN docs/interop/qemu-ga-ref.txt
GEN docs/interop/qemu-ga-ref.7
LINK qemu-ga
LINK qemu-keymap
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
LINK qemu-img
GEN alpha-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands.h
GEN alpha-softmmu/hmp-commands-info.h
GEN alpha-softmmu/config-target.h
GEN cris-softmmu/hmp-commands-info.h
GEN cris-softmmu/config-target.h
GEN aarch64-softmmu/hmp-commands.h
CC alpha-softmmu/exec.o
CC cris-softmmu/exec.o
GEN aarch64-softmmu/hmp-commands-info.h
GEN arm-softmmu/hmp-commands.h
GEN aarch64-softmmu/config-target.h
GEN arm-softmmu/hmp-commands-info.h
GEN arm-softmmu/config-target.h
CC arm-softmmu/exec.o
CC aarch64-softmmu/exec.o
CC alpha-softmmu/tcg/tcg.o
CC arm-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg.o
CC aarch64-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg-op.o
CC arm-softmmu/tcg/tcg-op.o
CC cris-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/tcg-op-vec.o
CC cris-softmmu/tcg/tcg-op-vec.o
CC alpha-softmmu/tcg/tcg-op-gvec.o
CC arm-softmmu/tcg/tcg-op-vec.o
CC cris-softmmu/tcg/tcg-op-gvec.o
CC arm-softmmu/tcg/tcg-op-gvec.o
CC aarch64-softmmu/tcg/tcg-op-vec.o
CC alpha-softmmu/tcg/tcg-common.o
CC alpha-softmmu/tcg/optimize.o
CC cris-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/tcg-op-gvec.o
CC cris-softmmu/tcg/optimize.o
CC arm-softmmu/tcg/tcg-common.o
CC alpha-softmmu/fpu/softfloat.o
CC arm-softmmu/tcg/optimize.o
CC cris-softmmu/fpu/softfloat.o
CC arm-softmmu/fpu/softfloat.o
CC aarch64-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/optimize.o
CC aarch64-softmmu/fpu/softfloat.o
CC alpha-softmmu/disas.o
CC cris-softmmu/disas.o
CC alpha-softmmu/arch_init.o
CC alpha-softmmu/cpus.o
CC cris-softmmu/arch_init.o
CC arm-softmmu/disas.o
CC cris-softmmu/cpus.o
CC alpha-softmmu/monitor.o
GEN arm-softmmu/gdbstub-xml.c
CC cris-softmmu/monitor.o
CC arm-softmmu/arch_init.o
CC alpha-softmmu/gdbstub.o
CC aarch64-softmmu/disas.o
CC arm-softmmu/cpus.o
CC cris-softmmu/gdbstub.o
GEN aarch64-softmmu/gdbstub-xml.c
CC alpha-softmmu/balloon.o
CC alpha-softmmu/ioport.o
CC arm-softmmu/monitor.o
CC aarch64-softmmu/arch_init.o
CC cris-softmmu/balloon.o
CC alpha-softmmu/numa.o
CC aarch64-softmmu/cpus.o
CC cris-softmmu/ioport.o
CC alpha-softmmu/qtest.o
CC cris-softmmu/numa.o
CC aarch64-softmmu/monitor.o
CC cris-softmmu/qtest.o
CC arm-softmmu/gdbstub.o
CC alpha-softmmu/memory.o
CC cris-softmmu/memory.o
CC arm-softmmu/balloon.o
CC arm-softmmu/ioport.o
CC aarch64-softmmu/gdbstub.o
CC alpha-softmmu/memory_mapping.o
CC alpha-softmmu/dump.o
CC arm-softmmu/numa.o
CC cris-softmmu/memory_mapping.o
CC aarch64-softmmu/balloon.o
CC arm-softmmu/qtest.o
CC alpha-softmmu/migration/ram.o
CC aarch64-softmmu/ioport.o
CC cris-softmmu/dump.o
CC arm-softmmu/memory.o
CC aarch64-softmmu/numa.o
CC aarch64-softmmu/qtest.o
CC alpha-softmmu/accel/accel.o
CC cris-softmmu/migration/ram.o
CC alpha-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/memory.o
CC alpha-softmmu/accel/stubs/hvf-stub.o
CC arm-softmmu/memory_mapping.o
CC arm-softmmu/dump.o
CC alpha-softmmu/accel/stubs/whpx-stub.o
CC alpha-softmmu/accel/stubs/kvm-stub.o
CC cris-softmmu/accel/accel.o
CC cris-softmmu/accel/stubs/hax-stub.o
CC alpha-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/memory_mapping.o
CC arm-softmmu/migration/ram.o
CC cris-softmmu/accel/stubs/hvf-stub.o
CC alpha-softmmu/accel/tcg/cputlb.o
CC cris-softmmu/accel/stubs/whpx-stub.o
CC aarch64-softmmu/dump.o
CC cris-softmmu/accel/stubs/kvm-stub.o
CC cris-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/migration/ram.o
CC arm-softmmu/accel/accel.o
CC cris-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/accel/accel.o
CC arm-softmmu/accel/stubs/hvf-stub.o
CC aarch64-softmmu/accel/stubs/hax-stub.o
CC arm-softmmu/accel/stubs/whpx-stub.o
CC aarch64-softmmu/accel/stubs/hvf-stub.o
CC arm-softmmu/accel/stubs/kvm-stub.o
CC alpha-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/accel/stubs/whpx-stub.o
CC arm-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/accel/stubs/kvm-stub.o
CC alpha-softmmu/accel/tcg/tcg-runtime-gvec.o
CC arm-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/accel/tcg/cputlb.o
CC cris-softmmu/accel/tcg/tcg-runtime.o
CC alpha-softmmu/accel/tcg/cpu-exec.o
CC cris-softmmu/accel/tcg/tcg-runtime-gvec.o
CC alpha-softmmu/accel/tcg/cpu-exec-common.o
CC alpha-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/accel/tcg/cpu-exec.o
CC alpha-softmmu/accel/tcg/translator.o
CC cris-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/accel/tcg/tcg-runtime.o
CC cris-softmmu/accel/tcg/translate-all.o
CC alpha-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/accel/tcg/tcg-runtime-gvec.o
CC alpha-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/accel/tcg/tcg-runtime.o
CC cris-softmmu/accel/tcg/translator.o
CC alpha-softmmu/hw/block/vhost-user-blk.o
CC aarch64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC alpha-softmmu/hw/block/dataplane/virtio-blk.o
CC cris-softmmu/hw/core/generic-loader.o
CC arm-softmmu/accel/tcg/cpu-exec.o
CC alpha-softmmu/hw/char/virtio-serial-bus.o
CC cris-softmmu/hw/core/null-machine.o
CC arm-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/hw/misc/mmio_interface.o
CC alpha-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/accel/tcg/translate-all.o
CC alpha-softmmu/hw/core/null-machine.o
CC cris-softmmu/hw/net/etraxfs_eth.o
CC aarch64-softmmu/accel/tcg/cpu-exec-common.o
CC alpha-softmmu/hw/display/vga.o
CC arm-softmmu/accel/tcg/translator.o
CC cris-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/hw/net/rocker/qmp-norocker.o
CC cris-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/9pfs/virtio-9p-device.o
CC alpha-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/accel/tcg/translator.o
CC arm-softmmu/hw/adc/stm32f2xx_adc.o
CC cris-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/block/virtio-blk.o
CC alpha-softmmu/hw/display/virtio-gpu-3d.o
CC cris-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o
CC alpha-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC arm-softmmu/hw/block/vhost-user-blk.o
CC cris-softmmu/hw/cris/boot.o
CC alpha-softmmu/hw/misc/ivshmem.o
CC cris-softmmu/hw/cris/axis_dev88.o
CC arm-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC cris-softmmu/target/cris/translate.o
CC alpha-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/char/exynos4210_uart.o
CC alpha-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/block/vhost-user-blk.o
CC arm-softmmu/hw/char/omap_uart.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/char/digic-uart.o
CC alpha-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC arm-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/scsi/virtio-scsi.o
CC aarch64-softmmu/hw/char/omap_uart.o
CC arm-softmmu/hw/char/bcm2835_aux.o
CC cris-softmmu/target/cris/op_helper.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/scsi/vhost-scsi-common.o
CC cris-softmmu/target/cris/helper.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC cris-softmmu/target/cris/cpu.o
CC alpha-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/core/generic-loader.o
CC cris-softmmu/target/cris/gdbstub.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC alpha-softmmu/hw/scsi/vhost-user-scsi.o
CC arm-softmmu/hw/core/null-machine.o
CC cris-softmmu/target/cris/mmu.o
CC alpha-softmmu/hw/timer/mc146818rtc.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/cpu/arm11mpcore.o
CC cris-softmmu/target/cris/machine.o
CC aarch64-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/cpu/realview_mpcore.o
CC alpha-softmmu/hw/vfio/common.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC cris-softmmu/trace/control-target.o
CC arm-softmmu/hw/cpu/a9mpcore.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC arm-softmmu/hw/cpu/a15mpcore.o
CC cris-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC arm-softmmu/hw/display/omap_dss.o
CC alpha-softmmu/hw/vfio/pci.o
LINK cris-softmmu/qemu-system-cris
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC arm-softmmu/hw/display/omap_lcdc.o
CC aarch64-softmmu/hw/display/omap_lcdc.o
CC arm-softmmu/hw/display/pxa2xx_lcd.o
CC alpha-softmmu/hw/vfio/pci-quirks.o
CC alpha-softmmu/hw/vfio/display.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC arm-softmmu/hw/display/bcm2835_fb.o
CC alpha-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/display/vga.o
GEN hppa-softmmu/hmp-commands.h
GEN hppa-softmmu/hmp-commands-info.h
CC aarch64-softmmu/hw/display/bcm2835_fb.o
GEN hppa-softmmu/config-target.h
CC alpha-softmmu/hw/vfio/spapr.o
CC hppa-softmmu/exec.o
CC aarch64-softmmu/hw/display/vga.o
CC alpha-softmmu/hw/virtio/virtio.o
CC arm-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC arm-softmmu/hw/display/virtio-gpu-3d.o
CC alpha-softmmu/hw/virtio/virtio-balloon.o
CC hppa-softmmu/tcg/tcg.o
CC arm-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC alpha-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/dma/omap_dma.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o
CC arm-softmmu/hw/dma/soc_dma.o
CC aarch64-softmmu/hw/display/dpcd.o
CC alpha-softmmu/hw/virtio/vhost.o
CC arm-softmmu/hw/dma/pxa2xx_dma.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC arm-softmmu/hw/dma/bcm2835_dma.o
CC hppa-softmmu/tcg/tcg-op.o
CC alpha-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC arm-softmmu/hw/gpio/omap_gpio.o
CC alpha-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC arm-softmmu/hw/gpio/imx_gpio.o
CC alpha-softmmu/hw/virtio/vhost-vsock.o
CC arm-softmmu/hw/gpio/bcm2835_gpio.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC alpha-softmmu/hw/alpha/dp264.o
CC arm-softmmu/hw/i2c/omap_i2c.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC alpha-softmmu/hw/alpha/pci.o
CC hppa-softmmu/tcg/tcg-op-vec.o
CC arm-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC alpha-softmmu/hw/alpha/typhoon.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC arm-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/target/alpha/machine.o
CC hppa-softmmu/tcg/tcg-op-gvec.o
CC alpha-softmmu/target/alpha/translate.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC arm-softmmu/hw/intc/armv7m_nvic.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC hppa-softmmu/tcg/tcg-common.o
CC arm-softmmu/hw/intc/exynos4210_gic.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC hppa-softmmu/tcg/optimize.o
CC alpha-softmmu/target/alpha/helper.o
CC arm-softmmu/hw/intc/exynos4210_combiner.o
CC aarch64-softmmu/hw/input/tsc210x.o
CC arm-softmmu/hw/intc/omap_intc.o
CC hppa-softmmu/fpu/softfloat.o
CC alpha-softmmu/target/alpha/cpu.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC arm-softmmu/hw/intc/bcm2835_ic.o
CC alpha-softmmu/target/alpha/int_helper.o
CC arm-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/intc/allwinner-a10-pic.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC alpha-softmmu/target/alpha/fpu_helper.o
CC arm-softmmu/hw/intc/aspeed_vic.o
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC alpha-softmmu/target/alpha/vax_helper.o
CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC alpha-softmmu/target/alpha/sys_helper.o
CC alpha-softmmu/target/alpha/mem_helper.o
CC arm-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC alpha-softmmu/target/alpha/gdbstub.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/misc/arm_sysctl.o
GEN trace/generated-helpers.c
CC alpha-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC alpha-softmmu/trace/generated-helpers.o
CC arm-softmmu/hw/misc/cbus.o
CC hppa-softmmu/disas.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC arm-softmmu/hw/misc/exynos4210_pmu.o
LINK alpha-softmmu/qemu-system-alpha
CC hppa-softmmu/arch_init.o
CC arm-softmmu/hw/misc/exynos4210_clk.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC hppa-softmmu/cpus.o
CC arm-softmmu/hw/misc/exynos4210_rng.o
CC hppa-softmmu/monitor.o
CC arm-softmmu/hw/misc/imx_ccm.o
CC aarch64-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/misc/imx31_ccm.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC arm-softmmu/hw/misc/imx25_ccm.o
CC aarch64-softmmu/hw/misc/cbus.o
CC arm-softmmu/hw/misc/imx6_ccm.o
GEN i386-softmmu/hmp-commands.h
GEN i386-softmmu/hmp-commands-info.h
GEN i386-softmmu/config-target.h
CC arm-softmmu/hw/misc/imx6_src.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC i386-softmmu/exec.o
CC hppa-softmmu/gdbstub.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC arm-softmmu/hw/misc/imx7_ccm.o
CC aarch64-softmmu/hw/misc/exynos4210_rng.o
CC arm-softmmu/hw/misc/imx2_wdt.o
CC hppa-softmmu/balloon.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC hppa-softmmu/ioport.o
CC arm-softmmu/hw/misc/imx7_snvs.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC arm-softmmu/hw/misc/imx7_gpr.o
CC hppa-softmmu/numa.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC arm-softmmu/hw/misc/mst_fpga.o
CC hppa-softmmu/qtest.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC i386-softmmu/tcg/tcg.o
CC arm-softmmu/hw/misc/omap_clk.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC hppa-softmmu/memory.o
CC arm-softmmu/hw/misc/omap_gpmc.o
CC aarch64-softmmu/hw/misc/imx7_ccm.o
CC arm-softmmu/hw/misc/omap_l4.o
CC aarch64-softmmu/hw/misc/imx2_wdt.o
CC arm-softmmu/hw/misc/omap_sdrc.o
CC arm-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/imx7_snvs.o
CC hppa-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/misc/imx7_gpr.o
CC arm-softmmu/hw/misc/bcm2835_mbox.o
CC arm-softmmu/hw/misc/bcm2835_property.o
CC hppa-softmmu/dump.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC i386-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/misc/bcm2835_rng.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC arm-softmmu/hw/misc/zynq_slcr.o
CC hppa-softmmu/migration/ram.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC arm-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o
CC aarch64-softmmu/hw/misc/omap_l4.o
CC arm-softmmu/hw/misc/mps2-fpgaio.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC hppa-softmmu/accel/accel.o
CC arm-softmmu/hw/misc/mps2-scc.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC hppa-softmmu/accel/stubs/hax-stub.o
CC arm-softmmu/hw/misc/tz-mpc.o
CC i386-softmmu/tcg/tcg-op-vec.o
CC hppa-softmmu/accel/stubs/hvf-stub.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC hppa-softmmu/accel/stubs/whpx-stub.o
CC arm-softmmu/hw/misc/tz-ppc.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC hppa-softmmu/accel/stubs/kvm-stub.o
CC i386-softmmu/tcg/tcg-op-gvec.o
CC arm-softmmu/hw/misc/iotkit-secctl.o
CC hppa-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC hppa-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/hw/misc/aspeed_scu.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/misc/aspeed_sdmc.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
CC arm-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/misc/mps2-fpgaio.o
CC aarch64-softmmu/hw/misc/mps2-scc.o
CC arm-softmmu/hw/misc/msf2-sysreg.o
CC i386-softmmu/tcg/tcg-common.o
CC arm-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/misc/tz-mpc.o
CC i386-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/misc/tz-ppc.o
CC aarch64-softmmu/hw/misc/iotkit-secctl.o
CC arm-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/pcmcia/pxa2xx.o
CC i386-softmmu/fpu/softfloat.o
CC hppa-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC arm-softmmu/hw/scsi/virtio-scsi.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC hppa-softmmu/accel/tcg/tcg-runtime-gvec.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/misc/mmio_interface.o
CC hppa-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/hw/misc/msf2-sysreg.o
CC arm-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC hppa-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/hw/scsi/vhost-user-scsi.o
CC hppa-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/hw/sd/omap_mmc.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC hppa-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC arm-softmmu/hw/sd/pxa2xx_mmci.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/disas.o
CC hppa-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/sd/bcm2835_sdhost.o
CC hppa-softmmu/hw/block/virtio-blk.o
GEN i386-softmmu/gdbstub-xml.c
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/ssi/omap_spi.o
CC i386-softmmu/arch_init.o
CC aarch64-softmmu/hw/scsi/vhost-scsi-common.o
CC arm-softmmu/hw/ssi/imx_spi.o
CC i386-softmmu/cpus.o
CC hppa-softmmu/hw/block/vhost-user-blk.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/timer/exynos4210_mct.o
CC aarch64-softmmu/hw/scsi/vhost-user-scsi.o
CC hppa-softmmu/hw/block/dataplane/virtio-blk.o
CC i386-softmmu/monitor.o
CC arm-softmmu/hw/timer/exynos4210_pwm.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC hppa-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC arm-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC hppa-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/timer/omap_gptimer.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC arm-softmmu/hw/timer/omap_synctimer.o
CC hppa-softmmu/hw/core/null-machine.o
CC i386-softmmu/gdbstub.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC arm-softmmu/hw/timer/pxa2xx_timer.o
CC hppa-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC arm-softmmu/hw/timer/digic-timer.o
CC i386-softmmu/balloon.o
CC arm-softmmu/hw/timer/allwinner-a10-pit.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC i386-softmmu/ioport.o
CC arm-softmmu/hw/usb/tusb6010.o
CC hppa-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC i386-softmmu/numa.o
CC arm-softmmu/hw/usb/chipidea.o
CC i386-softmmu/qtest.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC arm-softmmu/hw/vfio/common.o
CC hppa-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC i386-softmmu/memory.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC hppa-softmmu/hw/display/virtio-gpu-pci.o
CC arm-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC hppa-softmmu/hw/display/virtio-vga.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC hppa-softmmu/hw/misc/ivshmem.o
CC i386-softmmu/dump.o
CC aarch64-softmmu/hw/usb/chipidea.o
CC arm-softmmu/hw/vfio/pci-quirks.o
CC hppa-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/vfio/common.o
CC i386-softmmu/migration/ram.o
CC hppa-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/vfio/display.o
CC hppa-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/vfio/pci.o
CC arm-softmmu/hw/vfio/platform.o
CC hppa-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/accel/accel.o
CC arm-softmmu/hw/vfio/calxeda-xgmac.o
CC hppa-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC i386-softmmu/accel/stubs/hvf-stub.o
CC hppa-softmmu/hw/scsi/vhost-scsi-common.o
CC arm-softmmu/hw/vfio/amd-xgbe.o
CC i386-softmmu/accel/stubs/whpx-stub.o
CC hppa-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/accel/stubs/kvm-stub.o
CC arm-softmmu/hw/vfio/spapr.o
CC hppa-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/vfio/display.o
CC i386-softmmu/accel/tcg/tcg-all.o
CC hppa-softmmu/hw/timer/mc146818rtc.o
CC i386-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/hw/virtio/virtio.o
CC aarch64-softmmu/hw/vfio/platform.o
CC hppa-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC arm-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC hppa-softmmu/hw/vfio/pci.o
CC arm-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC i386-softmmu/accel/tcg/tcg-runtime.o
CC arm-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC hppa-softmmu/hw/vfio/pci-quirks.o
CC i386-softmmu/accel/tcg/tcg-runtime-gvec.o
CC arm-softmmu/hw/virtio/vhost.o
CC hppa-softmmu/hw/vfio/display.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC arm-softmmu/hw/virtio/vhost-backend.o
CC i386-softmmu/accel/tcg/cpu-exec.o
CC hppa-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC i386-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/hw/virtio/vhost-user.o
CC hppa-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/accel/tcg/translate-all.o
CC hppa-softmmu/hw/virtio/virtio.o
CC arm-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC arm-softmmu/hw/arm/boot.o
CC i386-softmmu/accel/tcg/translator.o
CC hppa-softmmu/hw/virtio/virtio-balloon.o
CC arm-softmmu/hw/arm/virt.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC i386-softmmu/hw/9pfs/virtio-9p-device.o
CC hppa-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC i386-softmmu/hw/block/virtio-blk.o
CC hppa-softmmu/hw/virtio/virtio-crypto-pci.o
CC arm-softmmu/hw/arm/sysbus-fdt.o
CC arm-softmmu/hw/arm/virt-acpi-build.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/hw/block/vhost-user-blk.o
CC hppa-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/arm/boot.o
CC i386-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/arm/digic_boards.o
CC arm-softmmu/hw/arm/exynos4_boards.o
CC i386-softmmu/hw/char/virtio-serial-bus.o
CC hppa-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/arm/highbank.o
CC aarch64-softmmu/hw/arm/virt.o
CC hppa-softmmu/hw/virtio/vhost-user.o
CC i386-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/arm/integratorcp.o
CC i386-softmmu/hw/core/null-machine.o
CC hppa-softmmu/hw/virtio/vhost-vsock.o
CC arm-softmmu/hw/arm/mainstone.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC i386-softmmu/hw/display/vga.o
CC hppa-softmmu/hw/hppa/machine.o
CC arm-softmmu/hw/arm/musicpal.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC hppa-softmmu/hw/hppa/pci.o
CC arm-softmmu/hw/arm/netduino2.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC hppa-softmmu/hw/hppa/dino.o
CC i386-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC arm-softmmu/hw/arm/nseries.o
CC hppa-softmmu/target/hppa/translate.o
CC aarch64-softmmu/hw/arm/highbank.o
CC arm-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/arm/palm.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC arm-softmmu/hw/arm/gumstix.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC i386-softmmu/hw/display/virtio-gpu-pci.o
CC arm-softmmu/hw/arm/spitz.o
CC hppa-softmmu/target/hppa/helper.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC hppa-softmmu/target/hppa/cpu.o
CC i386-softmmu/hw/display/virtio-vga.o
CC hppa-softmmu/target/hppa/op_helper.o
CC arm-softmmu/hw/arm/tosa.o
CC aarch64-softmmu/hw/arm/netduino2.o
CC i386-softmmu/hw/intc/apic.o
CC arm-softmmu/hw/arm/z2.o
CC hppa-softmmu/target/hppa/gdbstub.o
CC aarch64-softmmu/hw/arm/nseries.o
CC hppa-softmmu/target/hppa/mem_helper.o
CC i386-softmmu/hw/intc/apic_common.o
CC arm-softmmu/hw/arm/realview.o
CC hppa-softmmu/target/hppa/int_helper.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/hw/intc/ioapic.o
CC hppa-softmmu/target/hppa/machine.o
CC aarch64-softmmu/hw/arm/palm.o
CC arm-softmmu/hw/arm/stellaris.o
GEN trace/generated-helpers.c
CC hppa-softmmu/trace/control-target.o
CC i386-softmmu/hw/isa/lpc_ich9.o
CC hppa-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC arm-softmmu/hw/arm/collie.o
CC i386-softmmu/hw/misc/ivshmem.o
LINK hppa-softmmu/qemu-system-hppa
CC aarch64-softmmu/hw/arm/spitz.o
CC arm-softmmu/hw/arm/vexpress.o
CC i386-softmmu/hw/misc/pvpanic.o
CC arm-softmmu/hw/arm/versatilepb.o
CC aarch64-softmmu/hw/arm/tosa.o
CC i386-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/z2.o
CC arm-softmmu/hw/arm/armv7m.o
CC i386-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/realview.o
CC arm-softmmu/hw/arm/pxa2xx.o
GEN lm32-softmmu/hmp-commands.h
GEN lm32-softmmu/hmp-commands-info.h
GEN lm32-softmmu/config-target.h
CC lm32-softmmu/exec.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC aarch64-softmmu/hw/arm/collie.o
CC arm-softmmu/hw/arm/pxa2xx_gpio.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC arm-softmmu/hw/arm/pxa2xx_pic.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC arm-softmmu/hw/arm/digic.o
CC arm-softmmu/hw/arm/omap1.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/armv7m.o
CC lm32-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC arm-softmmu/hw/arm/omap2.o
CC arm-softmmu/hw/arm/strongarm.o
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC lm32-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/arm/allwinner-a10.o
CC aarch64-softmmu/hw/arm/digic.o
CC arm-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/omap1.o
CC arm-softmmu/hw/arm/bcm2835_peripherals.o
CC arm-softmmu/hw/arm/bcm2836.o
CC arm-softmmu/hw/arm/raspi.o
CC aarch64-softmmu/hw/arm/omap2.o
CC arm-softmmu/hw/arm/stm32f205_soc.o
CC arm-softmmu/hw/arm/fsl-imx25.o
CC lm32-softmmu/tcg/tcg-op-vec.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC arm-softmmu/hw/arm/imx25_pdk.o
CC lm32-softmmu/tcg/tcg-op-gvec.o
CC arm-softmmu/hw/arm/fsl-imx31.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC arm-softmmu/hw/arm/kzm.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC arm-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC arm-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC arm-softmmu/hw/arm/aspeed_soc.o
CC lm32-softmmu/tcg/tcg-common.o
CC arm-softmmu/hw/arm/aspeed.o
CC aarch64-softmmu/hw/arm/raspi.o
CC lm32-softmmu/tcg/optimize.o
CC arm-softmmu/hw/arm/mps2.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC arm-softmmu/hw/arm/mps2-tz.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC lm32-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/arm/msf2-soc.o
CC aarch64-softmmu/hw/arm/xlnx-zcu102.o
CC arm-softmmu/hw/arm/msf2-som.o
CC arm-softmmu/hw/arm/iotkit.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC arm-softmmu/hw/arm/fsl-imx7.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
CC arm-softmmu/hw/arm/mcimx7d-sabre.o
CC aarch64-softmmu/hw/arm/kzm.o
CC arm-softmmu/target/arm/arm-semi.o
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC arm-softmmu/target/arm/machine.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC arm-softmmu/target/arm/psci.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC arm-softmmu/target/arm/arch_dump.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC arm-softmmu/target/arm/monitor.o
CC aarch64-softmmu/hw/arm/mps2.o
CC arm-softmmu/target/arm/kvm-stub.o
CC arm-softmmu/target/arm/translate.o
CC aarch64-softmmu/hw/arm/mps2-tz.o
CC aarch64-softmmu/hw/arm/msf2-soc.o
CC lm32-softmmu/disas.o
CC aarch64-softmmu/hw/arm/msf2-som.o
CC lm32-softmmu/arch_init.o
CC aarch64-softmmu/hw/arm/iotkit.o
CC lm32-softmmu/cpus.o
CC aarch64-softmmu/hw/arm/fsl-imx7.o
CC lm32-softmmu/monitor.o
CC aarch64-softmmu/hw/arm/mcimx7d-sabre.o
CC aarch64-softmmu/hw/arm/smmu-common.o
CC aarch64-softmmu/hw/arm/smmuv3.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC lm32-softmmu/gdbstub.o
CC aarch64-softmmu/target/arm/machine.o
CC aarch64-softmmu/target/arm/psci.o
CC lm32-softmmu/balloon.o
CC aarch64-softmmu/target/arm/arch_dump.o
CC lm32-softmmu/ioport.o
CC aarch64-softmmu/target/arm/monitor.o
CC lm32-softmmu/numa.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC aarch64-softmmu/target/arm/translate.o
CC lm32-softmmu/qtest.o
CC lm32-softmmu/memory.o
CC lm32-softmmu/memory_mapping.o
CC lm32-softmmu/dump.o
CC arm-softmmu/target/arm/op_helper.o
CC lm32-softmmu/migration/ram.o
CC arm-softmmu/target/arm/helper.o
CC lm32-softmmu/accel/accel.o
CC lm32-softmmu/accel/stubs/hax-stub.o
CC lm32-softmmu/accel/stubs/hvf-stub.o
CC lm32-softmmu/accel/stubs/whpx-stub.o
CC lm32-softmmu/accel/stubs/kvm-stub.o
CC lm32-softmmu/accel/tcg/tcg-all.o
CC lm32-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/target/arm/cpu.o
CC aarch64-softmmu/target/arm/op_helper.o
CC lm32-softmmu/accel/tcg/tcg-runtime.o
CC arm-softmmu/target/arm/neon_helper.o
CC lm32-softmmu/accel/tcg/tcg-runtime-gvec.o
CC aarch64-softmmu/target/arm/helper.o
CC arm-softmmu/target/arm/iwmmxt_helper.o
CC lm32-softmmu/accel/tcg/cpu-exec.o
CC lm32-softmmu/accel/tcg/cpu-exec-common.o
CC lm32-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/target/arm/vec_helper.o
CC lm32-softmmu/accel/tcg/translator.o
CC arm-softmmu/target/arm/gdbstub.o
CC lm32-softmmu/hw/core/generic-loader.o
CC arm-softmmu/target/arm/crypto_helper.o
CC lm32-softmmu/hw/core/null-machine.o
CC lm32-softmmu/hw/input/milkymist-softusb.o
CC arm-softmmu/target/arm/arm-powerctl.o
GEN trace/generated-helpers.c
CC lm32-softmmu/hw/misc/milkymist-hpdmc.o
CC arm-softmmu/trace/control-target.o
CC lm32-softmmu/hw/misc/milkymist-pfpu.o
CC arm-softmmu/gdbstub-xml.o
CC lm32-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/trace/generated-helpers.o
CC lm32-softmmu/hw/net/milkymist-minimac2.o
LINK arm-softmmu/qemu-system-arm
CC aarch64-softmmu/target/arm/cpu.o
CC lm32-softmmu/hw/net/vhost_net.o
CC lm32-softmmu/hw/net/rocker/qmp-norocker.o
CC lm32-softmmu/hw/sd/milkymist-memcard.o
CC lm32-softmmu/hw/vfio/common.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC lm32-softmmu/hw/vfio/platform.o
CC lm32-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC lm32-softmmu/hw/lm32/lm32_boards.o
CC lm32-softmmu/hw/lm32/milkymist.o
CC lm32-softmmu/target/lm32/translate.o
GEN m68k-softmmu/hmp-commands.h
GEN m68k-softmmu/hmp-commands-info.h
GEN m68k-softmmu/config-target.h
CC aarch64-softmmu/target/arm/vec_helper.o
CC m68k-softmmu/exec.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC lm32-softmmu/target/lm32/op_helper.o
CC aarch64-softmmu/target/arm/cpu64.o
CC lm32-softmmu/target/lm32/helper.o
CC aarch64-softmmu/target/arm/translate-a64.o
CC lm32-softmmu/target/lm32/cpu.o
CC lm32-softmmu/target/lm32/gdbstub.o
CC lm32-softmmu/target/lm32/lm32-semi.o
CC lm32-softmmu/target/lm32/machine.o
CC m68k-softmmu/tcg/tcg.o
GEN trace/generated-helpers.c
CC lm32-softmmu/trace/control-target.o
CC lm32-softmmu/trace/generated-helpers.o
LINK lm32-softmmu/qemu-system-lm32
CC m68k-softmmu/tcg/tcg-op.o
CC m68k-softmmu/tcg/tcg-op-vec.o
CC i386-softmmu/hw/net/vhost_net.o
CC i386-softmmu/hw/scsi/virtio-scsi.o
GEN microblazeel-softmmu/hmp-commands.h
GEN microblazeel-softmmu/hmp-commands-info.h
GEN microblazeel-softmmu/config-target.h
CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC microblazeel-softmmu/exec.o
CC i386-softmmu/hw/scsi/vhost-scsi-common.o
CC i386-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/hw/scsi/vhost-user-scsi.o
CC i386-softmmu/hw/timer/mc146818rtc.o
CC i386-softmmu/hw/vfio/common.o
CC microblazeel-softmmu/tcg/tcg.o
CC i386-softmmu/hw/vfio/pci.o
CC i386-softmmu/hw/vfio/pci-quirks.o
CC microblazeel-softmmu/tcg/tcg-op.o
CC i386-softmmu/hw/vfio/display.o
CC i386-softmmu/hw/vfio/platform.o
CC i386-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/virtio/virtio.o
CC microblazeel-softmmu/tcg/tcg-op-vec.o
CC microblazeel-softmmu/tcg/tcg-op-gvec.o
CC i386-softmmu/hw/virtio/virtio-balloon.o
CC i386-softmmu/hw/virtio/virtio-crypto.o
CC i386-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/virtio/vhost.o
CC microblazeel-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/tcg/optimize.o
CC i386-softmmu/hw/virtio/vhost-backend.o
CC microblazeel-softmmu/fpu/softfloat.o
CC i386-softmmu/hw/virtio/vhost-user.o
CC i386-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/hw/i386/multiboot.o
CC i386-softmmu/hw/i386/pc.o
CC i386-softmmu/hw/i386/pc_piix.o
CC i386-softmmu/hw/i386/pc_q35.o
CC i386-softmmu/hw/i386/pc_sysfw.o
CC i386-softmmu/hw/i386/x86-iommu.o
CC i386-softmmu/hw/i386/intel_iommu.o
CC microblazeel-softmmu/disas.o
CC microblazeel-softmmu/arch_init.o
CC microblazeel-softmmu/cpus.o
CC i386-softmmu/hw/i386/amd_iommu.o
CC microblazeel-softmmu/monitor.o
CC i386-softmmu/hw/i386/vmport.o
CC i386-softmmu/hw/i386/vmmouse.o
CC i386-softmmu/hw/i386/kvmvapic.o
CC i386-softmmu/hw/i386/acpi-build.o
CC microblazeel-softmmu/gdbstub.o
CC microblazeel-softmmu/balloon.o
CC i386-softmmu/target/i386/helper.o
CC microblazeel-softmmu/ioport.o
CC microblazeel-softmmu/numa.o
CC i386-softmmu/target/i386/cpu.o
CC microblazeel-softmmu/qtest.o
CC microblazeel-softmmu/memory.o
CC i386-softmmu/target/i386/gdbstub.o
CC i386-softmmu/target/i386/xsave_helper.o
CC i386-softmmu/target/i386/translate.o
CC microblazeel-softmmu/memory_mapping.o
CC microblazeel-softmmu/dump.o
CC microblazeel-softmmu/migration/ram.o
CC microblazeel-softmmu/accel/accel.o
CC microblazeel-softmmu/accel/stubs/hax-stub.o
CC microblazeel-softmmu/accel/stubs/hvf-stub.o
CC microblazeel-softmmu/accel/stubs/whpx-stub.o
CC microblazeel-softmmu/accel/stubs/kvm-stub.o
CC microblazeel-softmmu/accel/tcg/tcg-all.o
CC microblazeel-softmmu/accel/tcg/cputlb.o
CC i386-softmmu/target/i386/bpt_helper.o
CC i386-softmmu/target/i386/cc_helper.o
CC microblazeel-softmmu/accel/tcg/tcg-runtime.o
CC i386-softmmu/target/i386/excp_helper.o
CC microblazeel-softmmu/accel/tcg/tcg-runtime-gvec.o
CC i386-softmmu/target/i386/fpu_helper.o
CC microblazeel-softmmu/accel/tcg/cpu-exec.o
CC microblazeel-softmmu/accel/tcg/cpu-exec-common.o
CC microblazeel-softmmu/accel/tcg/translate-all.o
CC microblazeel-softmmu/accel/tcg/translator.o
CC microblazeel-softmmu/hw/core/generic-loader.o
CC microblazeel-softmmu/hw/core/null-machine.o
CC i386-softmmu/target/i386/int_helper.o
CC microblazeel-softmmu/hw/dma/xlnx_dpdma.o
CC i386-softmmu/target/i386/mem_helper.o
CC microblazeel-softmmu/hw/misc/mmio_interface.o
CC i386-softmmu/target/i386/misc_helper.o
CC microblazeel-softmmu/hw/net/xilinx_ethlite.o
CC microblazeel-softmmu/hw/net/vhost_net.o
CC i386-softmmu/target/i386/mpx_helper.o
CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o
CC microblazeel-softmmu/hw/vfio/common.o
CC i386-softmmu/target/i386/seg_helper.o
CC microblazeel-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/hw/vfio/spapr.o
CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC microblazeel-softmmu/hw/microblaze/xlnx-zynqmp-pmu.o
CC i386-softmmu/target/i386/smm_helper.o
CC microblazeel-softmmu/hw/microblaze/boot.o
CC i386-softmmu/target/i386/svm_helper.o
CC microblazeel-softmmu/target/microblaze/translate.o
CC i386-softmmu/target/i386/machine.o
CC i386-softmmu/target/i386/arch_memory_mapping.o
CC i386-softmmu/target/i386/arch_dump.o
CC i386-softmmu/target/i386/monitor.o
CC microblazeel-softmmu/target/microblaze/op_helper.o
CC i386-softmmu/target/i386/kvm-stub.o
CC microblazeel-softmmu/target/microblaze/helper.o
CC i386-softmmu/target/i386/sev-stub.o
CC microblazeel-softmmu/target/microblaze/cpu.o
GEN trace/generated-helpers.c
CC i386-softmmu/trace/control-target.o
CC microblazeel-softmmu/target/microblaze/gdbstub.o
CC i386-softmmu/gdbstub-xml.o
CC microblazeel-softmmu/target/microblaze/mmu.o
CC i386-softmmu/trace/generated-helpers.o
GEN trace/generated-helpers.c
LINK i386-softmmu/qemu-system-i386
CC microblazeel-softmmu/trace/control-target.o
CC microblazeel-softmmu/trace/generated-helpers.o
LINK microblazeel-softmmu/qemu-system-microblazeel
CC m68k-softmmu/tcg/tcg-op-gvec.o
GEN microblaze-softmmu/hmp-commands.h
GEN microblaze-softmmu/hmp-commands-info.h
GEN microblaze-softmmu/config-target.h
CC microblaze-softmmu/exec.o
GEN mips64el-softmmu/hmp-commands.h
GEN mips64el-softmmu/hmp-commands-info.h
GEN mips64el-softmmu/config-target.h
CC mips64el-softmmu/exec.o
CC m68k-softmmu/tcg/tcg-common.o
CC m68k-softmmu/tcg/optimize.o
CC microblaze-softmmu/tcg/tcg.o
CC m68k-softmmu/fpu/softfloat.o
CC mips64el-softmmu/tcg/tcg.o
CC microblaze-softmmu/tcg/tcg-op.o
CC mips64el-softmmu/tcg/tcg-op.o
CC m68k-softmmu/disas.o
CC microblaze-softmmu/tcg/tcg-op-vec.o
GEN m68k-softmmu/gdbstub-xml.c
CC m68k-softmmu/arch_init.o
CC microblaze-softmmu/tcg/tcg-op-gvec.o
CC m68k-softmmu/cpus.o
CC mips64el-softmmu/tcg/tcg-op-vec.o
CC m68k-softmmu/monitor.o
CC mips64el-softmmu/tcg/tcg-op-gvec.o
CC microblaze-softmmu/tcg/tcg-common.o
CC microblaze-softmmu/tcg/optimize.o
CC m68k-softmmu/gdbstub.o
CC microblaze-softmmu/fpu/softfloat.o
CC m68k-softmmu/balloon.o
CC m68k-softmmu/ioport.o
CC mips64el-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/tcg/optimize.o
CC m68k-softmmu/numa.o
CC m68k-softmmu/qtest.o
CC m68k-softmmu/memory.o
CC mips64el-softmmu/fpu/softfloat.o
CC m68k-softmmu/memory_mapping.o
CC m68k-softmmu/dump.o
CC microblaze-softmmu/disas.o
CC m68k-softmmu/migration/ram.o
CC microblaze-softmmu/arch_init.o
CC microblaze-softmmu/cpus.o
CC microblaze-softmmu/monitor.o
CC m68k-softmmu/accel/accel.o
CC m68k-softmmu/accel/stubs/hax-stub.o
CC m68k-softmmu/accel/stubs/hvf-stub.o
CC m68k-softmmu/accel/stubs/whpx-stub.o
CC m68k-softmmu/accel/stubs/kvm-stub.o
CC mips64el-softmmu/disas.o
CC m68k-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/arch_init.o
CC m68k-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/cpus.o
CC microblaze-softmmu/gdbstub.o
CC mips64el-softmmu/monitor.o
CC microblaze-softmmu/balloon.o
CC microblaze-softmmu/ioport.o
CC microblaze-softmmu/numa.o
CC microblaze-softmmu/qtest.o
CC microblaze-softmmu/memory.o
CC mips64el-softmmu/gdbstub.o
CC m68k-softmmu/accel/tcg/tcg-runtime.o
CC mips64el-softmmu/balloon.o
CC m68k-softmmu/accel/tcg/tcg-runtime-gvec.o
CC mips64el-softmmu/ioport.o
CC microblaze-softmmu/memory_mapping.o
CC mips64el-softmmu/numa.o
CC microblaze-softmmu/dump.o
CC mips64el-softmmu/qtest.o
CC m68k-softmmu/accel/tcg/cpu-exec.o
CC mips64el-softmmu/memory.o
CC microblaze-softmmu/migration/ram.o
CC m68k-softmmu/accel/tcg/cpu-exec-common.o
CC m68k-softmmu/accel/tcg/translate-all.o
CC m68k-softmmu/accel/tcg/translator.o
CC microblaze-softmmu/accel/accel.o
CC mips64el-softmmu/memory_mapping.o
CC m68k-softmmu/hw/char/mcf_uart.o
CC microblaze-softmmu/accel/stubs/hax-stub.o
CC mips64el-softmmu/dump.o
CC microblaze-softmmu/accel/stubs/hvf-stub.o
CC m68k-softmmu/hw/core/generic-loader.o
CC microblaze-softmmu/accel/stubs/whpx-stub.o
CC m68k-softmmu/hw/core/null-machine.o
CC microblaze-softmmu/accel/stubs/kvm-stub.o
CC m68k-softmmu/hw/misc/mmio_interface.o
CC microblaze-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/migration/ram.o
CC m68k-softmmu/hw/net/mcf_fec.o
CC microblaze-softmmu/accel/tcg/cputlb.o
CC m68k-softmmu/hw/net/vhost_net.o
CC m68k-softmmu/hw/net/rocker/qmp-norocker.o
CC m68k-softmmu/hw/vfio/common.o
CC mips64el-softmmu/accel/accel.o
CC mips64el-softmmu/accel/stubs/hax-stub.o
CC m68k-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/accel/stubs/hvf-stub.o
CC mips64el-softmmu/accel/stubs/whpx-stub.o
CC mips64el-softmmu/accel/stubs/kvm-stub.o
CC m68k-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/accel/tcg/cputlb.o
CC m68k-softmmu/hw/m68k/an5206.o
CC m68k-softmmu/hw/m68k/mcf5208.o
CC m68k-softmmu/hw/m68k/mcf5206.o
CC microblaze-softmmu/accel/tcg/tcg-runtime.o
CC m68k-softmmu/hw/m68k/mcf_intc.o
CC microblaze-softmmu/accel/tcg/tcg-runtime-gvec.o
CC m68k-softmmu/target/m68k/m68k-semi.o
CC m68k-softmmu/target/m68k/translate.o
CC microblaze-softmmu/accel/tcg/cpu-exec.o
CC microblaze-softmmu/accel/tcg/cpu-exec-common.o
CC microblaze-softmmu/accel/tcg/translate-all.o
CC mips64el-softmmu/accel/tcg/tcg-runtime.o
CC microblaze-softmmu/accel/tcg/translator.o
CC mips64el-softmmu/accel/tcg/tcg-runtime-gvec.o
CC microblaze-softmmu/hw/core/generic-loader.o
CC microblaze-softmmu/hw/core/null-machine.o
CC microblaze-softmmu/hw/dma/xlnx_dpdma.o
CC microblaze-softmmu/hw/misc/mmio_interface.o
CC mips64el-softmmu/accel/tcg/cpu-exec.o
CC microblaze-softmmu/hw/net/xilinx_ethlite.o
CC m68k-softmmu/target/m68k/op_helper.o
CC microblaze-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/accel/tcg/cpu-exec-common.o
CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o
CC mips64el-softmmu/accel/tcg/translate-all.o
CC microblaze-softmmu/hw/vfio/common.o
CC m68k-softmmu/target/m68k/helper.o
CC mips64el-softmmu/accel/tcg/translator.o
CC microblaze-softmmu/hw/vfio/platform.o
CC m68k-softmmu/target/m68k/cpu.o
CC m68k-softmmu/target/m68k/fpu_helper.o
CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o
CC microblaze-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/hw/block/virtio-blk.o
CC m68k-softmmu/target/m68k/softfloat.o
CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64el-softmmu/hw/block/vhost-user-blk.o
CC microblaze-softmmu/hw/microblaze/xlnx-zynqmp-pmu.o
CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o
CC microblaze-softmmu/hw/microblaze/boot.o
CC mips64el-softmmu/hw/char/virtio-serial-bus.o
CC microblaze-softmmu/target/microblaze/translate.o
CC m68k-softmmu/target/m68k/gdbstub.o
CC m68k-softmmu/target/m68k/monitor.o
CC mips64el-softmmu/hw/core/generic-loader.o
GEN trace/generated-helpers.c
CC m68k-softmmu/trace/control-target.o
CC mips64el-softmmu/hw/core/null-machine.o
CC m68k-softmmu/gdbstub-xml.o
CC mips64el-softmmu/hw/display/vga.o
CC m68k-softmmu/trace/generated-helpers.o
LINK m68k-softmmu/qemu-system-m68k
CC microblaze-softmmu/target/microblaze/op_helper.o
CC microblaze-softmmu/target/microblaze/helper.o
CC mips64el-softmmu/hw/display/virtio-gpu.o
CC microblaze-softmmu/target/microblaze/cpu.o
CC microblaze-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/target/microblaze/mmu.o
GEN trace/generated-helpers.c
CC microblaze-softmmu/trace/control-target.o
CC mips64el-softmmu/hw/display/virtio-gpu-3d.o
CC microblaze-softmmu/trace/generated-helpers.o
LINK microblaze-softmmu/qemu-system-microblaze
GEN mips64-softmmu/hmp-commands.h
GEN mips64-softmmu/hmp-commands-info.h
GEN mips64-softmmu/config-target.h
CC mips64-softmmu/exec.o
CC mips64el-softmmu/hw/display/virtio-gpu-pci.o
CC mips64el-softmmu/hw/intc/mips_gic.o
CC mips64el-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC mips64el-softmmu/hw/misc/mips_cmgcr.o
CC mips64el-softmmu/hw/misc/mips_cpc.o
GEN mipsel-softmmu/hmp-commands.h
CC aarch64-softmmu/target/arm/gdbstub64.o
GEN mipsel-softmmu/hmp-commands-info.h
CC mips64-softmmu/tcg/tcg.o
GEN mipsel-softmmu/config-target.h
CC mipsel-softmmu/exec.o
CC mips64el-softmmu/hw/misc/mips_itu.o
CC aarch64-softmmu/target/arm/crypto_helper.o
CC mips64el-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/target/arm/arm-powerctl.o
CC mips64el-softmmu/hw/net/virtio-net.o
GEN aarch64-softmmu/target/arm/decode-sve.inc.c
CC aarch64-softmmu/target/arm/sve_helper.o
CC mipsel-softmmu/tcg/tcg.o
CC mips64el-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/hw/scsi/virtio-scsi.o
CC mips64-softmmu/tcg/tcg-op.o
CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64el-softmmu/hw/scsi/vhost-scsi.o
CC mipsel-softmmu/tcg/tcg-op.o
CC mips64el-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64-softmmu/tcg/tcg-op-vec.o
CC mips64el-softmmu/hw/timer/mips_gictimer.o
CC mips64el-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/tcg/tcg-op-gvec.o
CC mips64el-softmmu/hw/vfio/common.o
CC mipsel-softmmu/tcg/tcg-op-vec.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC mipsel-softmmu/tcg/tcg-op-gvec.o
CC mips64el-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/gdbstub-xml.o
CC aarch64-softmmu/target/arm/translate-sve.o
CC mips64-softmmu/tcg/tcg-common.o
CC mips64-softmmu/tcg/optimize.o
CC mips64el-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/hw/vfio/display.o
CC mipsel-softmmu/tcg/optimize.o
CC mips64-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/virtio/virtio.o
CC mips64el-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/hw/virtio/virtio-crypto.o
CC mips64-softmmu/disas.o
CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64-softmmu/arch_init.o
CC mipsel-softmmu/disas.o
CC mips64-softmmu/cpus.o
CC mips64el-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/arch_init.o
CC mipsel-softmmu/cpus.o
CC mips64-softmmu/monitor.o
CC mips64el-softmmu/hw/virtio/vhost-backend.o
CC mipsel-softmmu/monitor.o
CC aarch64-softmmu/trace/generated-helpers.o
CC mips64el-softmmu/hw/virtio/vhost-user.o
LINK aarch64-softmmu/qemu-system-aarch64
CC mips64-softmmu/gdbstub.o
CC mips64el-softmmu/hw/virtio/vhost-vsock.o
CC mips64el-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/balloon.o
CC mipsel-softmmu/gdbstub.o
CC mips64-softmmu/ioport.o
CC mips64el-softmmu/hw/mips/mips_malta.o
CC mips64-softmmu/numa.o
CC mipsel-softmmu/balloon.o
CC mips64el-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/ioport.o
CC mips64-softmmu/qtest.o
CC mips64el-softmmu/hw/mips/addr.o
CC mipsel-softmmu/numa.o
CC mips64el-softmmu/hw/mips/mips_int.o
CC mipsel-softmmu/qtest.o
CC mips64el-softmmu/hw/mips/mips_jazz.o
GEN mips-softmmu/hmp-commands.h
GEN mips-softmmu/hmp-commands-info.h
GEN mips-softmmu/config-target.h
CC mips-softmmu/exec.o
CC mips64el-softmmu/hw/mips/mips_fulong2e.o
CC mipsel-softmmu/memory.o
CC mips64el-softmmu/hw/mips/gt64xxx_pci.o
CC mips64el-softmmu/hw/mips/cps.o
CC mips64el-softmmu/hw/mips/boston.o
CC mips64el-softmmu/target/mips/translate.o
CC mipsel-softmmu/memory_mapping.o
CC mipsel-softmmu/dump.o
CC mips-softmmu/tcg/tcg.o
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c: In function ‘decode_opc_special_r6’:
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17437:5: error: duplicate case value
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17374:5: note: previously used here
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17438:5: error: duplicate case value
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17375:5: note: previously used here
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17439:5: error: duplicate case value
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17435:5: note: previously used here
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17440:5: error: duplicate case value
case OPC_DMULTU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17436:5: note: previously used here
case OPC_DMULTU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c: In function ‘decode_opc_special_legacy’:
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17524:5: error: duplicate case value
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17517:5: note: previously used here
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17525:5: error: duplicate case value
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17518:5: note: previously used here
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17526:5: error: duplicate case value
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17522:5: note: previously used here
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17527:5: error: duplicate case value
case OPC_DMULTU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17523:5: note: previously used here
case OPC_DMULTU:
^~~~
make[1]: *** [/var/tmp/patchew-tester-tmp-uz7tgcdy/src/rules.mak:69: target/mips/translate.o] Error 1
make: *** [Makefile:481: subdir-mips64el-softmmu] Error 2
make: *** Waiting for unfinished jobs....
CC mips64-softmmu/memory.o
CC mips-softmmu/tcg/tcg-op.o
CC mipsel-softmmu/migration/ram.o
CC mips64-softmmu/memory_mapping.o
CC mipsel-softmmu/accel/accel.o
CC mips64-softmmu/dump.o
CC mipsel-softmmu/accel/stubs/hax-stub.o
CC mips-softmmu/tcg/tcg-op-vec.o
CC mips64-softmmu/migration/ram.o
CC mipsel-softmmu/accel/stubs/hvf-stub.o
CC mips-softmmu/tcg/tcg-op-gvec.o
CC mips64-softmmu/accel/accel.o
CC mipsel-softmmu/accel/stubs/whpx-stub.o
CC mipsel-softmmu/accel/stubs/kvm-stub.o
CC mipsel-softmmu/accel/tcg/tcg-all.o
CC mipsel-softmmu/accel/tcg/cputlb.o
CC mips-softmmu/tcg/tcg-common.o
CC mipsel-softmmu/accel/tcg/tcg-runtime.o
CC mipsel-softmmu/accel/tcg/tcg-runtime-gvec.o
CC mips-softmmu/tcg/optimize.o
CC mips64-softmmu/accel/stubs/hax-stub.o
CC mips-softmmu/fpu/softfloat.o
CC mips64-softmmu/accel/stubs/hvf-stub.o
CC mips64-softmmu/accel/stubs/whpx-stub.o
CC mips64-softmmu/accel/stubs/kvm-stub.o
CC mips64-softmmu/accel/tcg/tcg-all.o
CC mipsel-softmmu/accel/tcg/cpu-exec.o
CC mips-softmmu/disas.o
CC mips64-softmmu/accel/tcg/cputlb.o
CC mips-softmmu/arch_init.o
CC mipsel-softmmu/accel/tcg/cpu-exec-common.o
CC mips-softmmu/cpus.o
CC mipsel-softmmu/accel/tcg/translate-all.o
CC mips64-softmmu/accel/tcg/tcg-runtime.o
CC mips-softmmu/monitor.o
CC mipsel-softmmu/accel/tcg/translator.o
CC mips-softmmu/gdbstub.o
CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC mips-softmmu/balloon.o
CC mipsel-softmmu/hw/block/virtio-blk.o
CC mips-softmmu/ioport.o
CC mips64-softmmu/accel/tcg/cpu-exec.o
CC mips64-softmmu/accel/tcg/cpu-exec-common.o
CC mips-softmmu/numa.o
CC mipsel-softmmu/hw/block/vhost-user-blk.o
CC mips64-softmmu/accel/tcg/translate-all.o
CC mips-softmmu/qtest.o
CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/accel/tcg/translator.o
CC mips-softmmu/memory.o
CC mips-softmmu/memory_mapping.o
CC mipsel-softmmu/hw/char/virtio-serial-bus.o
CC mips-softmmu/dump.o
CC mipsel-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/hw/core/null-machine.o
CC mipsel-softmmu/hw/display/vga.o
CC mipsel-softmmu/hw/display/virtio-gpu.o
CC mips-softmmu/migration/ram.o
CC mips64-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/block/vhost-user-blk.o
CC mips64-softmmu/hw/block/dataplane/virtio-blk.o
CC mips-softmmu/accel/accel.o
CC mips64-softmmu/hw/char/virtio-serial-bus.o
CC mips-softmmu/accel/stubs/hax-stub.o
CC mips-softmmu/accel/stubs/hvf-stub.o
CC mips-softmmu/accel/stubs/whpx-stub.o
CC mips64-softmmu/hw/core/generic-loader.o
CC mips-softmmu/accel/stubs/kvm-stub.o
CC mipsel-softmmu/hw/display/virtio-gpu-pci.o
CC mips-softmmu/accel/tcg/tcg-all.o
CC mips64-softmmu/hw/core/null-machine.o
CC mips-softmmu/accel/tcg/cputlb.o
CC mips-softmmu/accel/tcg/tcg-runtime.o
CC mipsel-softmmu/hw/intc/mips_gic.o
CC mipsel-softmmu/hw/misc/ivshmem.o
CC mips-softmmu/accel/tcg/tcg-runtime-gvec.o
CC mipsel-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/hw/misc/mips_cpc.o
CC mipsel-softmmu/hw/misc/mips_itu.o
CC mipsel-softmmu/hw/misc/mmio_interface.o
CC mipsel-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/hw/net/vhost_net.o
CC mips64-softmmu/hw/display/vga.o
CC mipsel-softmmu/hw/scsi/virtio-scsi.o
CC mips64-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64-softmmu/hw/display/virtio-gpu-3d.o
CC mipsel-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64-softmmu/hw/display/virtio-gpu-pci.o
CC mips64-softmmu/hw/intc/mips_gic.o
CC mipsel-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64-softmmu/hw/misc/mips_cmgcr.o
CC mips64-softmmu/hw/misc/mips_cpc.o
CC mips-softmmu/accel/tcg/cpu-exec.o
CC mips64-softmmu/hw/misc/mips_itu.o
CC mips64-softmmu/hw/misc/mmio_interface.o
CC mips64-softmmu/hw/net/virtio-net.o
CC mips64-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/timer/mips_gictimer.o
CC mips64-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mipsel-softmmu/hw/vfio/common.o
CC mips64-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64-softmmu/hw/scsi/vhost-scsi.o
CC mipsel-softmmu/hw/vfio/pci.o
CC mips64-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/hw/vfio/display.o
CC mips-softmmu/accel/tcg/cpu-exec-common.o
CC mips-softmmu/accel/tcg/translate-all.o
CC mips-softmmu/accel/tcg/translator.o
CC mips-softmmu/hw/9pfs/virtio-9p-device.o
CC mipsel-softmmu/hw/vfio/platform.o
CC mips-softmmu/hw/block/virtio-blk.o
CC mips-softmmu/hw/block/vhost-user-blk.o
CC mipsel-softmmu/hw/vfio/spapr.o
CC mips-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/hw/virtio/virtio.o
CC mipsel-softmmu/hw/virtio/virtio-balloon.o
CC mips64-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/hw/char/virtio-serial-bus.o
CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/hw/virtio/vhost.o
CC mips-softmmu/hw/core/null-machine.o
CC mips-softmmu/hw/display/vga.o
CC mipsel-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/hw/display/virtio-gpu-3d.o
CC mips-softmmu/hw/display/virtio-gpu-pci.o
CC mips-softmmu/hw/intc/mips_gic.o
CC mips-softmmu/hw/misc/ivshmem.o
CC mips-softmmu/hw/misc/mips_cmgcr.o
CC mips-softmmu/hw/misc/mips_cpc.o
CC mips-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/hw/misc/mmio_interface.o
CC mips-softmmu/hw/net/virtio-net.o
CC mips-softmmu/hw/net/vhost_net.o
CC mips-softmmu/hw/scsi/virtio-scsi.o
CC mips-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips-softmmu/hw/scsi/vhost-scsi-common.o
CC mips-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/hw/scsi/vhost-user-scsi.o
CC mipsel-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/hw/timer/mips_gictimer.o
CC mips-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/hw/vfio/common.o
CC mipsel-softmmu/hw/mips/mips_malta.o
CC mipsel-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/hw/mips/addr.o
CC mips-softmmu/hw/vfio/pci.o
CC mips-softmmu/hw/vfio/pci-quirks.o
CC mips64-softmmu/hw/vfio/common.o
CC mips64-softmmu/hw/vfio/pci.o
CC mips64-softmmu/hw/vfio/pci-quirks.o
CC mips-softmmu/hw/vfio/display.o
CC mips-softmmu/hw/vfio/platform.o
CC mips64-softmmu/hw/vfio/display.o
CC mips-softmmu/hw/vfio/spapr.o
CC mips64-softmmu/hw/vfio/platform.o
CC mips64-softmmu/hw/vfio/spapr.o
CC mips-softmmu/hw/virtio/virtio.o
CC mips64-softmmu/hw/virtio/virtio.o
CC mips-softmmu/hw/virtio/virtio-balloon.o
CC mips-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/virtio/vhost.o
CC mips-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/hw/mips/mips_malta.o
CC mips-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/mips/addr.o
CC mips-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/mips/gt64xxx_pci.o
CC mips-softmmu/hw/mips/cps.o
CC mipsel-softmmu/hw/mips/mips_int.o
CC mipsel-softmmu/hw/mips/gt64xxx_pci.o
CC mipsel-softmmu/hw/mips/cps.o
CC mipsel-softmmu/target/mips/translate.o
CC mips64-softmmu/hw/virtio/virtio-balloon.o
CC mipsel-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/target/mips/op_helper.o
CC mips-softmmu/target/mips/translate.o
CC mipsel-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/target/mips/dsp_helper.o
CC mips-softmmu/target/mips/op_helper.o
CC mipsel-softmmu/target/mips/helper.o
CC mips-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/target/mips/helper.o
CC mips-softmmu/target/mips/cpu.o
CC mips-softmmu/target/mips/gdbstub.o
CC mips-softmmu/target/mips/msa_helper.o
CC mips-softmmu/target/mips/mips-semi.o
CC mips-softmmu/target/mips/machine.o
CC mips-softmmu/target/mips/cp0_timer.o
GEN trace/generated-helpers.c
CC mips-softmmu/trace/control-target.o
CC mips-softmmu/trace/generated-helpers.o
CC mipsel-softmmu/target/mips/cpu.o
CC mipsel-softmmu/target/mips/gdbstub.o
CC mipsel-softmmu/target/mips/msa_helper.o
CC mipsel-softmmu/target/mips/mips-semi.o
CC mipsel-softmmu/target/mips/machine.o
CC mipsel-softmmu/target/mips/cp0_timer.o
GEN trace/generated-helpers.c
CC mipsel-softmmu/trace/control-target.o
CC mipsel-softmmu/trace/generated-helpers.o
CC mips64-softmmu/hw/virtio/virtio-crypto.o
CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o
LINK mips-softmmu/qemu-system-mips
CC mips64-softmmu/hw/virtio/vhost.o
CC mips64-softmmu/hw/virtio/vhost-backend.o
CC mips64-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/hw/mips/mips_malta.o
CC mips64-softmmu/hw/mips/mips_mipssim.o
CC mips64-softmmu/hw/mips/addr.o
LINK mipsel-softmmu/qemu-system-mipsel
CC mips64-softmmu/hw/mips/mips_int.o
CC mips64-softmmu/hw/mips/mips_jazz.o
CC mips64-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/hw/mips/cps.o
CC mips64-softmmu/target/mips/translate.o
CC mips64-softmmu/target/mips/dsp_helper.o
CC mips64-softmmu/target/mips/op_helper.o
CC mips64-softmmu/target/mips/lmi_helper.o
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c: In function ‘decode_opc_special_r6’:
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17437:5: error: duplicate case value
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17374:5: note: previously used here
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17438:5: error: duplicate case value
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17375:5: note: previously used here
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17439:5: error: duplicate case value
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17435:5: note: previously used here
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17440:5: error: duplicate case value
case OPC_DMULTU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17436:5: note: previously used here
case OPC_DMULTU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c: In function ‘decode_opc_special_legacy’:
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17524:5: error: duplicate case value
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17517:5: note: previously used here
case OPC_DIV:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17525:5: error: duplicate case value
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17518:5: note: previously used here
case OPC_DIVU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17526:5: error: duplicate case value
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17522:5: note: previously used here
case OPC_DMULT:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17527:5: error: duplicate case value
case OPC_DMULTU:
^~~~
/var/tmp/patchew-tester-tmp-uz7tgcdy/src/target/mips/translate.c:17523:5: note: previously used here
case OPC_DMULTU:
^~~~
make[1]: *** [/var/tmp/patchew-tester-tmp-uz7tgcdy/src/rules.mak:69: target/mips/translate.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:481: subdir-mips64-softmmu] Error 2
=== OUTPUT END ===
Test command exited with code: 2
---
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