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* [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines
@ 2018-07-06 17:15 Chris Wilson
  2018-07-06 17:52 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 7+ messages in thread
From: Chris Wilson @ 2018-07-06 17:15 UTC (permalink / raw)
  To: intel-gfx

Older machines do not have the 128-byte tile width format for
I915_TILING_Y and so we must adapt our reference swizzle.

Testcase: igt/drv_selftest/live_objects #gdg
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/i915_gem_object.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
index 6fe71865b710..8a35d2f70671 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
@@ -171,7 +171,7 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
 		v += x;
 	} else {
 		const unsigned int ytile_span = 16;
-		const unsigned int ytile_height = 32 * ytile_span;
+		const unsigned int ytile_height = tile->height * ytile_span;
 
 		v += y * ytile_span;
 		v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
-- 
2.18.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/selftests: Adjust y-tiling height for older machines
  2018-07-06 17:15 [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines Chris Wilson
@ 2018-07-06 17:52 ` Patchwork
  2018-07-06 20:27 ` [PATCH] " Rodrigo Vivi
  2018-07-07 17:40 ` ✗ Fi.CI.IGT: failure for " Patchwork
  2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-06 17:52 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/selftests: Adjust y-tiling height for older machines
URL   : https://patchwork.freedesktop.org/series/46084/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4448 -> Patchwork_9573 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/46084/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9573 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_frontbuffer_tracking@basic:
      fi-skl-guc:         NOTRUN -> FAIL (fdo#103167)

    
    ==== Possible fixes ====

    igt@kms_flip@basic-flip-vs-dpms:
      fi-skl-6700hq:      DMESG-WARN (fdo#105998) -> PASS

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       DMESG-FAIL (fdo#106103, fdo#102614) -> PASS

    
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (46 -> 42) ==

  Additional (1): fi-skl-guc 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4448 -> Patchwork_9573

  CI_DRM_4448: e094950bd5b5767bab1d2a5c259635dc6091f8cc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4543: 366eed37c7c71217e1cb1f3be5e26358a41f0001 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9573: f10fe0a76a017d916a200eab03aa5a18c46cde4c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

f10fe0a76a01 drm/i915/selftests: Adjust y-tiling height for older machines

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9573/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines
  2018-07-06 17:15 [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines Chris Wilson
  2018-07-06 17:52 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-07-06 20:27 ` Rodrigo Vivi
  2018-07-06 20:39   ` Chris Wilson
  2018-07-07 17:40 ` ✗ Fi.CI.IGT: failure for " Patchwork
  2 siblings, 1 reply; 7+ messages in thread
From: Rodrigo Vivi @ 2018-07-06 20:27 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

On Fri, Jul 06, 2018 at 06:15:37PM +0100, Chris Wilson wrote:
> Older machines do not have the 128-byte tile width format for
> I915_TILING_Y and so we must adapt our reference swizzle.
> 
> Testcase: igt/drv_selftest/live_objects #gdg

The change below itself makes sense to me, but I'm trying to understand
where this came from....

Looking to https://intel-gfx-ci.01.org/tree/drm-tip/igt@drv_selftest@live_objects.html
is this related to issues on fi-gdg-551?

Or is this related to that APL bugzilla entry?

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/selftests/i915_gem_object.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> index 6fe71865b710..8a35d2f70671 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> @@ -171,7 +171,7 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
>  		v += x;
>  	} else {
>  		const unsigned int ytile_span = 16;

could we also figure this value from somewhere else instead of
leaving it hardcoded for all platforms here?

> -		const unsigned int ytile_height = 32 * ytile_span;
> +		const unsigned int ytile_height = tile->height * ytile_span;
>  
>  		v += y * ytile_span;
>  		v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
> -- 
> 2.18.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines
  2018-07-06 20:27 ` [PATCH] " Rodrigo Vivi
@ 2018-07-06 20:39   ` Chris Wilson
  2018-07-06 20:55     ` Rodrigo Vivi
  0 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2018-07-06 20:39 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

Quoting Rodrigo Vivi (2018-07-06 21:27:52)
> On Fri, Jul 06, 2018 at 06:15:37PM +0100, Chris Wilson wrote:
> > Older machines do not have the 128-byte tile width format for
> > I915_TILING_Y and so we must adapt our reference swizzle.
> > 
> > Testcase: igt/drv_selftest/live_objects #gdg
> 
> The change below itself makes sense to me, but I'm trying to understand
> where this came from....

The result doesn't look right, so scrap it.
 
> Looking to https://intel-gfx-ci.01.org/tree/drm-tip/igt@drv_selftest@live_objects.html
> is this related to issues on fi-gdg-551?

Would only apply to gdg in the farm.
 
> Or is this related to that APL bugzilla entry?

Which?
 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/selftests/i915_gem_object.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > index 6fe71865b710..8a35d2f70671 100644
> > --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > @@ -171,7 +171,7 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
> >               v += x;
> >       } else {
> >               const unsigned int ytile_span = 16;
> 
> could we also figure this value from somewhere else instead of
> leaving it hardcoded for all platforms here?

The only place where manual detiling is used inside the kernel. And if
we were, it would be a lot of specialised code, where obfuscation of
magic macros is unlikely to help (careful handling of cachelines being
at the forefront). Interesting question as to whether we do provide a
bounce buffer mmap to replace GTT mmap? Just say no.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines
  2018-07-06 20:39   ` Chris Wilson
@ 2018-07-06 20:55     ` Rodrigo Vivi
  2018-07-06 20:59       ` Chris Wilson
  0 siblings, 1 reply; 7+ messages in thread
From: Rodrigo Vivi @ 2018-07-06 20:55 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

On Fri, Jul 06, 2018 at 09:39:14PM +0100, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2018-07-06 21:27:52)
> > On Fri, Jul 06, 2018 at 06:15:37PM +0100, Chris Wilson wrote:
> > > Older machines do not have the 128-byte tile width format for
> > > I915_TILING_Y and so we must adapt our reference swizzle.
> > > 
> > > Testcase: igt/drv_selftest/live_objects #gdg
> > 
> > The change below itself makes sense to me, but I'm trying to understand
> > where this came from....
> 
> The result doesn't look right, so scrap it.
>  
> > Looking to https://intel-gfx-ci.01.org/tree/drm-tip/igt@drv_selftest@live_objects.html
> > is this related to issues on fi-gdg-551?
> 
> Would only apply to gdg in the farm.
>  
> > Or is this related to that APL bugzilla entry?

that flash of a moment when I wondered you could be actually targeting this:
https://bugs.freedesktop.org/show_bug.cgi?id=107113


> 
> Which?
>  
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > ---
> > >  drivers/gpu/drm/i915/selftests/i915_gem_object.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > > index 6fe71865b710..8a35d2f70671 100644
> > > --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > > @@ -171,7 +171,7 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
> > >               v += x;
> > >       } else {
> > >               const unsigned int ytile_span = 16;
> > 
> > could we also figure this value from somewhere else instead of
> > leaving it hardcoded for all platforms here?
> 
> The only place where manual detiling is used inside the kernel. And if
> we were, it would be a lot of specialised code, where obfuscation of
> magic macros is unlikely to help (careful handling of cachelines being
> at the forefront). Interesting question as to whether we do provide a
> bounce buffer mmap to replace GTT mmap? Just say no.
> -Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines
  2018-07-06 20:55     ` Rodrigo Vivi
@ 2018-07-06 20:59       ` Chris Wilson
  0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2018-07-06 20:59 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

Quoting Rodrigo Vivi (2018-07-06 21:55:37)
> On Fri, Jul 06, 2018 at 09:39:14PM +0100, Chris Wilson wrote:
> > Quoting Rodrigo Vivi (2018-07-06 21:27:52)
> > > On Fri, Jul 06, 2018 at 06:15:37PM +0100, Chris Wilson wrote:
> > > > Older machines do not have the 128-byte tile width format for
> > > > I915_TILING_Y and so we must adapt our reference swizzle.
> > > > 
> > > > Testcase: igt/drv_selftest/live_objects #gdg
> > > 
> > > The change below itself makes sense to me, but I'm trying to understand
> > > where this came from....
> > 
> > The result doesn't look right, so scrap it.
> >  
> > > Looking to https://intel-gfx-ci.01.org/tree/drm-tip/igt@drv_selftest@live_objects.html
> > > is this related to issues on fi-gdg-551?
> > 
> > Would only apply to gdg in the farm.
> >  
> > > Or is this related to that APL bugzilla entry?
> 
> that flash of a moment when I wondered you could be actually targeting this:
> https://bugs.freedesktop.org/show_bug.cgi?id=107113

Ah, totally unrelated problem :)

Fwiw, I can reproduce this on my i915gm so hopefully should be able to
resolve it without spamming the lists.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* ✗ Fi.CI.IGT: failure for drm/i915/selftests: Adjust y-tiling height for older machines
  2018-07-06 17:15 [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines Chris Wilson
  2018-07-06 17:52 ` ✓ Fi.CI.BAT: success for " Patchwork
  2018-07-06 20:27 ` [PATCH] " Rodrigo Vivi
@ 2018-07-07 17:40 ` Patchwork
  2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-07 17:40 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/selftests: Adjust y-tiling height for older machines
URL   : https://patchwork.freedesktop.org/series/46084/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4448_full -> Patchwork_9573_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_9573_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9573_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9573_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_universal_plane@cursor-fb-leak-pipe-b:
      shard-apl:          PASS -> FAIL

    
    ==== Warnings ====

    igt@gem_exec_schedule@deep-bsd1:
      shard-kbl:          PASS -> SKIP +1

    igt@gem_exec_schedule@deep-bsd2:
      shard-kbl:          SKIP -> PASS +3

    
== Known issues ==

  Here are the changes found in Patchwork_9573_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_big:
      shard-hsw:          PASS -> INCOMPLETE (fdo#103540)

    igt@gem_workarounds@suspend-resume-context:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665)

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-glk:          PASS -> FAIL (fdo#105363)

    igt@kms_flip@2x-plain-flip-ts-check-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#105363, fdo#102887)

    igt@kms_setmode@basic:
      shard-apl:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@gem_render_copy_redux@normal:
      shard-kbl:          INCOMPLETE (fdo#103665, fdo#106650) -> PASS

    igt@kms_flip@2x-blocking-wf_vblank:
      shard-glk:          FAIL (fdo#100368) -> PASS +1

    igt@kms_setmode@basic:
      shard-hsw:          FAIL (fdo#99912) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#106650 https://bugs.freedesktop.org/show_bug.cgi?id=106650
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4448 -> Patchwork_9573

  CI_DRM_4448: e094950bd5b5767bab1d2a5c259635dc6091f8cc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4543: 366eed37c7c71217e1cb1f3be5e26358a41f0001 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9573: f10fe0a76a017d916a200eab03aa5a18c46cde4c @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9573/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2018-07-07 17:40 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-06 17:15 [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines Chris Wilson
2018-07-06 17:52 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-07-06 20:27 ` [PATCH] " Rodrigo Vivi
2018-07-06 20:39   ` Chris Wilson
2018-07-06 20:55     ` Rodrigo Vivi
2018-07-06 20:59       ` Chris Wilson
2018-07-07 17:40 ` ✗ Fi.CI.IGT: failure for " Patchwork

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