* [U-Boot] [PATCH v1 0/2] Update STM32 QSPI driver
@ 2018-07-09 13:32 Patrice Chotard
2018-07-09 13:32 ` [U-Boot] [PATCH v1 1/2] spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr Patrice Chotard
2018-07-09 13:32 ` [U-Boot] [PATCH v1 2/2] spi: stm32_qspi: rework mode management Patrice Chotard
0 siblings, 2 replies; 5+ messages in thread
From: Patrice Chotard @ 2018-07-09 13:32 UTC (permalink / raw)
To: u-boot
This series :
_ assign operation mode in _stm32_qspi_gen_ccr()
_ rework mode management to solve quad read issue
with Macronix/Micron spi nor.
Christophe Kerello (2):
spi: stm32_qspi: assign functional operation mode in
_stm32_qspi_gen_ccr
spi: stm32_qspi: rework mode management
drivers/spi/stm32_qspi.c | 45 ++++++++++++++++++++++-----------------------
1 file changed, 22 insertions(+), 23 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 1/2] spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr
2018-07-09 13:32 [U-Boot] [PATCH v1 0/2] Update STM32 QSPI driver Patrice Chotard
@ 2018-07-09 13:32 ` Patrice Chotard
2018-07-24 12:37 ` [U-Boot] [U-Boot, v1, " Tom Rini
2018-07-09 13:32 ` [U-Boot] [PATCH v1 2/2] spi: stm32_qspi: rework mode management Patrice Chotard
1 sibling, 1 reply; 5+ messages in thread
From: Patrice Chotard @ 2018-07-09 13:32 UTC (permalink / raw)
To: u-boot
From: Christophe Kerello <christophe.kerello@st.com>
This patch assigns the functional operation mode in _stm32_qspi_gen_ccr
function.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
drivers/spi/stm32_qspi.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index f6cc35336320..81b84625ba5b 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -220,7 +220,7 @@ static void _stm32_qspi_set_cs(struct stm32_qspi_priv *priv, unsigned int cs)
cs ? STM32_QSPI_CR_FSEL : 0);
}
-static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv)
+static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv, u8 fmode)
{
unsigned int ccr_reg = 0;
u8 imode, admode, dmode;
@@ -258,8 +258,11 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv)
<< STM32_QSPI_CCR_ADSIZE_SHIFT);
ccr_reg |= (admode << STM32_QSPI_CCR_ADMODE_SHIFT);
}
+
+ ccr_reg |= (fmode << STM32_QSPI_CCR_FMODE_SHIFT);
ccr_reg |= (imode << STM32_QSPI_CCR_IMODE_SHIFT);
ccr_reg |= cmd;
+
return ccr_reg;
}
@@ -272,8 +275,7 @@ static void _stm32_qspi_enable_mmap(struct stm32_qspi_priv *priv,
| CMD_HAS_DUMMY;
priv->dummycycles = flash->dummy_byte * 8;
- ccr_reg = _stm32_qspi_gen_ccr(priv);
- ccr_reg |= (STM32_QSPI_CCR_MEM_MAP << STM32_QSPI_CCR_FMODE_SHIFT);
+ ccr_reg = _stm32_qspi_gen_ccr(priv, STM32_QSPI_CCR_MEM_MAP);
_stm32_qspi_wait_for_not_busy(priv);
@@ -359,9 +361,8 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv,
}
if (flags & SPI_XFER_END) {
- ccr_reg = _stm32_qspi_gen_ccr(priv);
- ccr_reg |= STM32_QSPI_CCR_IND_WRITE
- << STM32_QSPI_CCR_FMODE_SHIFT;
+ ccr_reg = _stm32_qspi_gen_ccr(priv,
+ STM32_QSPI_CCR_IND_WRITE);
_stm32_qspi_wait_for_not_busy(priv);
@@ -392,9 +393,7 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv,
}
}
} else if (din) {
- ccr_reg = _stm32_qspi_gen_ccr(priv);
- ccr_reg |= STM32_QSPI_CCR_IND_READ
- << STM32_QSPI_CCR_FMODE_SHIFT;
+ ccr_reg = _stm32_qspi_gen_ccr(priv, STM32_QSPI_CCR_IND_READ);
_stm32_qspi_wait_for_not_busy(priv);
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 2/2] spi: stm32_qspi: rework mode management
2018-07-09 13:32 [U-Boot] [PATCH v1 0/2] Update STM32 QSPI driver Patrice Chotard
2018-07-09 13:32 ` [U-Boot] [PATCH v1 1/2] spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr Patrice Chotard
@ 2018-07-09 13:32 ` Patrice Chotard
2018-07-24 12:38 ` [U-Boot] [U-Boot, v1, " Tom Rini
1 sibling, 1 reply; 5+ messages in thread
From: Patrice Chotard @ 2018-07-09 13:32 UTC (permalink / raw)
To: u-boot
From: Christophe Kerello <christophe.kerello@st.com>
This patch solves quad read issue with Macronix/Micron spi nor.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
drivers/spi/stm32_qspi.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 81b84625ba5b..3b92254a5ce1 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -229,21 +229,21 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv, u8 fmode)
imode = STM32_QSPI_CCR_IMODE_ONE_LINE;
admode = STM32_QSPI_CCR_ADMODE_ONE_LINE;
-
- if (mode & SPI_RX_QUAD) {
- dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
- if (mode & SPI_TX_QUAD) {
- imode = STM32_QSPI_CCR_IMODE_FOUR_LINE;
- admode = STM32_QSPI_CCR_ADMODE_FOUR_LINE;
- }
- } else if (mode & SPI_RX_DUAL) {
- dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
- if (mode & SPI_TX_DUAL) {
- imode = STM32_QSPI_CCR_IMODE_TWO_LINE;
- admode = STM32_QSPI_CCR_ADMODE_TWO_LINE;
+ dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
+
+ if ((priv->command & CMD_HAS_ADR) && (priv->command & CMD_HAS_DATA)) {
+ if (fmode == STM32_QSPI_CCR_IND_WRITE) {
+ if (mode & SPI_TX_QUAD)
+ dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
+ else if (mode & SPI_TX_DUAL)
+ dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
+ } else if ((fmode == STM32_QSPI_CCR_MEM_MAP) ||
+ (fmode == STM32_QSPI_CCR_IND_READ)) {
+ if (mode & SPI_RX_QUAD)
+ dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
+ else if (mode & SPI_RX_DUAL)
+ dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
}
- } else {
- dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
}
if (priv->command & CMD_HAS_DATA)
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [U-Boot, v1, 1/2] spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr
2018-07-09 13:32 ` [U-Boot] [PATCH v1 1/2] spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr Patrice Chotard
@ 2018-07-24 12:37 ` Tom Rini
0 siblings, 0 replies; 5+ messages in thread
From: Tom Rini @ 2018-07-24 12:37 UTC (permalink / raw)
To: u-boot
On Mon, Jul 09, 2018 at 03:32:37PM +0200, Patrice Chotard wrote:
> From: Christophe Kerello <christophe.kerello@st.com>
>
> This patch assigns the functional operation mode in _stm32_qspi_gen_ccr
> function.
>
> Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Applied to u-boot/master, thanks!
--
Tom
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* [U-Boot] [U-Boot, v1, 2/2] spi: stm32_qspi: rework mode management
2018-07-09 13:32 ` [U-Boot] [PATCH v1 2/2] spi: stm32_qspi: rework mode management Patrice Chotard
@ 2018-07-24 12:38 ` Tom Rini
0 siblings, 0 replies; 5+ messages in thread
From: Tom Rini @ 2018-07-24 12:38 UTC (permalink / raw)
To: u-boot
On Mon, Jul 09, 2018 at 03:32:38PM +0200, Patrice Chotard wrote:
> From: Christophe Kerello <christophe.kerello@st.com>
>
> This patch solves quad read issue with Macronix/Micron spi nor.
>
> Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Applied to u-boot/master, thanks!
--
Tom
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Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-09 13:32 [U-Boot] [PATCH v1 0/2] Update STM32 QSPI driver Patrice Chotard
2018-07-09 13:32 ` [U-Boot] [PATCH v1 1/2] spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr Patrice Chotard
2018-07-24 12:37 ` [U-Boot] [U-Boot, v1, " Tom Rini
2018-07-09 13:32 ` [U-Boot] [PATCH v1 2/2] spi: stm32_qspi: rework mode management Patrice Chotard
2018-07-24 12:38 ` [U-Boot] [U-Boot, v1, " Tom Rini
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