From: Keiji Hayashibara <hayashibara.keiji@socionext.com> To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, yamada.masahiro@socionext.com, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: masami.hiramatsu@linaro.org, jaswinder.singh@linaro.org, linux-kernel@vger.kernel.org, hayashibara.keiji@socionext.com, Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Subject: [PATCH 1/2] dt-bindings: spi: add DT bindings for UniPhier SPI controller Date: Thu, 19 Jul 2018 15:51:56 +0900 [thread overview] Message-ID: <1531983117-9443-2-git-send-email-hayashibara.keiji@socionext.com> (raw) In-Reply-To: <1531983117-9443-1-git-send-email-hayashibara.keiji@socionext.com> From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Add DT bindings for SPI controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> --- .../devicetree/bindings/spi/spi-uniphier.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-uniphier.txt diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt b/Documentation/devicetree/bindings/spi/spi-uniphier.txt new file mode 100644 index 0000000..9c8c4a1 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-uniphier.txt @@ -0,0 +1,26 @@ +Socionext UniPhier SPI controller driver + +UniPhier SoCs have two types of SPI controllers; SCSSI supports a +single channel, and MCSSI supports multiple channels. +Both of them support the SPI master mode only. + +Required properties: + - compatible: should be + "socionext,uniphier-scssi" - for SCSSI device + "socionext,uniphier-mcssi" - for MCSSI device + - reg: address and length of the spi master registers + - #address-cells: must be <1>, see spi-bus.txt + - #size-cells: must be <0>, see spi-bus.txt + - clocks: A phandle to the clock for the device. + - resets: A phandle to the reset control for the device. + +Example: + +spi0: spi@54006000 { + compatible = "socionext,uniphier-scssi"; + reg = <0x54006000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&peri_clk 11>; + resets = <&peri_rst 11>; +}; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: hayashibara.keiji@socionext.com (Keiji Hayashibara) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] dt-bindings: spi: add DT bindings for UniPhier SPI controller Date: Thu, 19 Jul 2018 15:51:56 +0900 [thread overview] Message-ID: <1531983117-9443-2-git-send-email-hayashibara.keiji@socionext.com> (raw) In-Reply-To: <1531983117-9443-1-git-send-email-hayashibara.keiji@socionext.com> From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Add DT bindings for SPI controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> --- .../devicetree/bindings/spi/spi-uniphier.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-uniphier.txt diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt b/Documentation/devicetree/bindings/spi/spi-uniphier.txt new file mode 100644 index 0000000..9c8c4a1 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-uniphier.txt @@ -0,0 +1,26 @@ +Socionext UniPhier SPI controller driver + +UniPhier SoCs have two types of SPI controllers; SCSSI supports a +single channel, and MCSSI supports multiple channels. +Both of them support the SPI master mode only. + +Required properties: + - compatible: should be + "socionext,uniphier-scssi" - for SCSSI device + "socionext,uniphier-mcssi" - for MCSSI device + - reg: address and length of the spi master registers + - #address-cells: must be <1>, see spi-bus.txt + - #size-cells: must be <0>, see spi-bus.txt + - clocks: A phandle to the clock for the device. + - resets: A phandle to the reset control for the device. + +Example: + +spi0: spi at 54006000 { + compatible = "socionext,uniphier-scssi"; + reg = <0x54006000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&peri_clk 11>; + resets = <&peri_rst 11>; +}; -- 2.7.4
next prev parent reply other threads:[~2018-07-19 6:53 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-07-19 6:51 [PATCH 0/2] add SPI controller driver for UniPhier SoCs Keiji Hayashibara 2018-07-19 6:51 ` Keiji Hayashibara 2018-07-19 6:51 ` Keiji Hayashibara [this message] 2018-07-19 6:51 ` [PATCH 1/2] dt-bindings: spi: add DT bindings for UniPhier SPI controller Keiji Hayashibara 2018-07-25 19:17 ` Rob Herring 2018-07-25 19:17 ` Rob Herring 2018-07-19 6:51 ` [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC Keiji Hayashibara 2018-07-19 6:51 ` Keiji Hayashibara 2018-07-19 16:51 ` Mark Brown 2018-07-19 16:51 ` Mark Brown 2018-07-20 0:33 ` Keiji Hayashibara 2018-07-20 0:33 ` Keiji Hayashibara 2018-07-19 19:45 ` Trent Piepho 2018-07-19 19:45 ` Trent Piepho 2018-07-19 19:45 ` Trent Piepho 2018-07-20 2:20 ` Keiji Hayashibara 2018-07-20 2:20 ` Keiji Hayashibara 2018-07-20 2:20 ` Keiji Hayashibara
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