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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Lucas Stach <l.stach@pengutronix.de>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-pci@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	kernel@pengutronix.de, linux-imx@nxp.com
Subject: Re: [PATCH v2 2/3] reset: imx7: Fix always writing bits as 0
Date: Mon, 23 Jul 2018 13:02:54 +0200	[thread overview]
Message-ID: <1532343774.3501.8.camel@pengutronix.de> (raw)
In-Reply-To: <1532338865.3163.95.camel@pengutronix.de>

On Mon, 2018-07-23 at 11:41 +0200, Lucas Stach wrote:
> As this doesn't depend on any other patch in this series, I think it
> would be fine if Philipp takes this patch through the reset tree.
> 
> Regards,
> Lucas
> 
> Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> > Right now the only user of reset-imx7 is pci-imx6 and the
> > reset_control_assert and deassert calls on pciephy_reset don't toggle
> > the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
> > 1 or 0 respectively.
> > 
> > The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
> > other registers like MIPIPHY and HSICPHY the bits are explicitly
> > documented as "1 means assert, 0 means deassert".
> > 
> > The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
> > 
> > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> > > Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

Thank you, applied to reset/fixes.

regards
Philipp

WARNING: multiple messages have this Message-ID (diff)
From: Philipp Zabel <p.zabel@pengutronix.de>
To: Lucas Stach <l.stach@pengutronix.de>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	linux-pm@vger.kernel.org, Jingoo Han <jingoohan1@gmail.com>,
	linux-kernel@vger.kernel.org,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	linux-imx@nxp.com, kernel@pengutronix.de,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Shawn Guo <shawnguo@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/3] reset: imx7: Fix always writing bits as 0
Date: Mon, 23 Jul 2018 13:02:54 +0200	[thread overview]
Message-ID: <1532343774.3501.8.camel@pengutronix.de> (raw)
In-Reply-To: <1532338865.3163.95.camel@pengutronix.de>

T24gTW9uLCAyMDE4LTA3LTIzIGF0IDExOjQxICswMjAwLCBMdWNhcyBTdGFjaCB3cm90ZToKPiBB
cyB0aGlzIGRvZXNuJ3QgZGVwZW5kIG9uIGFueSBvdGhlciBwYXRjaCBpbiB0aGlzIHNlcmllcywg
SSB0aGluayBpdAo+IHdvdWxkIGJlIGZpbmUgaWYgUGhpbGlwcMKgdGFrZXMgdGhpcyBwYXRjaCB0
aHJvdWdoIHRoZSByZXNldCB0cmVlLgo+IAo+IFJlZ2FyZHMsCj4gTHVjYXMKPiAKPiBBbSBGcmVp
dGFnLCBkZW4gMjAuMDcuMjAxOCwgMTU6NDcgKzAzMDAgc2NocmllYiBMZW9uYXJkIENyZXN0ZXo6
Cj4gPiBSaWdodCBub3cgdGhlIG9ubHkgdXNlciBvZiByZXNldC1pbXg3IGlzIHBjaS1pbXg2IGFu
ZCB0aGUKPiA+IHJlc2V0X2NvbnRyb2xfYXNzZXJ0IGFuZCBkZWFzc2VydCBjYWxscyBvbiBwY2ll
cGh5X3Jlc2V0IGRvbid0IHRvZ2dsZQo+ID4gdGhlIFBDSUVQSFlfQlROIGFuZCBQQ0lFUEhZX0df
UlNUIGJpdHMgYXMgZXhwZWN0ZWQuIEZpeCB0aGlzIGJ5IHdyaXRpbmcKPiA+IDEgb3IgMCByZXNw
ZWN0aXZlbHkuCj4gPiAKPiA+IFRoZSByZWZlcmVuY2UgbWFudWFsIGlzIG5vdCB2ZXJ5IGNsZWFy
IHJlZ2FyZGluZyBTUkNfUENJRVBIWV9SQ1IgYnV0IGZvcgo+ID4gb3RoZXIgcmVnaXN0ZXJzIGxp
a2UgTUlQSVBIWSBhbmQgSFNJQ1BIWSB0aGUgYml0cyBhcmUgZXhwbGljaXRseQo+ID4gZG9jdW1l
bnRlZCBhcyAiMSBtZWFucyBhc3NlcnQsIDAgbWVhbnMgZGVhc3NlcnQiLgo+ID4gCj4gPiBUaGUg
dmFsdWVzIGFyZSBzdGlsbCByZXZlcnNlZCBmb3IgSU1YN19SRVNFVF9QQ0lFX0NUUkxfQVBQU19F
Ti4KPiA+IAo+ID4gPiBTaWduZWQtb2ZmLWJ5OiBMZW9uYXJkIENyZXN0ZXogPGxlb25hcmQuY3Jl
c3RlekBueHAuY29tPgo+ID4gPiBSZXZpZXdlZC1ieTogTHVjYXMgU3RhY2ggPGwuc3RhY2hAcGVu
Z3V0cm9uaXguZGU+CgpUaGFuayB5b3UsIGFwcGxpZWQgdG8gcmVzZXQvZml4ZXMuCgpyZWdhcmRz
ClBoaWxpcHAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
CmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5m
cmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xp
bnV4LWFybS1rZXJuZWwK

WARNING: multiple messages have this Message-ID (diff)
From: p.zabel@pengutronix.de (Philipp Zabel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/3] reset: imx7: Fix always writing bits as 0
Date: Mon, 23 Jul 2018 13:02:54 +0200	[thread overview]
Message-ID: <1532343774.3501.8.camel@pengutronix.de> (raw)
In-Reply-To: <1532338865.3163.95.camel@pengutronix.de>

On Mon, 2018-07-23 at 11:41 +0200, Lucas Stach wrote:
> As this doesn't depend on any other patch in this series, I think it
> would be fine if Philipp?takes this patch through the reset tree.
> 
> Regards,
> Lucas
> 
> Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> > Right now the only user of reset-imx7 is pci-imx6 and the
> > reset_control_assert and deassert calls on pciephy_reset don't toggle
> > the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
> > 1 or 0 respectively.
> > 
> > The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
> > other registers like MIPIPHY and HSICPHY the bits are explicitly
> > documented as "1 means assert, 0 means deassert".
> > 
> > The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
> > 
> > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> > > Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

Thank you, applied to reset/fixes.

regards
Philipp

  reply	other threads:[~2018-07-23 11:03 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-20 12:47 [PATCH v2 0/3] PCI: imx: Initial imx7d pm support Leonard Crestez
2018-07-20 12:47 ` Leonard Crestez
2018-07-20 12:47 ` Leonard Crestez
2018-07-20 12:47 ` [PATCH v2 1/3] Revert "ARM: dts: imx7d: Invert legacy PCI irq mapping" Leonard Crestez
2018-07-20 12:47   ` Leonard Crestez
2018-07-20 12:47   ` Leonard Crestez
2018-07-20 15:33   ` Andrey Smirnov
2018-07-20 15:33     ` Andrey Smirnov
2018-07-20 15:33     ` Andrey Smirnov
2018-07-23 12:41     ` Leonard Crestez
2018-07-23 12:41       ` Leonard Crestez
2018-07-23 12:41       ` Leonard Crestez
2018-07-23 12:41       ` Leonard Crestez
2018-07-23 18:38       ` Andrey Smirnov
2018-07-23 18:38         ` Andrey Smirnov
2018-07-23 18:38         ` Andrey Smirnov
2018-07-24 11:34         ` Leonard Crestez
2018-07-24 11:34           ` Leonard Crestez
2018-07-24 11:34           ` Leonard Crestez
2018-07-24 11:34           ` Leonard Crestez
2018-07-20 12:47 ` [PATCH v2 2/3] reset: imx7: Fix always writing bits as 0 Leonard Crestez
2018-07-20 12:47   ` Leonard Crestez
2018-07-20 12:47   ` Leonard Crestez
2018-07-23  9:41   ` Lucas Stach
2018-07-23  9:41     ` Lucas Stach
2018-07-23  9:41     ` Lucas Stach
2018-07-23 11:02     ` Philipp Zabel [this message]
2018-07-23 11:02       ` Philipp Zabel
2018-07-23 11:02       ` Philipp Zabel
2018-07-20 12:47 ` [PATCH v2 3/3] PCI: imx: Initial imx7d pm support Leonard Crestez
2018-07-20 12:47   ` Leonard Crestez
2018-07-20 12:47   ` Leonard Crestez
2018-07-20 13:38   ` Fabio Estevam
2018-07-20 13:38     ` Fabio Estevam
2018-07-20 13:38     ` Fabio Estevam
2018-07-20 13:38     ` Fabio Estevam
2018-07-23  9:38   ` Lucas Stach
2018-07-23  9:38     ` Lucas Stach
2018-07-23  9:38     ` Lucas Stach
2018-07-23 12:37     ` Leonard Crestez
2018-07-23 12:37       ` Leonard Crestez
2018-07-23 12:37       ` Leonard Crestez
2018-07-23 12:37       ` Leonard Crestez
2018-07-24 10:09       ` Lucas Stach
2018-07-24 10:09         ` Lucas Stach
2018-07-24 10:09         ` Lucas Stach
2018-07-24 10:09         ` Lucas Stach
2018-07-24 12:04         ` Leonard Crestez
2018-07-24 12:04           ` Leonard Crestez
2018-07-24 12:04           ` Leonard Crestez
2018-07-24 12:04           ` Leonard Crestez
2018-07-24 12:28           ` Lucas Stach
2018-07-24 12:28             ` Lucas Stach
2018-07-24 12:28             ` Lucas Stach
2018-07-24 12:28             ` Lucas Stach

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