From: Aapo Vienamo <avienamo@nvidia.com> To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Adrian Hunter <adrian.hunter@intel.com>, Mikko Perttunen <mperttunen@nvidia.com> Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Aapo Vienamo <avienamo@nvidia.com> Subject: [PATCH v2 03/10] mmc: tegra: Power on the calibration pad Date: Thu, 26 Jul 2018 15:26:49 +0300 [thread overview] Message-ID: <1532608016-14319-4-git-send-email-avienamo@nvidia.com> (raw) In-Reply-To: <1532608016-14319-1-git-send-email-avienamo@nvidia.com> Automatic pad drive strength calibration is performed on a separate pad identical to the ones used for driving the actual bus. Power on the calibration pad during the calibration procedure and power it off afterwards to save power. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> --- drivers/mmc/host/sdhci-tegra.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 51eda20..363490e 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -53,6 +53,7 @@ #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL 0x1e0 #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK 0x0000000f #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL 0x7 +#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD BIT(31) #define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec #define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31) @@ -241,11 +242,30 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) tegra_host->ddr_signaling = false; } +static void tegra_sdhci_configure_cal_pad(struct sdhci_host *host, bool enable) +{ + u32 reg; + + /* + * Enable or disable the additional I/O pad used by the drive strength + * calibration process. + */ + reg = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); + if (enable) + reg |= SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD; + else + reg &= ~SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD; + sdhci_writel(host, reg, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); + udelay(1); +} + static void tegra_sdhci_pad_autocalib(struct sdhci_host *host) { u32 reg; int ret; + tegra_sdhci_configure_cal_pad(host, true); + reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); reg |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START; sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); @@ -255,6 +275,8 @@ static void tegra_sdhci_pad_autocalib(struct sdhci_host *host) reg, !(reg & SDHCI_TEGRA_AUTO_CAL_ACTIVE), 1, 10000); + tegra_sdhci_configure_cal_pad(host, false); + if (ret) dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n"); } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Aapo Vienamo <avienamo@nvidia.com> To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, "Adrian Hunter" <adrian.hunter@intel.com>, Mikko Perttunen <mperttunen@nvidia.com> Cc: <linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Aapo Vienamo <avienamo@nvidia.com> Subject: [PATCH v2 03/10] mmc: tegra: Power on the calibration pad Date: Thu, 26 Jul 2018 15:26:49 +0300 [thread overview] Message-ID: <1532608016-14319-4-git-send-email-avienamo@nvidia.com> (raw) In-Reply-To: <1532608016-14319-1-git-send-email-avienamo@nvidia.com> Automatic pad drive strength calibration is performed on a separate pad identical to the ones used for driving the actual bus. Power on the calibration pad during the calibration procedure and power it off afterwards to save power. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> --- drivers/mmc/host/sdhci-tegra.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 51eda20..363490e 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -53,6 +53,7 @@ #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL 0x1e0 #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK 0x0000000f #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL 0x7 +#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD BIT(31) #define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec #define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31) @@ -241,11 +242,30 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) tegra_host->ddr_signaling = false; } +static void tegra_sdhci_configure_cal_pad(struct sdhci_host *host, bool enable) +{ + u32 reg; + + /* + * Enable or disable the additional I/O pad used by the drive strength + * calibration process. + */ + reg = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); + if (enable) + reg |= SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD; + else + reg &= ~SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD; + sdhci_writel(host, reg, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); + udelay(1); +} + static void tegra_sdhci_pad_autocalib(struct sdhci_host *host) { u32 reg; int ret; + tegra_sdhci_configure_cal_pad(host, true); + reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); reg |= SDHCI_AUTO_CAL_ENABLE | SDHCI_AUTO_CAL_START; sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); @@ -255,6 +275,8 @@ static void tegra_sdhci_pad_autocalib(struct sdhci_host *host) reg, !(reg & SDHCI_TEGRA_AUTO_CAL_ACTIVE), 1, 10000); + tegra_sdhci_configure_cal_pad(host, false); + if (ret) dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n"); } -- 2.7.4
next prev parent reply other threads:[~2018-07-26 12:26 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-07-26 12:26 [PATCH v2 00/10] Tegra SDHCI update the pad autocal procedure Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 01/10] mmc: tegra: Poll for calibration completion Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 02/10] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo [this message] 2018-07-26 12:26 ` [PATCH v2 03/10] mmc: tegra: Power on the calibration pad Aapo Vienamo 2018-07-31 9:41 ` Stefan Agner 2018-07-26 12:26 ` [PATCH v2 04/10] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 05/10] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-30 23:31 ` Rob Herring 2018-07-26 12:26 ` [PATCH v2 06/10] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 07/10] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 08/10] arm64: dts: tegra210: " Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 09/10] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-26 12:26 ` [PATCH v2 10/10] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo 2018-07-26 12:26 ` Aapo Vienamo 2018-07-30 15:07 ` [PATCH v2 00/10] Tegra SDHCI update the pad autocal procedure Ulf Hansson 2018-07-30 15:43 ` Aapo Vienamo 2018-07-30 15:43 ` Aapo Vienamo 2018-07-30 15:43 ` Aapo Vienamo 2018-07-31 9:33 ` Stefan Agner
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