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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: gregkh@linuxfoundation.org
Cc: neil@brown.name, driverdev-devel@linuxdriverproject.org
Subject: [PATCH v6 14/15] staging: mt7621-pci: remove remaining pci_legacy dependant code
Date: Mon, 30 Jul 2018 16:45:08 +0200	[thread overview]
Message-ID: <1532961909-25816-15-git-send-email-sergio.paracuellos@gmail.com> (raw)
In-Reply-To: <1532961909-25816-1-git-send-email-sergio.paracuellos@gmail.com>

pcibios_* remaining code is not neccessary at all. We can use
map_irq set to of_irq_parse_and_map_pci driver 'probe' function.
Remove this code.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci/pci-mt7621.c | 33 +--------------------------------
 1 file changed, 1 insertion(+), 32 deletions(-)

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index 9feca70..0bf450f 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -203,32 +203,6 @@ write_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg, u32 val)
 	pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
 }
 
-int
-pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-	struct mt7621_pcie *pcie = dev->bus->sysdata;
-	u16 cmd;
-	u32 val;
-	int irq;
-
-	if (dev->bus->number == 0) {
-		write_config(pcie, slot, PCI_BASE_ADDRESS_0, MEMORY_BASE);
-		val = read_config(pcie, slot, PCI_BASE_ADDRESS_0);
-		printk("BAR0 at slot %d = %x\n", slot, val);
-	}
-
-	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x14);  //configure cache line size 0x14
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xFF);  //configure latency timer 0x10
-	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-	cmd = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
-	pci_write_config_word(dev, PCI_COMMAND, cmd);
-
-	irq = of_irq_parse_and_map_pci(dev, slot, pin);
-
-	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
-	return irq;
-}
-
 void
 set_pcie_phy(struct mt7621_pcie *pcie, u32 offset,
 	     int start_b, int bits, int val)
@@ -637,7 +611,7 @@ pcie(2/1/0) link status	pcie2_num	pcie1_num	pcie0_num
 	bridge->dev.parent = dev;
 	bridge->sysdata = pcie;
 	bridge->ops = &mt7621_pci_ops;
-	bridge->map_irq = pcibios_map_irq;
+	bridge->map_irq = of_irq_parse_and_map_pci;
 	bridge->swizzle_irq = pci_common_swizzle;
 
 	err = pci_scan_root_bus_bridge(bridge);
@@ -655,11 +629,6 @@ pcie(2/1/0) link status	pcie2_num	pcie1_num	pcie0_num
 	return 0;
 }
 
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-	return 0;
-}
-
 static const struct of_device_id mt7621_pci_ids[] = {
 	{ .compatible = "mediatek,mt7621-pci" },
 	{},
-- 
2.7.4

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  parent reply	other threads:[~2018-07-30 14:45 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-30 14:44 [PATCH v6 00/15] staging: mt7621-pci: avoid custom pci config read and writes Sergio Paracuellos
2018-07-30 14:44 ` [PATCH v6 01/15] staging: mt7621-pci: use generic kernel pci subsystem read and write Sergio Paracuellos
2018-07-30 14:44 ` [PATCH v6 02/15] staging: mt7621-pci: remove dead code derived to not use custom reads and writes Sergio Paracuellos
2018-07-30 14:44 ` [PATCH v6 03/15] staging: mt7621-pci: add pcie_write and pcie_read helpers Sergio Paracuellos
2018-07-30 14:44 ` [PATCH v6 04/15] staging: mt7621-pci: use pcie_[read|write] in [write|read]_config Sergio Paracuellos
2018-07-30 14:44 ` [PATCH v6 05/15] staging: mt7621-pci: simplify read_config function Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 06/15] staging: mt7621-pci: simplify write_config function Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 07/15] staging: mt7621-pci: remove unused macros Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 08/15] staging: mt7621-pci: avoid register duplication per controller using pcie_[read|write] Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 09/15] staging: mt7621-pci: review includes putting them in alphabethic order Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 10/15] staging: mt7621-pci: use pcie_[read|write] in RALINK_PCI_PCICFG_ADDR and RALINK_PCI_PCIMSK_ADDR Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 11/15] staging: mt7621-pci: remove RALINK_PCI_BASE from remaining definitions Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 12/15] staging: mt7621-pci: use BIT macro in preprocessor definitions Sergio Paracuellos
2018-07-30 14:45 ` [PATCH v6 13/15] staging: mt7621-pci: rename RALINK_PCI_CONFIG_DATA_VIRTUAL_REG definition Sergio Paracuellos
2018-07-30 14:45 ` Sergio Paracuellos [this message]
2018-07-30 14:45 ` [PATCH v6 15/15] staging: mt7621-dts: add pcie controller port registers Sergio Paracuellos
2018-07-30 22:55 ` [PATCH v6 00/15] staging: mt7621-pci: avoid custom pci config read and writes NeilBrown
2018-07-31  4:31   ` Sergio Paracuellos
2018-07-31  5:25     ` NeilBrown
2018-07-31  5:43       ` Sergio Paracuellos
2018-07-31 10:56       ` Sergio Paracuellos
2018-07-31  4:43   ` Sergio Paracuellos

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