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* [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware
@ 2018-07-30 19:43 Tom Hochstein
  2018-07-30 19:43 ` [PATCH 31/52] imx-boot: Add recipes for i.MX 8 boot partition packages Tom Hochstein
                   ` (21 more replies)
  0 siblings, 22 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Add System Controller firmware package for i.MX 8 and 8X families.

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/imx-sc-firmware/imx-sc-firmware_0.7.bb | 50 ++++++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 recipes-bsp/imx-sc-firmware/imx-sc-firmware_0.7.bb

diff --git a/recipes-bsp/imx-sc-firmware/imx-sc-firmware_0.7.bb b/recipes-bsp/imx-sc-firmware/imx-sc-firmware_0.7.bb
new file mode 100644
index 0000000..c203d7e
--- /dev/null
+++ b/recipes-bsp/imx-sc-firmware/imx-sc-firmware_0.7.bb
@@ -0,0 +1,50 @@
+# Copyright (C) 2016 Freescale Semiconductor
+# Copyright 2017-2018 NXP
+
+DESCRIPTION = "i.MX System Controller Firmware"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://COPYING;md5=ab61cab9599935bfe9f700405ef00f28"
+SECTION = "BSP"
+
+inherit fsl-eula-unpack pkgconfig deploy
+
+SRC_URI = "${FSL_MIRROR}/${PN}-${PV}.bin;fsl-eula=true"
+
+SRC_URI[md5sum] = "9dcdbdae491bd6b027ccab0e354870cb"
+SRC_URI[sha256sum] = "46e487605c31f44b4fe0280e57e4e0a3fe51c375300766805ae1161c39021766"
+
+S = "${WORKDIR}/${PN}-${PV}"
+
+BOARD_TYPE ?= "mek"
+SC_FIRMWARE_NAME ?= "mx8qm-mek-scfw-tcm.bin"
+SC_FIRMWARE_NAME_mx8qm = "mx8qm-${BOARD_TYPE}-scfw-tcm.bin"
+SC_FIRMWARE_NAME_mx8qxp = "mx8qx-${BOARD_TYPE}-scfw-tcm.bin"
+symlink_name = "scfw_tcm.bin"
+
+SYSROOT_DIRS += "/boot"
+
+do_install () {
+    install -d ${D}/boot
+    install -m 0644 ${S}/${SC_FIRMWARE_NAME} ${D}/boot/
+}
+
+BOOT_TOOLS = "imx-boot-tools"
+
+do_deploy () {
+    install -d ${DEPLOYDIR}/${BOOT_TOOLS}
+    install -m 0644 ${S}/${SC_FIRMWARE_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}/
+    cd ${DEPLOYDIR}/${BOOT_TOOLS}/
+    rm -f ${symlink_name}
+    ln -sf ${SC_FIRMWARE_NAME} ${symlink_name}
+    cd -
+}
+
+addtask deploy after do_install
+
+INHIBIT_PACKAGE_STRIP = "1"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+FILES_${PN} = "/boot"
+
+COMPATIBLE_MACHINE = "(mx8qm|mx8qxp)"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 31/52] imx-boot: Add recipes for i.MX 8 boot partition packages.
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 32/52] alsa-state: Fix buffer size issue Tom Hochstein
                   ` (20 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/imx-mkimage/imx-boot_0.2.bb       | 194 ++++++++++++++++++++++++++
 recipes-bsp/imx-mkimage/imx-m4-demos_1.0.1.bb |  28 ++++
 recipes-bsp/imx-mkimage/imx-m4-demos_2.3.0.bb |  42 ++++++
 recipes-bsp/imx-mkimage/imx-m4-demos_2.3.1.bb |  33 +++++
 recipes-bsp/imx-mkimage/imx-m4-demos_2.4.0.bb |  33 +++++
 recipes-bsp/imx-mkimage/imx-mkimage_git.bb    |  35 +++++
 recipes-bsp/imx-mkimage/imx-mkimage_git.inc   |  11 ++
 7 files changed, 376 insertions(+)
 create mode 100644 recipes-bsp/imx-mkimage/imx-boot_0.2.bb
 create mode 100644 recipes-bsp/imx-mkimage/imx-m4-demos_1.0.1.bb
 create mode 100644 recipes-bsp/imx-mkimage/imx-m4-demos_2.3.0.bb
 create mode 100644 recipes-bsp/imx-mkimage/imx-m4-demos_2.3.1.bb
 create mode 100644 recipes-bsp/imx-mkimage/imx-m4-demos_2.4.0.bb
 create mode 100644 recipes-bsp/imx-mkimage/imx-mkimage_git.bb
 create mode 100644 recipes-bsp/imx-mkimage/imx-mkimage_git.inc

diff --git a/recipes-bsp/imx-mkimage/imx-boot_0.2.bb b/recipes-bsp/imx-mkimage/imx-boot_0.2.bb
new file mode 100644
index 0000000..6d2f779
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-boot_0.2.bb
@@ -0,0 +1,194 @@
+# Copyright 2017-2018 NXP
+
+require imx-mkimage_git.inc
+
+DESCRIPTION = "Generate Boot Loader for i.MX 8 device"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6"
+SECTION = "BSP"
+
+IMX_FIRMWARE        = "imx-sc-firmware"
+IMX_FIRMWARE_mx8mq  = "firmware-imx"
+IMX_FIRMWARE_mx8qxp = "firmware-imx imx-sc-firmware"
+DEPENDS += " \
+    u-boot \
+    ${IMX_FIRMWARE} \
+    imx-atf \
+    ${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'optee-os-imx', '', d)} \
+"
+DEPENDS_append_mx8mq = " dtc-native"
+BOOT_NAME = "imx-boot"
+PROVIDES = "${BOOT_NAME}"
+
+inherit deploy
+
+# Add CFLAGS with native INCDIR & LIBDIR for imx-mkimage build
+CFLAGS = "-O2 -Wall -std=c99 -static -I ${STAGING_INCDIR_NATIVE} -L ${STAGING_LIBDIR_NATIVE}"
+
+# For i.MX 8, this package aggregates the imx-m4-demos
+# output. Note that this aggregation replaces the aggregation
+# that would otherwise be done in the image build as controlled
+# by IMAGE_BOOTFILES_DEPENDS and IMAGE_BOOTFILES in image_types_fsl.bbclass
+IMX_M4_DEMOS        = ""
+IMX_M4_DEMOS_mx8qm  = "imx-m4-demos:do_deploy"
+IMX_M4_DEMOS_mx8qxp = "imx-m4-demos:do_deploy"
+
+# This package aggregates output deployed by other packages,
+# so set the appropriate dependencies
+do_compile[depends] += " \
+    virtual/bootloader:do_deploy \
+    ${@' '.join('%s:do_deploy' % r for r in '${IMX_FIRMWARE}'.split() )} \
+    imx-atf:do_deploy \
+    ${IMX_M4_DEMOS} \
+    ${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'optee-os-imx:do_deploy', '', d)} \
+"
+
+SC_FIRMWARE_NAME ?= "scfw_tcm.bin"
+
+ATF_MACHINE_NAME ?= "bl31-imx8qm.bin"
+ATF_MACHINE_NAME_mx8qm = "bl31-imx8qm.bin"
+ATF_MACHINE_NAME_mx8qxp = "bl31-imx8qxp.bin"
+ATF_MACHINE_NAME_mx8mq = "bl31-imx8mq.bin"
+
+DCD_NAME ?= "imx8qm_dcd.cfg.tmp"
+DCD_NAME_mx8qm = "imx8qm_dcd.cfg.tmp"
+DCD_NAME_mx8qxp = "imx8qx_dcd.cfg.tmp"
+
+UBOOT_NAME = "u-boot-${MACHINE}.bin-${UBOOT_CONFIG}"
+BOOT_CONFIG_MACHINE = "${BOOT_NAME}-${MACHINE}-${UBOOT_CONFIG}.bin"
+
+TOOLS_NAME ?= "mkimage_imx8"
+
+SOC_TARGET ?= "iMX8QM"
+SOC_TARGET_mx8qm  = "iMX8QM"
+SOC_TARGET_mx8qxp = "iMX8QX"
+SOC_TARGET_mx8mq  = "iMX8M"
+
+DEPLOY_OPTEE = "false"
+DEPLOY_OPTEE_mx8mq = "${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'true', 'false', d)}"
+
+IMXBOOT_TARGETS ?= "${@bb.utils.contains('UBOOT_CONFIG', 'fspi', 'flash_flexspi', \
+                       bb.utils.contains('UBOOT_CONFIG', 'nand', 'flash_nand', \
+                                                                 'flash_multi_cores flash flash_dcd', d), d)}"
+IMXBOOT_TARGETS_mx8qxp = "${@bb.utils.contains('UBOOT_CONFIG', 'fspi', 'flash_flexspi', \
+                       bb.utils.contains('UBOOT_CONFIG', 'nand', 'flash_nand', \
+                                                                 'flash_all flash', d), d)}"
+IMXBOOT_TARGETS_mx8qxpa0 = "${@bb.utils.contains('UBOOT_CONFIG', 'fspi', 'flash_flexspi_a0', \
+                       bb.utils.contains('UBOOT_CONFIG', 'nand', 'flash_nand_a0', \
+                                                                 'flash_multi_cores_a0 flash_a0 flash_dcd_a0', d), d)}"
+IMXBOOT_TARGETS_imx8qxpddr3arm2 = "flash_ddr3_dcd_a0"
+
+do_compile () {
+    if [ "${SOC_TARGET}" = "iMX8M" ]; then
+        echo 8MQ boot binary build
+        for ddr_firmware in ${DDR_FIRMWARE_NAME}; do
+            echo "Copy ddr_firmware: ${ddr_firmware} from ${DEPLOY_DIR_IMAGE} -> ${S}/${SOC_TARGET} "
+            cp ${DEPLOY_DIR_IMAGE}/${ddr_firmware}               ${S}/${SOC_TARGET}/
+        done
+        cp ${DEPLOY_DIR_IMAGE}/signed_hdmi_imx8m.bin             ${S}/${SOC_TARGET}/
+        cp ${DEPLOY_DIR_IMAGE}/u-boot-spl.bin-${MACHINE}-${UBOOT_CONFIG} ${S}/${SOC_TARGET}/u-boot-spl.bin
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${UBOOT_DTB_NAME}   ${S}/${SOC_TARGET}/
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/u-boot-nodtb.bin    ${S}/${SOC_TARGET}/
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/mkimage_uboot       ${S}/${SOC_TARGET}/
+
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${ATF_MACHINE_NAME} ${S}/${SOC_TARGET}/bl31.bin
+        cp ${DEPLOY_DIR_IMAGE}/${UBOOT_NAME}                     ${S}/${SOC_TARGET}/u-boot.bin
+
+    elif [ "${SOC_TARGET}" = "iMX8QM" ]; then
+        echo 8QM boot binary build
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${SC_FIRMWARE_NAME} ${S}/${SOC_TARGET}/scfw_tcm.bin
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${ATF_MACHINE_NAME} ${S}/${SOC_TARGET}/bl31.bin
+        cp ${DEPLOY_DIR_IMAGE}/${UBOOT_NAME}                     ${S}/${SOC_TARGET}/u-boot.bin
+
+        cp ${DEPLOY_DIR_IMAGE}/imx8qm_m4_0_TCM_rpmsg_lite_pingpong_rtos_linux_remote.bin ${S}/${SOC_TARGET}/m40_tcm.bin
+        cp ${DEPLOY_DIR_IMAGE}/imx8qm_m4_1_TCM_rpmsg_lite_pingpong_rtos_linux_remote.bin ${S}/${SOC_TARGET}/m41_tcm.bin
+
+    else
+        echo 8QX boot binary build
+        cp ${DEPLOY_DIR_IMAGE}/imx8qx_m4_TCM_rpmsg_lite_pingpong_rtos_linux_remote.bin ${S}/${SOC_TARGET}/m40_tcm.bin
+        cp ${DEPLOY_DIR_IMAGE}/imx8qx_m4_TCM_rpmsg_lite_pingpong_rtos_linux_remote.bin ${S}/${SOC_TARGET}/CM4.bin
+        cp ${DEPLOY_DIR_IMAGE}/ahab-container.img ${S}/${SOC_TARGET}/
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${SC_FIRMWARE_NAME} ${S}/${SOC_TARGET}/scfw_tcm.bin
+        cp ${DEPLOY_DIR_IMAGE}/${BOOT_TOOLS}/${ATF_MACHINE_NAME} ${S}/${SOC_TARGET}/bl31.bin
+        cp ${DEPLOY_DIR_IMAGE}/${UBOOT_NAME}                     ${S}/${SOC_TARGET}/u-boot.bin
+    fi
+
+    # Copy TEE binary to SoC target folder to mkimage
+    if ${DEPLOY_OPTEE}; then
+        cp ${DEPLOY_DIR_IMAGE}/tee.bin             ${S}/${SOC_TARGET}/
+    fi
+
+    # mkimage for i.MX8
+    for target in ${IMXBOOT_TARGETS}; do
+        echo "building ${SOC_TARGET} - ${target}"
+        make SOC=${SOC_TARGET} ${target}
+        if [ -e "${S}/${SOC_TARGET}/flash.bin" ]; then
+            cp ${S}/${SOC_TARGET}/flash.bin ${S}/${BOOT_CONFIG_MACHINE}-${target}
+        fi
+    done
+}
+
+do_install () {
+    install -d ${D}/boot
+    for target in ${IMXBOOT_TARGETS}; do
+        install -m 0644 ${S}/${BOOT_CONFIG_MACHINE}-${target} ${D}/boot/
+    done
+}
+
+do_deploy () {
+    install -d ${DEPLOYDIR}/${BOOT_TOOLS}
+
+    # copy the tool mkimage to deploy path and sc fw, dcd and uboot
+    install -m 0644 ${DEPLOY_DIR_IMAGE}/${UBOOT_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}
+    if [ "${SOC_TARGET}" = "iMX8M" ]; then
+        install -m 0644 ${DEPLOY_DIR_IMAGE}/u-boot-spl.bin-${MACHINE}-${UBOOT_CONFIG} ${DEPLOYDIR}/${BOOT_TOOLS}
+        for ddr_firmware in ${DDR_FIRMWARE_NAME}; do
+            install -m 0644 ${DEPLOY_DIR_IMAGE}/${ddr_firmware} ${DEPLOYDIR}/${BOOT_TOOLS}
+        done
+        install -m 0644 ${DEPLOY_DIR_IMAGE}/signed_hdmi*.bin ${DEPLOYDIR}/${BOOT_TOOLS}
+
+        install -m 0755 ${S}/${SOC_TARGET}/${TOOLS_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}
+
+        install -m 0755 ${S}/${SOC_TARGET}/mkimage_fit_atf.sh ${DEPLOYDIR}/${BOOT_TOOLS}
+    elif [ "${SOC_TARGET}" = "iMX8QM" ]; then
+        install -m 0644 ${S}/${SOC_TARGET}/${DCD_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}
+
+        install -m 0755 ${S}/${TOOLS_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}
+    else
+        if [ "${MACHINE}" = "imx8qxpa0mek" ]; then
+            install -m 0644 ${S}/${SOC_TARGET}/${DCD_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}
+        fi
+        install -m 0644 ${S}/${SOC_TARGET}/ahab-container.img ${DEPLOYDIR}/${BOOT_TOOLS}
+        install -m 0644 ${S}/${SOC_TARGET}/m40_tcm.bin ${DEPLOYDIR}/${BOOT_TOOLS}
+        install -m 0644 ${S}/${SOC_TARGET}/CM4.bin ${DEPLOYDIR}/${BOOT_TOOLS}
+
+        install -m 0755 ${S}/${TOOLS_NAME} ${DEPLOYDIR}/${BOOT_TOOLS}
+    fi
+
+    # copy tee.bin to deploy path
+    if "${DEPLOY_OPTEE}"; then
+        install -m 0644 ${DEPLOY_DIR_IMAGE}/tee.bin ${DEPLOYDIR}/${BOOT_TOOLS}
+    fi
+
+    # copy makefile (soc.mak) for reference
+    install -m 0644 ${S}/${SOC_TARGET}/soc.mak     ${DEPLOYDIR}/${BOOT_TOOLS}
+
+    # copy the generated boot image to deploy path
+    for target in ${IMXBOOT_TARGETS}; do
+        # Use first "target" as IMAGE_IMXBOOT_TARGET
+        if [ "$IMAGE_IMXBOOT_TARGET" = "" ]; then
+            IMAGE_IMXBOOT_TARGET="$target"
+            echo "Set boot target as $IMAGE_IMXBOOT_TARGET"
+        fi
+        install -m 0644 ${S}/${BOOT_CONFIG_MACHINE}-${target} ${DEPLOYDIR}
+    done
+    cd ${DEPLOYDIR}
+    ln -sf ${BOOT_CONFIG_MACHINE}-${IMAGE_IMXBOOT_TARGET} ${BOOT_CONFIG_MACHINE}
+    cd -
+}
+addtask deploy before do_build after do_compile
+
+FILES_${PN} = "/boot"
+
+COMPATIBLE_MACHINE = "(mx8qm|mx8qxp|mx8mq)"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
diff --git a/recipes-bsp/imx-mkimage/imx-m4-demos_1.0.1.bb b/recipes-bsp/imx-mkimage/imx-m4-demos_1.0.1.bb
new file mode 100644
index 0000000..036cdce
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-m4-demos_1.0.1.bb
@@ -0,0 +1,28 @@
+SUMMARY = "i.MX M4 core Demo images"
+SECTION = "app"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://COPYING;md5=8cf95184c220e247b9917e7244124c5a"
+
+inherit deploy fsl-eula-unpack
+
+M4_SOC ?= "imx7d-sabresd"
+M4_SOC_mx7 = "imx7d-sabresd"
+
+SRC_URI = "${FSL_MIRROR}/${M4_SOC}-m4-freertos-${PV}.bin;fsl-eula=true"
+S = "${WORKDIR}/${M4_SOC}-m4-freertos-${PV}"
+
+SRC_URI[md5sum] = "b05b780ff3916f4953ab58ac95233c38"
+SRC_URI[sha256sum] = "cc00d3b936d49b2794a2a99e10129437e70caba3fd26b8379b8c50dd22f73254"
+
+do_deploy () {
+   # Install the demo binaries
+   install -d ${DEPLOYDIR}
+   cp ${S}/*.bin ${DEPLOYDIR}/
+   ls ${DEPLOYDIR}/
+}
+
+addtask deploy before do_build after do_compile
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+COMPATIBLE_MACHINE = "(mx7)"
+
diff --git a/recipes-bsp/imx-mkimage/imx-m4-demos_2.3.0.bb b/recipes-bsp/imx-mkimage/imx-m4-demos_2.3.0.bb
new file mode 100644
index 0000000..599a5d5
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-m4-demos_2.3.0.bb
@@ -0,0 +1,42 @@
+# Copyright 2017-2018 NXP
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+SUMMARY = "i.MX M4 core Demo images"
+SECTION = "app"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://COPYING;md5=08fd295cce89b0a9c74b9b83ed74f671"
+
+inherit deploy fsl-eula-unpack2
+
+SOC ?= "imx8qm"
+SOC_mx7ulp= "imx7ulp"
+SOC_mx8mq= "imx8mq"
+SOC_mx8qm= "imx8qm"
+SOC_mx8qxp= "imx8qx"
+
+IMX_PACKAGE_NAME = "${SOC}-m4-demo-${PV}"
+SRC_URI_NAME = "${SOC}"
+
+SRC_URI[imx7ulp.md5sum] = "601472aa2056c34324ba8b2d8b656d10"
+SRC_URI[imx7ulp.sha256sum] = "6ad1d21356a5bbfdc52e4709348c7bee49e0731ef0a106f599c78817e14d3d12"
+
+SRC_URI[imx8mq.md5sum] = "c2aeda4ca7cc7d1c2916be7dd42b946f"
+SRC_URI[imx8mq.sha256sum] = "fd441e75395b0c6f90626c883ee8a93406b14e7d55adc7925116254394bb7ad8"
+
+SRC_URI[imx8qm.md5sum] = "b75dda504083ac1ee05423974c22bbce"
+SRC_URI[imx8qm.sha256sum] = "fdc486af0a02e3093559b31cb9c982f05c209bfc03da0910062091c406bfb496"
+
+SRC_URI[imx8qx.md5sum] = "b18198150c3aa5b1e01aba2047166728"
+SRC_URI[imx8qx.sha256sum] = "3b3887694b7cfe02d2918b0780f941da3d5c0e867725927b8c8f19fbff106bc9"
+
+SCR = "SCR-${SOC}-m4-demo.txt"
+
+do_deploy () {
+   # Install the demo binaries
+   cp ${D}/* ${DEPLOYDIR}/
+}
+
+addtask deploy before do_build after do_install
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+COMPATIBLE_MACHINE = "(mx7ulp|mx8mq|mx8qm|mx8qxp)"
diff --git a/recipes-bsp/imx-mkimage/imx-m4-demos_2.3.1.bb b/recipes-bsp/imx-mkimage/imx-m4-demos_2.3.1.bb
new file mode 100644
index 0000000..62ecca9
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-m4-demos_2.3.1.bb
@@ -0,0 +1,33 @@
+# Copyright 2017-2018 NXP
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+SUMMARY = "i.MX M4 core Demo images"
+SECTION = "app"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://COPYING;md5=ab61cab9599935bfe9f700405ef00f28"
+
+inherit deploy fsl-eula-unpack2
+
+SOC ?= "imx8qm"
+SOC_mx7ulp= "imx7ulp"
+SOC_mx8mq= "imx8mq"
+SOC_mx8qm= "imx8qm"
+SOC_mx8qxp= "imx8qx"
+
+IMX_PACKAGE_NAME = "${SOC}-m4-demo-${PV}"
+SRC_URI_NAME = "${SOC}"
+
+SRC_URI[imx8qx.md5sum] = "e497c9742c0f20fbc429446c8052ade7"
+SRC_URI[imx8qx.sha256sum] = "b46ac529c7c0fab9f99d39b094a9c4d6651616643f5df5ac2a4113bef02411fb"
+
+SCR = "SCR-${SOC}-m4-demo.txt"
+
+do_deploy () {
+   # Install the demo binaries
+   cp ${D}/* ${DEPLOYDIR}/
+}
+
+addtask deploy before do_build after do_install
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+COMPATIBLE_MACHINE = "(mx8qxp)"
diff --git a/recipes-bsp/imx-mkimage/imx-m4-demos_2.4.0.bb b/recipes-bsp/imx-mkimage/imx-m4-demos_2.4.0.bb
new file mode 100644
index 0000000..30100aa
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-m4-demos_2.4.0.bb
@@ -0,0 +1,33 @@
+# Copyright 2017-2018 NXP
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+SUMMARY = "i.MX M4 core Demo images"
+SECTION = "app"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://COPYING;md5=75abe2fa1d16ca79f87cde926f05f72d"
+
+inherit deploy fsl-eula-unpack2
+
+SOC ?= "imx8qm"
+SOC_mx7ulp= "imx7ulp"
+SOC_mx8mq= "imx8mq"
+SOC_mx8qm= "imx8qm"
+SOC_mx8qxp= "imx8qx"
+
+IMX_PACKAGE_NAME = "${SOC}-m4-demo-${PV}"
+SRC_URI_NAME = "${SOC}"
+
+SRC_URI[imx7ulp.md5sum] = "cf2c88b91b4f87781365d8b0921d1cf3"
+SRC_URI[imx7ulp.sha256sum] = "f4852a8da27bec0853ef499614d9337d586749805bc2c3d58500a7016ae52bdb"
+
+SCR = "SCR-${SOC}-m4-demo.txt"
+
+do_deploy () {
+   # Install the demo binaries
+   cp ${D}/* ${DEPLOYDIR}/
+}
+
+addtask deploy before do_build after do_install
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+COMPATIBLE_MACHINE = "(mx7ulp)"
diff --git a/recipes-bsp/imx-mkimage/imx-mkimage_git.bb b/recipes-bsp/imx-mkimage/imx-mkimage_git.bb
new file mode 100644
index 0000000..b0a2719
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-mkimage_git.bb
@@ -0,0 +1,35 @@
+# Copyright (C) 2016 Freescale Semiconductor
+# Copyright 2017-2018 NXP
+
+require imx-mkimage_git.inc
+
+DESCRIPTION = "i.MX make image"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6"
+SECTION = "BSP"
+
+inherit native deploy
+
+CFLAGS = "-O2 -Wall -std=c99 -static -I ${STAGING_INCDIR} -L ${STAGING_LIBDIR}"
+
+do_compile () {
+    cd ${S}
+    oe_runmake clean
+    oe_runmake bin
+    oe_runmake -C iMX8M -f soc.mak mkimage_imx8
+    oe_runmake -C iMX8QM -f soc.mak imx8qm_dcd.cfg.tmp
+    oe_runmake -C iMX8QX -f soc.mak imx8qx_dcd.cfg.tmp
+}
+
+do_install () {
+    cd ${S}
+    install -d ${D}${bindir}
+    install -m 0755 iMX8M/mkimage_imx8 ${D}${bindir}/mkimage_imx8m
+    install -m 0755 mkimage_imx8 ${D}${bindir}/mkimage_imx8
+}
+
+do_deploy () {
+    install -m 0644 ${S}/iMX8QM/imx8qm_dcd.cfg.tmp ${DEPLOYDIR}
+    install -m 0644 ${S}/iMX8QX/imx8qx_dcd.cfg.tmp ${DEPLOYDIR}
+}
+addtask deploy before do_build after do_install
diff --git a/recipes-bsp/imx-mkimage/imx-mkimage_git.inc b/recipes-bsp/imx-mkimage/imx-mkimage_git.inc
new file mode 100644
index 0000000..d4eaead
--- /dev/null
+++ b/recipes-bsp/imx-mkimage/imx-mkimage_git.inc
@@ -0,0 +1,11 @@
+# Copyright 2017-2018 NXP
+
+DEPENDS = "zlib-native openssl-native"
+
+SRCBRANCH = "imx_4.9.88_imx8qxp_beta2"
+SRC_URI = "git://source.codeaurora.org/external/imx/imx-mkimage.git;protocol=https;branch=${SRCBRANCH}"
+SRCREV = "5c18f544c460747daed2844714c49685ed6ce897"
+S = "${WORKDIR}/git"
+
+BOOT_TOOLS = "imx-boot-tools"
+SYSROOT_DIRS += "/boot"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 32/52] alsa-state: Fix buffer size issue
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
  2018-07-30 19:43 ` [PATCH 31/52] imx-boot: Add recipes for i.MX 8 boot partition packages Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 33/52] alsa-state: Add support for splitting ESAI device Tom Hochstein
                   ` (19 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Fix incorrect buffer size by removing buffer_time from dmix
configuration settings.

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/alsa-state/alsa-state/imx/asound.conf | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
index 7f8eef1..37cb76f 100644
--- a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
+++ b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
@@ -7,7 +7,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 320000
 format S16_LE
 rate 48000
 }
@@ -20,7 +19,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 44100
 }
@@ -33,7 +31,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 32000
 }
@@ -46,7 +43,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 24000
 }
@@ -59,7 +55,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 22050
 }
@@ -72,7 +67,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 16000
 }
@@ -85,7 +79,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 240000
 format S16_LE
 rate 12000
 }
@@ -98,7 +91,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 240000
 format S16_LE
 rate 11025
 }
@@ -111,7 +103,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 8000
 }
@@ -124,7 +115,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 320000
 format S16_LE
 rate 48000
 }
@@ -137,7 +127,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 44100
 }
@@ -150,7 +139,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 32000
 }
@@ -163,7 +151,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 24000
 }
@@ -176,7 +163,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 22050
 }
@@ -189,7 +175,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 16000
 }
@@ -202,7 +187,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 240000
 format S16_LE
 rate 12000
 }
@@ -215,7 +199,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 240000
 format S16_LE
 rate 11025
 }
@@ -228,7 +211,6 @@ ipc_key_add_uid yes
 slave{
 pcm "hw:0,0"
 period_time 40000
-buffer_time 360000
 format S16_LE
 rate 8000
 }
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 33/52] alsa-state: Add support for splitting ESAI device
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
  2018-07-30 19:43 ` [PATCH 31/52] imx-boot: Add recipes for i.MX 8 boot partition packages Tom Hochstein
  2018-07-30 19:43 ` [PATCH 32/52] alsa-state: Fix buffer size issue Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 34/52] alsa-state: Fix channel swap issues Tom Hochstein
                   ` (18 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Split one ESAI device into two virtual devices, one
6 channel and one 2 channel.

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/alsa-state/alsa-state/imx/asound.conf | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
index 37cb76f..0084f4a 100644
--- a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
+++ b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
@@ -242,3 +242,30 @@ ctl.mixer0{
 type hw
 card 0
 }
+
+pcm_slave.esai{
+	pcm "hw:0,0"
+	channels 8
+	rate 48000
+	period_time 40000
+}
+
+pcm.esaich1to6{
+	type dshare
+	ipc_key 5778293
+	slave esai
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+}
+
+pcm.esaich78{
+	type dshare
+	ipc_key 5778293
+	slave esai
+	bindings.0 3
+	bindings.1 7
+}
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 34/52] alsa-state: Fix channel swap issues
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (2 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 33/52] alsa-state: Add support for splitting ESAI device Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 35/52] alsa-state: Fix HDMI for i.MX 8M Tom Hochstein
                   ` (17 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Fix channel swap issues seen for ak4458 and ak5558 codecs on audio board
for i.MX 8MQ. Changes applicable to all platforms.

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/alsa-state/alsa-state/imx/asound.conf | 158 ++++++++++++++++++++++
 1 file changed, 158 insertions(+)

diff --git a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
index 0084f4a..0f9d0c8 100644
--- a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
+++ b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
@@ -269,3 +269,161 @@ pcm.esaich78{
 	bindings.0 3
 	bindings.1 7
 }
+
+pcm_slave.sai5 {
+	pcm "hw:5,0"
+	channels 8
+}
+
+pcm.sai5_ch1to8 {
+	type dsnoop
+	ipc_key 5185558
+	slave sai5
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+	bindings.6 3
+	bindings.7 7
+}
+
+pcm.sai5_ch1to6 {
+	type dsnoop
+	ipc_key 5165558
+	slave sai5
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+}
+
+pcm.sai5_ch1to4 {
+	type dsnoop
+	ipc_key 5145558
+	slave sai5
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+}
+
+pcm_slave.sai1{
+	pcm "hw:4,0"
+	channels 16
+}
+
+pcm.sai1to16{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+	bindings.10 5
+	bindings.11 13
+	bindings.12 6
+	bindings.13 14
+	bindings.14 7
+	bindings.15 15
+}
+
+pcm.sai1to14{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+	bindings.10 5
+	bindings.11 13
+	bindings.12 6
+	bindings.13 14
+}
+
+pcm.sai1to12{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+	bindings.10 5
+	bindings.11 13
+}
+
+pcm.sai1to10{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+}
+
+pcm.sai1to8{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+}
+
+pcm.sai1to6{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+}
+
+pcm.sai1to4{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+}
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 35/52] alsa-state: Fix HDMI for i.MX 8M
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (3 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 34/52] alsa-state: Fix channel swap issues Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 36/52] alsa-state: Add new codecs " Tom Hochstein
                   ` (16 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Channel mapping on HDMI was incorrect for 4 and 8 channels.
Create a PCM device so alsa-lib will remap in user space.

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/alsa-state/alsa-state/imx/asound.conf | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
index 0f9d0c8..c511018 100644
--- a/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
+++ b/recipes-bsp/alsa-state/alsa-state/imx/asound.conf
@@ -427,3 +427,33 @@ pcm.sai1to4{
 	bindings.2 1
 	bindings.3 9
 }
+
+pcm.cdnhdmi4ch {
+	type dshare
+	slave {
+		pcm "hw:3,0"
+		channels 4
+	}
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 2
+	bindings.2 1
+	bindings.3 3
+}
+
+pcm.cdnhdmi8ch {
+	type dshare
+	slave {
+		pcm "hw:3,0"
+		channels 8
+	}
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+	bindings.6 3
+	bindings.7 7
+}
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 36/52] alsa-state: Add new codecs for i.MX 8M
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (4 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 35/52] alsa-state: Fix HDMI for i.MX 8M Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 37/52] alsa-state: Add i.MX 8 series support Tom Hochstein
                   ` (15 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Add support for AK4458, AK5558, and AK4497.

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/alsa-state/alsa-state/imx/asound.state | 1546 ++++++++++++++++++++
 1 file changed, 1546 insertions(+)

diff --git a/recipes-bsp/alsa-state/alsa-state/imx/asound.state b/recipes-bsp/alsa-state/alsa-state/imx/asound.state
index 4984a56..87f4499 100755
--- a/recipes-bsp/alsa-state/alsa-state/imx/asound.state
+++ b/recipes-bsp/alsa-state/alsa-state/imx/asound.state
@@ -5544,3 +5544,1549 @@ state.sii902xaudio {
 	control {
 	}
 }
+state.ak4458audio {
+	control.1 {
+		iface MIXER
+		name '0 AK4458 L1ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.2 {
+		iface MIXER
+		name '0 AK4458 R1ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.3 {
+		iface MIXER
+		name '0 AK4458 L2ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.4 {
+		iface MIXER
+		name '0 AK4458 R2ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.5 {
+		iface MIXER
+		name '0 AK4458 L3ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.6 {
+		iface MIXER
+		name '0 AK4458 R3ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.7 {
+		iface MIXER
+		name '0 AK4458 L4ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.8 {
+		iface MIXER
+		name '0 AK4458 R4ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.9 {
+		iface MIXER
+		name '0 AK4458 De-emphasis Response DAC1'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.10 {
+		iface MIXER
+		name '0 AK4458 De-emphasis Response DAC2'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.11 {
+		iface MIXER
+		name '0 AK4458 De-emphasis Response DAC3'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.12 {
+		iface MIXER
+		name '0 AK4458 De-emphasis Response DAC4'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.13 {
+		iface MIXER
+		name '0 AK4458 Digital Filter Setting'
+		value 'Sharp Roll-Off Filter'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Sharp Roll-Off Filter'
+			item.1 'Slow Roll-Off Filter'
+			item.2 'Short delay Sharp Roll-Off Filter'
+			item.3 'Short delay Slow Roll-Off Filter'
+			item.4 'Super Slow Roll-Off Filter'
+		}
+	}
+	control.14 {
+		iface MIXER
+		name '0 AK4458 Inverting Enable of DZFB'
+		value H
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 H
+			item.1 L
+		}
+	}
+	control.15 {
+		iface MIXER
+		name '0 AK4458 Sound Mode'
+		value 'Sound Mode 0'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Sound Mode 0'
+			item.1 'Sound Mode 1'
+			item.2 'Sound Mode 2'
+		}
+	}
+	control.16 {
+		iface MIXER
+		name '0 AK4458 SDS Setting'
+		value 'Setting 0'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Setting 0'
+			item.1 'Setting 1'
+			item.2 'Setting 2'
+			item.3 'Setting 3'
+			item.4 'Setting 4'
+			item.5 'Setting 5'
+			item.6 'Setting 6'
+			item.7 'Setting 7'
+		}
+	}
+	control.17 {
+		iface MIXER
+		name '0 AK4458 FIR Filter Mode Setting'
+		value 'Mode 0'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Mode 0'
+			item.1 'Mode 1'
+			item.2 'Mode 2'
+			item.3 'Mode 3'
+			item.4 'Mode 4'
+			item.5 'Mode 5'
+			item.6 'Mode 6'
+			item.7 'Mode 7'
+		}
+	}
+	control.18 {
+		iface MIXER
+		name '0 AK4458 TDM Mode Setting'
+		value 'Normal Mode'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Normal Mode'
+			item.1 'TDM128 Mode'
+			item.2 'TDM256 Mode'
+			item.3 'TDM512 Mode'
+		}
+	}
+	control.19 {
+		iface MIXER
+		name '0 AK4458 DAC1 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.20 {
+		iface MIXER
+		name '0 AK4458 DAC2 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.21 {
+		iface MIXER
+		name '0 AK4458 DAC3 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.22 {
+		iface MIXER
+		name '0 AK4458 DAC4 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.23 {
+		iface MIXER
+		name '0 AK4458 Attenuation transition Time Settin'
+		value '4080/fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '4080/fs'
+			item.1 '2040/fs'
+			item.2 '510/fs'
+			item.3 '255/fs'
+		}
+	}
+	control.24 {
+		iface MIXER
+		name '0 AK4458 BICK fs Setting'
+		value '64fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '32fs,48fs'
+			item.1 '64fs'
+		}
+	}
+	control.25 {
+		iface MIXER
+		name '1 AK4458 L1ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.26 {
+		iface MIXER
+		name '1 AK4458 R1ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.27 {
+		iface MIXER
+		name '1 AK4458 L2ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.28 {
+		iface MIXER
+		name '1 AK4458 R2ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.29 {
+		iface MIXER
+		name '1 AK4458 L3ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.30 {
+		iface MIXER
+		name '1 AK4458 R3ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.31 {
+		iface MIXER
+		name '1 AK4458 L4ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.32 {
+		iface MIXER
+		name '1 AK4458 R4ch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -9999999
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.33 {
+		iface MIXER
+		name '1 AK4458 De-emphasis Response DAC1'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.34 {
+		iface MIXER
+		name '1 AK4458 De-emphasis Response DAC2'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.35 {
+		iface MIXER
+		name '1 AK4458 De-emphasis Response DAC3'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.36 {
+		iface MIXER
+		name '1 AK4458 De-emphasis Response DAC4'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.37 {
+		iface MIXER
+		name '1 AK4458 Digital Filter Setting'
+		value 'Sharp Roll-Off Filter'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Sharp Roll-Off Filter'
+			item.1 'Slow Roll-Off Filter'
+			item.2 'Short delay Sharp Roll-Off Filter'
+			item.3 'Short delay Slow Roll-Off Filter'
+			item.4 'Super Slow Roll-Off Filter'
+		}
+	}
+	control.38 {
+		iface MIXER
+		name '1 AK4458 Inverting Enable of DZFB'
+		value H
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 H
+			item.1 L
+		}
+	}
+	control.39 {
+		iface MIXER
+		name '1 AK4458 Sound Mode'
+		value 'Sound Mode 0'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Sound Mode 0'
+			item.1 'Sound Mode 1'
+			item.2 'Sound Mode 2'
+		}
+	}
+	control.40 {
+		iface MIXER
+		name '1 AK4458 SDS Setting'
+		value 'Setting 0'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Setting 0'
+			item.1 'Setting 1'
+			item.2 'Setting 2'
+			item.3 'Setting 3'
+			item.4 'Setting 4'
+			item.5 'Setting 5'
+			item.6 'Setting 6'
+			item.7 'Setting 7'
+		}
+	}
+	control.41 {
+		iface MIXER
+		name '1 AK4458 FIR Filter Mode Setting'
+		value 'Mode 0'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Mode 0'
+			item.1 'Mode 1'
+			item.2 'Mode 2'
+			item.3 'Mode 3'
+			item.4 'Mode 4'
+			item.5 'Mode 5'
+			item.6 'Mode 6'
+			item.7 'Mode 7'
+		}
+	}
+	control.42 {
+		iface MIXER
+		name '1 AK4458 TDM Mode Setting'
+		value 'Normal Mode'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Normal Mode'
+			item.1 'TDM128 Mode'
+			item.2 'TDM256 Mode'
+			item.3 'TDM512 Mode'
+		}
+	}
+	control.43 {
+		iface MIXER
+		name '1 AK4458 DAC1 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.44 {
+		iface MIXER
+		name '1 AK4458 DAC2 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.45 {
+		iface MIXER
+		name '1 AK4458 DAC3 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.46 {
+		iface MIXER
+		name '1 AK4458 DAC4 LRch Setting'
+		value 'Lch In, Rch In'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Lch In, Rch In'
+			item.1 'Lch In, Rch In Invert'
+			item.2 'Lch In Invert, Rch In'
+			item.3 'Lch In Invert, Rch In Invert'
+			item.4 'Rch In, Lch In'
+			item.5 'Rch In, Lch In Invert'
+			item.6 'Rch In Invert, Lch In'
+			item.7 'Rch In Invert, Lch In Invert'
+			item.8 'Lch In, Lch In'
+			item.9 'Lch In, Lch In Invert'
+			item.10 'Lch In Invert, Lch In'
+			item.11 'Lch In Invert, Lch In Invert'
+			item.12 'Rch In, Rch In'
+			item.13 'Rch In, Rch In Invert'
+			item.14 'Rch In Invert, Rch In'
+			item.15 'Rch In Invert, Rch In Invert'
+		}
+	}
+	control.47 {
+		iface MIXER
+		name '1 AK4458 Attenuation transition Time Settin'
+		value '4080/fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '4080/fs'
+			item.1 '2040/fs'
+			item.2 '510/fs'
+			item.3 '255/fs'
+		}
+	}
+	control.48 {
+		iface MIXER
+		name '1 AK4458 BICK fs Setting'
+		value '64fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '32fs,48fs'
+			item.1 '64fs'
+		}
+	}
+	control.49 {
+		iface MIXER
+		name '0 DAC1 to AOUTA'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.50 {
+		iface MIXER
+		name '0 DAC2 to AOUTB'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.51 {
+		iface MIXER
+		name '0 DAC3 to AOUTC'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.52 {
+		iface MIXER
+		name '0 DAC4 to AOUTD'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.53 {
+		iface MIXER
+		name '1 DAC1 to AOUTA'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.54 {
+		iface MIXER
+		name '1 DAC2 to AOUTB'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.55 {
+		iface MIXER
+		name '1 DAC3 to AOUTC'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+	control.56 {
+		iface MIXER
+		name '1 DAC4 to AOUTD'
+		value ON
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 OFF
+			item.1 ON
+		}
+	}
+}
+state.ak5558audio {
+	control.1 {
+		iface MIXER
+		name 'AK5558 Monaural Mode'
+		value '8 Slot'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '8 Slot'
+			item.1 '2 Slot'
+			item.2 '4 Slot'
+			item.3 '1 Slot'
+		}
+	}
+	control.2 {
+		iface MIXER
+		name 'AK5558 TDM mode'
+		value Off
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 TDM128
+			item.2 TDM256
+			item.3 TDM512
+		}
+	}
+	control.3 {
+		iface MIXER
+		name 'AK5558 Digital Filter'
+		value 'Sharp Roll-Off'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Sharp Roll-Off'
+			item.1 'Show Roll-Off'
+			item.2 'Short Delay Sharp Roll-Off'
+			item.3 'Short Delay Show Roll-Off'
+		}
+	}
+	control.4 {
+		iface MIXER
+		name 'AK5558 DSD Mode'
+		value PCM
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 PCM
+			item.1 DSD
+		}
+	}
+	control.5 {
+		iface MIXER
+		name 'AK5558 Frequency of DCLK'
+		value '64fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '64fs'
+			item.1 '128fs'
+			item.2 '256fs'
+		}
+	}
+	control.6 {
+		iface MIXER
+		name 'AK5558 Polarity of DCLK'
+		value Falling
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Falling
+			item.1 Rising
+		}
+	}
+	control.7 {
+		iface MIXER
+		name 'AK5558 Master Clock Frequency at DSD Mode'
+		value '512fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '512fs'
+			item.1 '768fs'
+		}
+	}
+	control.8 {
+		iface MIXER
+		name 'AK5558 DSD Phase Modulation'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.9 {
+		iface MIXER
+		name 'AK5558 Ch1 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.10 {
+		iface MIXER
+		name 'AK5558 Ch2 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.11 {
+		iface MIXER
+		name 'AK5558 Ch3 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.12 {
+		iface MIXER
+		name 'AK5558 Ch4 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.13 {
+		iface MIXER
+		name 'AK5558 Ch5 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.14 {
+		iface MIXER
+		name 'AK5558 Ch6 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.15 {
+		iface MIXER
+		name 'AK5558 Ch7 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+	control.16 {
+		iface MIXER
+		name 'AK5558 Ch8 Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+}
+state.ak4497audio {
+	control.1 {
+		iface MIXER
+		name 'AK4497 Lch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -12750
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.2 {
+		iface MIXER
+		name 'AK4497 Rch Digital Volume'
+		value 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 255'
+			dbmin -12750
+			dbmax 0
+			dbvalue.0 0
+		}
+	}
+	control.3 {
+		iface MIXER
+		name 'AK4497 EX DF I/F clock'
+		value '768kHz'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '768kHz'
+			item.1 '384kHz'
+		}
+	}
+	control.4 {
+		iface MIXER
+		name 'AK4497 De-emphasis Response'
+		value OFF
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '44.1kHz'
+			item.1 OFF
+			item.2 '48kHz'
+			item.3 '32kHz'
+		}
+	}
+	control.5 {
+		iface MIXER
+		name 'AK4497 Data Zero Detect Mode'
+		value Separated
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Separated
+			item.1 ANDed
+		}
+	}
+	control.6 {
+		iface MIXER
+		name 'AK4497 Data Selection at Mono Mode'
+		value Rch
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Rch
+			item.1 Lch
+		}
+	}
+	control.7 {
+		iface MIXER
+		name 'AK4497 Polarity of DCLK'
+		value Falling
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Falling
+			item.1 Rising
+		}
+	}
+	control.8 {
+		iface MIXER
+		name 'AK4497 DCKL Frequency'
+		value '512fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '512fs'
+			item.1 '768fs'
+		}
+	}
+	control.9 {
+		iface MIXER
+		name 'AK4497 DDSD Play Back Path'
+		value Normal
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Normal
+			item.1 'Volume Bypass'
+		}
+	}
+	control.10 {
+		iface MIXER
+		name 'AK4497 Sound control'
+		value 'Setting 1'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Setting 1'
+			item.1 'Setting 2'
+			item.2 'Setting 3'
+		}
+	}
+	control.11 {
+		iface MIXER
+		name 'AK4497 Cut Off of DSD Filter'
+		value '50kHz'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '50kHz'
+			item.1 '150kHz'
+		}
+	}
+	control.12 {
+		iface MIXER
+		name 'AK4497 DSD Data Stream'
+		value '64fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '64fs'
+			item.1 '128fs'
+			item.2 '256fs'
+			item.3 '512fs'
+		}
+	}
+	control.13 {
+		iface MIXER
+		name 'AK4497 BICK Frequency Select'
+		value '64fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '48fs'
+			item.1 '64fs'
+		}
+	}
+	control.14 {
+		iface MIXER
+		name 'AK4497 TDM Data Select'
+		value L1R1
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 L1R1
+			item.1 TDM128_L1R1
+			item.2 TDM128_L2R2
+			item.3 TDM256_L1R1
+			item.4 TDM256_L2R2
+			item.5 TDM256_L3R3
+			item.6 TDM256_L4R4
+			item.7 TDM512_L1R1
+			item.8 TDM512_L2R2
+			item.9 TDM512_L3R3
+			item.10 TDM512_L4R4
+			item.11 TDM512_L5R5
+			item.12 TDM512_L6R6
+			item.13 TDM512_L7R7
+			item.14 TDM512_L8R8
+		}
+	}
+	control.15 {
+		iface MIXER
+		name 'AK4497 External Digital Filter'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.16 {
+		iface MIXER
+		name 'AK4497 MCLK Frequency Auto Setting'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.17 {
+		iface MIXER
+		name 'AK4497 MCLK FS Auto Detect'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.18 {
+		iface MIXER
+		name 'AK4497 Soft Mute Control'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.19 {
+		iface MIXER
+		name 'AK4497 Short delay filter'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.20 {
+		iface MIXER
+		name 'AK4497 Data Zero Detect Enable'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.21 {
+		iface MIXER
+		name 'AK4497 Slow Roll-off Filter'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.22 {
+		iface MIXER
+		name 'AK4497 Invering Enable of DZF'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.23 {
+		iface MIXER
+		name 'AK4497 Mono Mode'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.24 {
+		iface MIXER
+		name 'AK4497 Super Slow Roll-off Filter'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.25 {
+		iface MIXER
+		name 'AK4497 AOUTR Phase Inverting'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.26 {
+		iface MIXER
+		name 'AK4497 AOUTL Phase Inverting'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.27 {
+		iface MIXER
+		name 'AK4497 DSD Mute Release'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.28 {
+		iface MIXER
+		name 'AK4497 DSD Mute Control Hold'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.29 {
+		iface MIXER
+		name 'AK4497 DSDR is detected'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.30 {
+		iface MIXER
+		name 'AK4497 DSDL is detected'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.31 {
+		iface MIXER
+		name 'AK4497 DSD Data Mute'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.32 {
+		iface MIXER
+		name 'AK4497 Synchronization Control'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.33 {
+		iface MIXER
+		name 'AK4497 Output Level'
+		value '2.8_2.8Vpp'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '2.8_2.8Vpp'
+			item.1 '2.8_2.5Vpp'
+			item.2 '2.5_2.5Vpp'
+			item.3 '3.75_3.75Vpp'
+			item.4 '3.75_2.5Vpp'
+		}
+	}
+	control.34 {
+		iface MIXER
+		name 'AK4497 High Sonud Quality Mode'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.35 {
+		iface MIXER
+		name 'AK4497 Heavy Load Mode'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.36 {
+		iface MIXER
+		name 'AK4497 DSD Data Input Pin'
+		value '3_4_5pin'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '16_17_19pin'
+			item.1 '3_4_5pin'
+		}
+	}
+	control.37 {
+		iface MIXER
+		name 'AK4497 Daisy Chain'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.38 {
+		iface MIXER
+		name 'AK4497 ATT Transit Time'
+		value '4080/fs'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 '4080/fs'
+			item.1 '2040/fs'
+			item.2 '510/fs'
+			item.3 '255/fs'
+		}
+	}
+	control.39 {
+		iface MIXER
+		name 'AK4497 Read FS Auto Detect Mode'
+		value 'Normal Speed Mode'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'Normal Speed Mode'
+			item.1 'Double Speed Mode'
+			item.2 'Quad Speed Mode'
+			item.3 'Quad Speed Mode'
+			item.4 'Oct Speed Mode'
+			item.5 'Hex Speed Mode'
+			item.6 'Oct Speed Mode'
+			item.7 'Hex Speed Mode'
+		}
+	}
+	control.40 {
+		iface MIXER
+		name 'AK4497 DAC Enable'
+		value On
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 Off
+			item.1 On
+		}
+	}
+}
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 37/52] alsa-state: Add i.MX 8 series support
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (5 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 36/52] alsa-state: Add new codecs " Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 38/52] firmware-imx: Update to 7.6 Tom Hochstein
                   ` (14 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/alsa-state/alsa-state.bbappend | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/recipes-bsp/alsa-state/alsa-state.bbappend b/recipes-bsp/alsa-state/alsa-state.bbappend
index 08e4859..3a398b2 100644
--- a/recipes-bsp/alsa-state/alsa-state.bbappend
+++ b/recipes-bsp/alsa-state/alsa-state.bbappend
@@ -1,8 +1,10 @@
 # Append path for freescale layer to include alsa-state asound.conf
 FILESEXTRAPATHS_prepend_mx6 := "${THISDIR}/${PN}/imx:"
 FILESEXTRAPATHS_prepend_mx7 := "${THISDIR}/${PN}/imx:"
+FILESEXTRAPATHS_prepend_mx8 := "${THISDIR}/${PN}/imx:"
 FILESEXTRAPATHS_prepend_use-mainline-bsp := "${THISDIR}/${PN}/imx:"
 
 PACKAGE_ARCH_mx6 = "${MACHINE_ARCH}"
 PACKAGE_ARCH_mx7 = "${MACHINE_ARCH}"
+PACKAGE_ARCH_mx8 = "${MACHINE_ARCH}"
 PACKAGE_ARCH_use-mainline-bsp = "${MACHINE_ARCH}"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 38/52] firmware-imx: Update to 7.6
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (6 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 37/52] alsa-state: Add i.MX 8 series support Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 39/52] firmware-imx: Add support for BCM4356 and BCM89359 Tom Hochstein
                   ` (13 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 .../firmware-imx/{firmware-imx_7.5.bb => firmware-imx_7.6.bb}      | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
 rename recipes-bsp/firmware-imx/{firmware-imx_7.5.bb => firmware-imx_7.6.bb} (93%)

diff --git a/recipes-bsp/firmware-imx/firmware-imx_7.5.bb b/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
similarity index 93%
rename from recipes-bsp/firmware-imx/firmware-imx_7.5.bb
rename to recipes-bsp/firmware-imx/firmware-imx_7.6.bb
index 3bebe5b..4f75ac0 100644
--- a/recipes-bsp/firmware-imx/firmware-imx_7.5.bb
+++ b/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
@@ -1,10 +1,11 @@
 # Copyright (C) 2012-2016 Freescale Semiconductor
+# Copyright 2017-2018 NXP
 # Copyright (C) 2018 O.S. Systems Software LTDA.
 SUMMARY = "Freescale IMX firmware"
 DESCRIPTION = "Freescale IMX firmware such as for the VPU"
 SECTION = "base"
 LICENSE = "Proprietary"
-LIC_FILES_CHKSUM = "file://COPYING;md5=75abe2fa1d16ca79f87cde926f05f72d"
+LIC_FILES_CHKSUM = "file://COPYING;md5=ab61cab9599935bfe9f700405ef00f28"
 
 PE = "1"
 
@@ -15,8 +16,8 @@ SRC_URI = "${FSL_MIRROR}/firmware-imx-${PV}.bin;fsl-eula=true \
 #BRCM firmware git
 SRCREV = "8ce9046f5058fdd2c5271f86ccfc61bc5a248ae3"
 
-SRC_URI[md5sum] = "3851bb89ff262e9322a631755215f538"
-SRC_URI[sha256sum] = "a8f099bdf786b2da1e8b43094950c033ccdbf93f1b8a93caffb912e1500cd735"
+SRC_URI[md5sum] = "3f6a00c3dfc0693c050bf39824865d28"
+SRC_URI[sha256sum] = "6c1e4d4f33b216f69eb46a6dff7a3e10d722afb694acd412c5398ccc270f8a9c"
 
 inherit fsl-eula-unpack allarch
 
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 39/52] firmware-imx: Add support for BCM4356 and BCM89359
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (7 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 38/52] firmware-imx: Update to 7.6 Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:43 ` [PATCH 40/52] firmware-imx: Add i.MX 8 support Tom Hochstein
                   ` (12 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/firmware-imx/firmware-imx_7.6.bb | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/recipes-bsp/firmware-imx/firmware-imx_7.6.bb b/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
index 4f75ac0..6c5f73c 100644
--- a/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
+++ b/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
@@ -39,12 +39,21 @@ do_install() {
     cp -rfv git/brcm/1BW_BCM43340/*.cal ${D}${base_libdir}/firmware/bcm/1BW_BCM43340
     cp -rfv git/brcm/1BW_BCM43340/*.hcd ${D}${sysconfdir}/firmware/
 
+    #1CX_BCM4356
+    install -d ${D}${base_libdir}/firmware/bcm/1CX_BCM4356
+    cp -rfv git/brcm/1CX_BCM4356/fw_bcmdhd.bin ${D}${base_libdir}/firmware/bcm/1CX_BCM4356
+
     #1DX_BCM4343W
     install -d ${D}${base_libdir}/firmware/bcm/1DX_BCM4343W
     cp -rfv git/brcm/1DX_BCM4343W/*.bin ${D}${base_libdir}/firmware/bcm/1DX_BCM4343W
     cp -rfv git/brcm/1DX_BCM4343W/*.cal ${D}${base_libdir}/firmware/bcm/1DX_BCM4343W
     cp -rfv git/brcm/1DX_BCM4343W/*.hcd ${D}${sysconfdir}/firmware/
 
+    #1FD_BCM89359
+    install -d ${D}${base_libdir}/firmware/bcm/1FD_BCM89359
+    cp -rfv git/brcm/1FD_BCM89359/*.bin ${D}${base_libdir}/firmware/bcm/1FD_BCM89359
+    cp -rfv git/brcm/1FD_BCM89359/*.hcd ${D}${sysconfdir}/firmware/
+
     #SN8000_BCM43362
     install -d ${D}${base_libdir}/firmware/bcm/SN8000_BCM43362
     cp -rfv git/brcm/SN8000_BCM43362/*.bin ${D}${base_libdir}/firmware/bcm/SN8000_BCM43362
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 40/52] firmware-imx: Add i.MX 8 support
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (8 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 39/52] firmware-imx: Add support for BCM4356 and BCM89359 Tom Hochstein
@ 2018-07-30 19:43 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 41/52] firmware-qca9377: Add support for QCA9377 on i.MX 7ULP Tom Hochstein
                   ` (11 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:43 UTC (permalink / raw)
  To: meta-freescale

- Add DDR for 8MQ
- Add HDMI for 8QM
- Add SECO for 8QXP

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/firmware-imx/firmware-imx_7.6.bb | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/recipes-bsp/firmware-imx/firmware-imx_7.6.bb b/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
index 6c5f73c..85229cf 100644
--- a/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
+++ b/recipes-bsp/firmware-imx/firmware-imx_7.6.bb
@@ -19,7 +19,7 @@ SRCREV = "8ce9046f5058fdd2c5271f86ccfc61bc5a248ae3"
 SRC_URI[md5sum] = "3f6a00c3dfc0693c050bf39824865d28"
 SRC_URI[sha256sum] = "6c1e4d4f33b216f69eb46a6dff7a3e10d722afb694acd412c5398ccc270f8a9c"
 
-inherit fsl-eula-unpack allarch
+inherit fsl-eula-unpack allarch deploy
 
 do_install() {
     install -d ${D}${base_libdir}/firmware/imx
@@ -76,6 +76,27 @@ do_install() {
     find ${D}${base_libdir}/firmware/ -name '*.mk' -exec rm '{}' ';'
 }
 
+do_deploy() {
+}
+do_deploy_append_mx8mq() {
+    # Synopsys DDR
+    for ddr_firmware in ${DDR_FIRMWARE_NAME}; do
+        install -m 0644 ${S}/firmware/ddr/synopsys/${ddr_firmware} ${DEPLOYDIR}
+    done
+    install -m 0644 ${S}/firmware/hdmi/cadence/signed_hdmi_imx8m.bin ${DEPLOYDIR}
+}
+do_deploy_append_mx8qm() {
+    # Cadence HDMI
+    install -m 0644 ${S}/firmware/hdmi/cadence/hdmitxfw.bin ${DEPLOYDIR}
+    install -m 0644 ${S}/firmware/hdmi/cadence/hdmirxfw.bin ${DEPLOYDIR}
+    install -m 0644 ${S}/firmware/hdmi/cadence/dpfw.bin ${DEPLOYDIR}
+}
+do_deploy_append_mx8qxp() {
+    # SECO
+    install -m 0644 ${S}/firmware/seco/ahab-container.img ${DEPLOYDIR}
+}
+addtask deploy before do_build after do_install
+
 python populate_packages_prepend() {
     vpudir = bb.data.expand('${base_libdir}/firmware/vpu', d)
     do_split_packages(d, vpudir, '^vpu_fw_([^_]*).*\.bin',
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 41/52] firmware-qca9377: Add support for QCA9377 on i.MX 7ULP
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (9 preceding siblings ...)
  2018-07-30 19:43 ` [PATCH 40/52] firmware-imx: Add i.MX 8 support Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 42/52] firmware-qca6174: Add support for QCA6174 on i.MX 8 Series Tom Hochstein
                   ` (10 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 conf/machine/imx7ulpevk.conf                     |  2 +-
 conf/machine/include/imx-base.inc                |  3 +++
 recipes-bsp/firmware-qca/firmware-qca.inc        | 15 +++++++++++++
 recipes-bsp/firmware-qca/firmware-qca9377_2.0.bb | 27 ++++++++++++++++++++++++
 4 files changed, 46 insertions(+), 1 deletion(-)
 create mode 100644 recipes-bsp/firmware-qca/firmware-qca.inc
 create mode 100644 recipes-bsp/firmware-qca/firmware-qca9377_2.0.bb

diff --git a/conf/machine/imx7ulpevk.conf b/conf/machine/imx7ulpevk.conf
index d077de7..6fa9098 100644
--- a/conf/machine/imx7ulpevk.conf
+++ b/conf/machine/imx7ulpevk.conf
@@ -7,7 +7,7 @@
 require conf/machine/include/imx-base.inc
 require conf/machine/include/tune-cortexa7.inc
 
-MACHINE_FEATURES += " pci wifi bluetooth"
+MACHINE_FEATURES += " pci wifi bluetooth qca9377"
 
 MACHINEOVERRIDES =. "mx7:mx7ulp:"
 
diff --git a/conf/machine/include/imx-base.inc b/conf/machine/include/imx-base.inc
index 50fd10a..789c466 100644
--- a/conf/machine/include/imx-base.inc
+++ b/conf/machine/include/imx-base.inc
@@ -203,6 +203,9 @@ MACHINE_EXTRA_RRECOMMENDS_append_mx6ull = " ${@bb.utils.contains('DISTRO_FEATURE
 MACHINE_EXTRA_RRECOMMENDS_append_mx7d = " ${@bb.utils.contains('DISTRO_FEATURES', 'alsa', 'imx-alsa-plugins', '', d)}"
 MACHINE_EXTRA_RRECOMMENDS_append_mx7ulp = " ${@bb.utils.contains('DISTRO_FEATURES', 'alsa', 'imx-alsa-plugins', '', d)}"
 
+# Extra QCA Wi-Fi & BTE driver and firmware
+MACHINE_EXTRA_RRECOMMENDS_append = " ${@bb.utils.contains('MACHINE_FEATURES', 'qca9377', 'firmware-qca9377 kernel-module-qca9377 qca-tools', '', d)}"
+
 # Extra udev rules
 MACHINE_EXTRA_RRECOMMENDS += "udev-rules-imx"
 
diff --git a/recipes-bsp/firmware-qca/firmware-qca.inc b/recipes-bsp/firmware-qca/firmware-qca.inc
new file mode 100644
index 0000000..20d1fa5
--- /dev/null
+++ b/recipes-bsp/firmware-qca/firmware-qca.inc
@@ -0,0 +1,15 @@
+# Copyright 2018 NXP
+
+SUMMARY = "Qualcomm Wi-Fi and Bluetooth firmware"
+SECTION = "base"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://COPYING;md5=ab61cab9599935bfe9f700405ef00f28 \
+                    file://QUALCOMM_ATHEROS_LICENSE_AGREEMENT.pdf;md5=e629669cf17f6a2a6872e067582986e3 \
+"
+
+SRC_URI = " ${FSL_MIRROR}/firmware-qca-${PV}.bin;fsl-eula=true"
+SRC_URI[md5sum] = "d2b7766a0919c2084ba7c911b7ddc1d0"
+SRC_URI[sha256sum] = "001eaaf7008d1354daeb7dbfbc86de1269cc4d6e5b49fa7f811eb82035602a42"
+S = "${WORKDIR}/firmware-qca-${PV}"
+
+inherit fsl-eula-unpack
diff --git a/recipes-bsp/firmware-qca/firmware-qca9377_2.0.bb b/recipes-bsp/firmware-qca/firmware-qca9377_2.0.bb
new file mode 100644
index 0000000..5bee32d
--- /dev/null
+++ b/recipes-bsp/firmware-qca/firmware-qca9377_2.0.bb
@@ -0,0 +1,27 @@
+# Copyright 2018 NXP
+
+require firmware-qca.inc
+
+SUMMARY = "Qualcomm Wi-Fi and Bluetooth firmware"
+DESCRIPTION = "Qualcomm Wi-Fi and Bluetooth firmware for modules such as QCA9377-3"
+SECTION = "base"
+LICENSE = "Proprietary"
+
+inherit allarch
+
+do_install () {
+    # Install firmware.conf for QCA modules
+    install -d ${D}${sysconfdir}/bluetooth
+    install -m 644 ${S}/1PJ_QCA9377-3_LEA_2.0/etc/bluetooth/firmware.conf ${D}${sysconfdir}/bluetooth
+
+    # Install firmware files
+    install -d ${D}${base_libdir}
+    cp -r ${S}/1PJ_QCA9377-3_LEA_2.0/lib/firmware ${D}${base_libdir}
+}
+
+FILES_${PN} = " \
+    ${sysconfdir}/bluetooth/firmware.conf \
+    ${base_libdir}/firmware/qca \
+    ${base_libdir}/firmware/qca9377 \
+    ${base_libdir}/firmware/wlan \
+"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 42/52] firmware-qca6174: Add support for QCA6174 on i.MX 8 Series
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (10 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 41/52] firmware-qca9377: Add support for QCA9377 on i.MX 7ULP Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 43/52] qca-tools: Add fcc_tools Tom Hochstein
                   ` (9 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 conf/machine/include/imx-base.inc                |  1 +
 recipes-bsp/firmware-qca/firmware-qca6174_2.0.bb | 27 ++++++++++++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 recipes-bsp/firmware-qca/firmware-qca6174_2.0.bb

diff --git a/conf/machine/include/imx-base.inc b/conf/machine/include/imx-base.inc
index 789c466..522c0aa 100644
--- a/conf/machine/include/imx-base.inc
+++ b/conf/machine/include/imx-base.inc
@@ -204,6 +204,7 @@ MACHINE_EXTRA_RRECOMMENDS_append_mx7d = " ${@bb.utils.contains('DISTRO_FEATURES'
 MACHINE_EXTRA_RRECOMMENDS_append_mx7ulp = " ${@bb.utils.contains('DISTRO_FEATURES', 'alsa', 'imx-alsa-plugins', '', d)}"
 
 # Extra QCA Wi-Fi & BTE driver and firmware
+MACHINE_EXTRA_RRECOMMENDS_append = " ${@bb.utils.contains('MACHINE_FEATURES', 'qca6174', 'firmware-qca6174 kernel-module-qca6174 qca-tools', '', d)}"
 MACHINE_EXTRA_RRECOMMENDS_append = " ${@bb.utils.contains('MACHINE_FEATURES', 'qca9377', 'firmware-qca9377 kernel-module-qca9377 qca-tools', '', d)}"
 
 # Extra udev rules
diff --git a/recipes-bsp/firmware-qca/firmware-qca6174_2.0.bb b/recipes-bsp/firmware-qca/firmware-qca6174_2.0.bb
new file mode 100644
index 0000000..462bf2e
--- /dev/null
+++ b/recipes-bsp/firmware-qca/firmware-qca6174_2.0.bb
@@ -0,0 +1,27 @@
+# Copyright 2018 NXP
+
+require firmware-qca.inc
+
+SUMMARY = "Qualcomm Wi-Fi and Bluetooth firmware"
+DESCRIPTION = "Qualcomm Wi-Fi and Bluetooth firmware for modules such as QCA6174A"
+SECTION = "base"
+LICENSE = "Proprietary"
+
+inherit allarch
+
+do_install () {
+    # Install firmware.conf for QCA modules
+    install -d ${D}${sysconfdir}/bluetooth
+    install -m 644 ${S}/1CQ_QCA6174A_LEA_2.0/etc/bluetooth/firmware.conf ${D}${sysconfdir}/bluetooth
+
+    # Install firmware files
+    install -d ${D}${base_libdir}
+    cp -r ${S}/1CQ_QCA6174A_LEA_2.0/lib/firmware ${D}${base_libdir}
+}
+
+FILES_${PN} = " \
+    ${sysconfdir}/bluetooth/firmware.conf \
+    ${base_libdir}/firmware/qca6174 \
+    ${base_libdir}/firmware/wlan \
+    ${base_libdir}/firmware/* \
+"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 43/52] qca-tools: Add fcc_tools
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (11 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 42/52] firmware-qca6174: Add support for QCA6174 on i.MX 8 Series Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 44/52] kernel-module-qca9377: Add support for QCA9377 on i.MX 7ULP Tom Hochstein
                   ` (8 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/firmware-qca/qca-tools_2.0.bb | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 recipes-bsp/firmware-qca/qca-tools_2.0.bb

diff --git a/recipes-bsp/firmware-qca/qca-tools_2.0.bb b/recipes-bsp/firmware-qca/qca-tools_2.0.bb
new file mode 100644
index 0000000..0fdb2ca
--- /dev/null
+++ b/recipes-bsp/firmware-qca/qca-tools_2.0.bb
@@ -0,0 +1,22 @@
+# Copyright 2018 NXP
+
+require firmware-qca.inc
+
+SUMMARY = "Qualcomm Wi-Fi and Bluetooth tools"
+DESCRIPTION = "Qualcomm Wi-Fi and Bluetooth tools for modules such as QCA6174A and QCA9377"
+LICENSE = "Proprietary"
+
+DEPENDS = "libnl zlib"
+
+FCC_TOOLS_FOLDER ?= "qca9377_qca6174_arm32"
+FCC_TOOLS_FOLDER_aarch64 = "qca9377_qca6174_arm64"
+
+do_install () {
+    install -d ${D}${sbindir}/fcc_tools
+    cp -r ${S}/fcc_tools/${FCC_TOOLS_FOLDER} ${D}${sbindir}/fcc_tools
+    chmod 644 ${D}${sbindir}/fcc_tools/*
+}
+
+FILES_${PN} = " \
+    ${sbindir}/* \
+"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 44/52] kernel-module-qca9377: Add support for QCA9377 on i.MX 7ULP
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (12 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 43/52] qca-tools: Add fcc_tools Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 45/52] kernel-module-qca6174: Add support for QCA6174 on i.MX 8 Series Tom Hochstein
                   ` (7 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 .../kernel-modules/kernel-module-qca9377_2.0.bb    |    5 +
 .../kernel-modules/kernel-module-qcacld-lea.inc    |   53 +
 ...7-CLD-LEA-2.0-porting-to-support-Android-.patch |  257 ++++
 ...inate-errors-by-tool-chain-and-disable-de.patch |   66 +
 ...t-add-timeout-for-dbglog_block-fwlog-read.patch |   39 +
 ...-CORE-remove-the-debug-message-in-default.patch |  176 +++
 ...E-cannot-call-spin_lock_bh-in-irq-context.patch |   81 ++
 .../0006-Kbuild-disable-QCA_CONFIG_SMP.patch       |   31 +
 .../0007-LEA.NRT_2.0-fix-the-build-error.patch     |   53 +
 .../0008-CORE-add-pcie-multi_if_name-support.patch |   85 ++
 ...meout-when-BMI-request-response-transacti.patch |   83 ++
 ...0-CORE-HIF-PCIe-only-support-one-instance.patch |   45 +
 ...RE-BMI-RF-align-the-utf-firmware-bin-name.patch |   31 +
 ...ORE-revert-two-patches-to-support-QCA-SMP.patch |   81 ++
 ...es-os-fix-issue-to-avoid-spin_lock_bh-in-.patch | 1367 ++++++++++++++++++++
 ...d-CONFIG_HDD_WLAN_WAIT_TIME-support-for-u.patch |   51 +
 .../0015-CORE-HIF-enable-pcie-MSI-feature.patch    |   96 ++
 ...016-MLK-18490-CORE-HDD-add-ssid-len-check.patch |   75 ++
 ...cacld-2.0-avoid-overflow-of-bounce-buffer.patch |   29 +
 ...2-qcacld-2.0-fix-the-overflow-of-bounce-b.patch |   90 ++
 20 files changed, 2794 insertions(+)
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qca9377_2.0.bb
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0001-CORE-QCA9377-CLD-LEA-2.0-porting-to-support-Android-.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0002-Kbuild-Eliminate-errors-by-tool-chain-and-disable-de.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0003-dbglog_host-add-timeout-for-dbglog_block-fwlog-read.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0004-CORE-remove-the-debug-message-in-default.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0005-CORE-cannot-call-spin_lock_bh-in-irq-context.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0006-Kbuild-disable-QCA_CONFIG_SMP.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0007-LEA.NRT_2.0-fix-the-build-error.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0008-CORE-add-pcie-multi_if_name-support.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0009-CORE-add-timeout-when-BMI-request-response-transacti.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0010-CORE-HIF-PCIe-only-support-one-instance.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0011-CORE-BMI-RF-align-the-utf-firmware-bin-name.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0012-CORE-revert-two-patches-to-support-QCA-SMP.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0013-CORE-services-os-fix-issue-to-avoid-spin_lock_bh-in-.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0014-CLD-CORE-add-CONFIG_HDD_WLAN_WAIT_TIME-support-for-u.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0015-CORE-HIF-enable-pcie-MSI-feature.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0016-MLK-18490-CORE-HDD-add-ssid-len-check.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0017-MLK-18491-qcacld-2.0-avoid-overflow-of-bounce-buffer.patch
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0018-MLK-18491-02-qcacld-2.0-fix-the-overflow-of-bounce-b.patch

diff --git a/recipes-kernel/kernel-modules/kernel-module-qca9377_2.0.bb b/recipes-kernel/kernel-modules/kernel-module-qca9377_2.0.bb
new file mode 100644
index 0000000..1b4f313
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qca9377_2.0.bb
@@ -0,0 +1,5 @@
+require kernel-module-qcacld-lea.inc
+
+SUMMARY = "Qualcomm WiFi driver for QCA module 9377"
+
+EXTRA_OEMAKE += "${EXTRA_OEMAKE_QCA9377}"
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc
new file mode 100644
index 0000000..1284f24
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc
@@ -0,0 +1,53 @@
+# Copyright 2018 NXP
+
+SUMMARY = "Qualcomm WiFi driver for QCA module 9377"
+LICENSE = "BSD & GPLv2"
+LIC_FILES_CHKSUM = "file://CORE/HDD/src/wlan_hdd_main.c;beginline=1;endline=20;md5=ec8d62116b13db773825ebf7cf91be1d;"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/kernel-module-qcacld-lea:"
+SRC_URI = " \
+    git://source.codeaurora.org/external/wlan/qcacld-2.0;protocol=https;branch=CNSS.LEA.NRT_2.0; \
+    file://0001-CORE-QCA9377-CLD-LEA-2.0-porting-to-support-Android-.patch \
+    file://0002-Kbuild-Eliminate-errors-by-tool-chain-and-disable-de.patch \
+    file://0003-dbglog_host-add-timeout-for-dbglog_block-fwlog-read.patch \
+    file://0004-CORE-remove-the-debug-message-in-default.patch \
+    file://0005-CORE-cannot-call-spin_lock_bh-in-irq-context.patch \
+    file://0006-Kbuild-disable-QCA_CONFIG_SMP.patch \
+    file://0007-LEA.NRT_2.0-fix-the-build-error.patch \
+    file://0008-CORE-add-pcie-multi_if_name-support.patch \
+    file://0009-CORE-add-timeout-when-BMI-request-response-transacti.patch \
+    file://0010-CORE-HIF-PCIe-only-support-one-instance.patch \
+    file://0011-CORE-BMI-RF-align-the-utf-firmware-bin-name.patch \
+    file://0012-CORE-revert-two-patches-to-support-QCA-SMP.patch \
+    file://0013-CORE-services-os-fix-issue-to-avoid-spin_lock_bh-in-.patch \
+    file://0014-CLD-CORE-add-CONFIG_HDD_WLAN_WAIT_TIME-support-for-u.patch \
+    file://0015-CORE-HIF-enable-pcie-MSI-feature.patch \
+    file://0016-MLK-18490-CORE-HDD-add-ssid-len-check.patch \
+    file://0017-MLK-18491-qcacld-2.0-avoid-overflow-of-bounce-buffer.patch \
+    file://0018-MLK-18491-02-qcacld-2.0-fix-the-overflow-of-bounce-b.patch \
+"
+# version v4.5.23.1
+SRCREV = "af6adc6662dd2e8f5ca25af2d184faef44465b45"
+S = "${WORKDIR}/git"
+
+inherit module
+
+EXTRA_OEMAKE_QCA9377 += " \
+    CONFIG_CLD_HL_SDIO_CORE=y \
+    CONFIG_FEATURE_COEX_PTA_CONFIG_ENABLE=y \
+    CONFIG_PER_VDEV_TX_DESC_POOL=1 \
+    CONFIG_QCA_LL_TX_FLOW_CT=1 \
+    CONFIG_QCA_SUPPORT_TXRX_DRIVER_TCP_DEL_ACK=y \
+    CONFIG_WLAN_FEATURE_FILS=y \
+    CONFIG_WLAN_WAPI_MODE_11AC_DISABLE=y \
+    MODNAME=qca9377 \
+    SAP_AUTH_OFFLOAD=1 \
+"
+EXTRA_OEMAKE += " \
+    CONFIG_CFG80211_INTERNAL_REGDB=y \
+    CONFIG_HDD_WLAN_WAIT_TIME=10000 \
+    CONFIG_LINUX_QCMBR=y \
+    CONFIG_NON_QC_PLATFORM=y \
+    CONFIG_PMF_SUPPORT=y \
+    TARGET_BUILD_VARIANT=user \
+"
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0001-CORE-QCA9377-CLD-LEA-2.0-porting-to-support-Android-.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0001-CORE-QCA9377-CLD-LEA-2.0-porting-to-support-Android-.patch
new file mode 100644
index 0000000..e9b7fb7
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0001-CORE-QCA9377-CLD-LEA-2.0-porting-to-support-Android-.patch
@@ -0,0 +1,257 @@
+From 7984a38559bf13bfc3aeff868faf3aacea4df20b Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Mon, 14 May 2018 14:19:46 +0800
+Subject: [PATCH 01/11] CORE: QCA9377 CLD LEA 2.0 porting to support Android O
+
+QCA9377 CLD LEA 2.0 porting to support Android O.
+
+Signed-off-by: Hangtian Zhu <hangtian@qti.qualcomm.com>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_cfg80211.c           |  6 ++++++
+ CORE/HDD/src/wlan_hdd_hostapd.c            | 10 ++++++++++
+ CORE/HDD/src/wlan_hdd_wext.c               |  8 ++++++++
+ CORE/SERVICES/BMI/ol_fw.c                  |  4 +++-
+ CORE/SERVICES/HIF/sdio/linux/if_ath_sdio.c |  2 +-
+ CORE/VOSS/inc/vos_cnss.h                   |  2 ++
+ CORE/VOSS/src/vos_nvitem.c                 |  4 ++--
+ Kbuild                                     |  2 ++
+ 8 files changed, 34 insertions(+), 4 deletions(-)
+
+diff --git a/CORE/HDD/src/wlan_hdd_cfg80211.c b/CORE/HDD/src/wlan_hdd_cfg80211.c
+index c2793ce..cb6f03d 100644
+--- a/CORE/HDD/src/wlan_hdd_cfg80211.c
++++ b/CORE/HDD/src/wlan_hdd_cfg80211.c
+@@ -7520,6 +7520,8 @@ static int __wlan_hdd_cfg80211_ll_stats_get(struct wiphy *wiphy,
+     hdd_station_ctx_t *hddstactx = WLAN_HDD_GET_STATION_CTX_PTR(pAdapter);
+     int status;
+ 
++    printk("WAR: return ll_stats, because fw didn't enable\n");
++    return 0;
+     if (VOS_FTM_MODE == hdd_get_conparam()) {
+         hddLog(LOGE, FL("Command not allowed in FTM mode"));
+         return -EINVAL;
+@@ -29309,6 +29311,7 @@ wlan_hdd_cfg80211_set_mac_acl(struct wiphy *wiphy,
+ 	return ret;
+ }
+ 
++#ifdef CONFIG_NL80211_TESTMODE
+ #ifdef WLAN_NL80211_TESTMODE
+ #ifdef FEATURE_WLAN_LPHB
+ void wlan_hdd_cfg80211_lphb_ind_handler
+@@ -29558,6 +29561,7 @@ nla_put_failure:
+ }
+ #endif
+ #endif /* CONFIG_NL80211_TESTMODE */
++#endif
+ 
+ /**
+  * wlan_hdd_chan_info_cb() - channel info callback
+@@ -31911,9 +31915,11 @@ static struct cfg80211_ops wlan_hdd_cfg80211_ops =
+      .resume = wlan_hdd_cfg80211_resume_wlan,
+      .suspend = wlan_hdd_cfg80211_suspend_wlan,
+      .set_mac_acl = wlan_hdd_cfg80211_set_mac_acl,
++#ifdef CONFIG_NL80211_TESTMODE
+ #ifdef WLAN_NL80211_TESTMODE
+      .testmode_cmd = wlan_hdd_cfg80211_testmode,
+ #endif
++#endif
+ #ifdef QCA_HT_2040_COEX
+      .set_ap_chanwidth = wlan_hdd_cfg80211_set_ap_channel_width,
+ #endif
+diff --git a/CORE/HDD/src/wlan_hdd_hostapd.c b/CORE/HDD/src/wlan_hdd_hostapd.c
+index 3b8373f..9519764 100644
+--- a/CORE/HDD/src/wlan_hdd_hostapd.c
++++ b/CORE/HDD/src/wlan_hdd_hostapd.c
+@@ -7670,11 +7670,15 @@ static const iw_handler hostapd_private[] = {
+ };
+ const struct iw_handler_def hostapd_handler_def = {
+    .num_standard     = sizeof(hostapd_handler) / sizeof(hostapd_handler[0]),
++#ifdef CONFIG_WEXT_PRIV
+    .num_private      = sizeof(hostapd_private) / sizeof(hostapd_private[0]),
+    .num_private_args = sizeof(hostapd_private_args) / sizeof(hostapd_private_args[0]),
++#endif
+    .standard         = (iw_handler *)hostapd_handler,
++#ifdef CONFIG_WEXT_PRIV
+    .private          = (iw_handler *)hostapd_private,
+    .private_args     = hostapd_private_args,
++#endif
+    .get_wireless_stats = NULL,
+ };
+ 
+@@ -7704,7 +7708,9 @@ void hdd_set_ap_ops( struct net_device *pWlanHostapdDev )
+ VOS_STATUS hdd_init_ap_mode(hdd_adapter_t *pAdapter, bool reinit)
+ {
+     hdd_hostapd_state_t * phostapdBuf;
++#ifdef CONFIG_WIRELESS_EXT
+     struct net_device *dev = pAdapter->dev;
++#endif
+     hdd_context_t *pHddCtx = WLAN_HDD_GET_CTX(pAdapter);
+     VOS_STATUS status;
+ #ifdef WLAN_FEATURE_MBSSID
+@@ -7841,7 +7847,9 @@ VOS_STATUS hdd_init_ap_mode(hdd_adapter_t *pAdapter, bool reinit)
+     sema_init(&(WLAN_HDD_GET_AP_CTX_PTR(pAdapter))->semWpsPBCOverlapInd, 1);
+ 
+      // Register as a wireless device
++#ifdef CONFIG_WIRELESS_EXT
+     dev->wireless_handlers = (struct iw_handler_def *)& hostapd_handler_def;
++#endif
+ 
+     //Initialize the data path module
+     status = hdd_softap_init_tx_rx(pAdapter);
+@@ -8013,6 +8021,7 @@ VOS_STATUS hdd_unregister_hostapd(hdd_adapter_t *pAdapter, bool rtnl_held)
+       detach the wireless device handlers */
+    if (pAdapter->dev)
+    {
++#ifdef CONFIG_WIRELESS_EXT
+       if (rtnl_held)
+           pAdapter->dev->wireless_handlers = NULL;
+       else {
+@@ -8020,6 +8029,7 @@ VOS_STATUS hdd_unregister_hostapd(hdd_adapter_t *pAdapter, bool rtnl_held)
+           pAdapter->dev->wireless_handlers = NULL;
+           rtnl_unlock();
+       }
++#endif
+    }
+ 
+ #ifdef WLAN_FEATURE_MBSSID
+diff --git a/CORE/HDD/src/wlan_hdd_wext.c b/CORE/HDD/src/wlan_hdd_wext.c
+index eeeeab6..d139555 100644
+--- a/CORE/HDD/src/wlan_hdd_wext.c
++++ b/CORE/HDD/src/wlan_hdd_wext.c
+@@ -12822,12 +12822,16 @@ static const struct iw_priv_args we_private_args[] = {
+ 
+ const struct iw_handler_def we_handler_def = {
+    .num_standard     = sizeof(we_handler) / sizeof(we_handler[0]),
++#ifdef CONFIG_WEXT_PRIV
+    .num_private      = sizeof(we_private) / sizeof(we_private[0]),
+    .num_private_args = sizeof(we_private_args) / sizeof(we_private_args[0]),
++#endif
+ 
+    .standard         = (iw_handler *)we_handler,
++#ifdef CONFIG_WEXT_PRIV
+    .private          = (iw_handler *)we_private,
+    .private_args     = we_private_args,
++#endif
+    .get_wireless_stats = get_wireless_stats,
+ };
+ 
+@@ -13116,7 +13120,9 @@ int hdd_register_wext(struct net_device *dev)
+     }
+     hdd_initialize_fils_info(pwextBuf);
+     /* Register as a wireless device */
++#ifdef CONFIG_WIRELESS_EXT
+     dev->wireless_handlers = (struct iw_handler_def *)&we_handler_def;
++#endif
+ 
+     EXIT();
+     return 0;
+@@ -13127,9 +13133,11 @@ int hdd_UnregisterWext(struct net_device *dev)
+ 	hddLog(LOG1, FL("dev(%pK)"), dev);
+ 
+ 	if (dev != NULL) {
++#ifdef CONFIG_WIRELESS_EXT
+ 		rtnl_lock();
+ 		dev->wireless_handlers = NULL;
+ 		rtnl_unlock();
++#endif
+ 	}
+ 
+ 	return 0;
+diff --git a/CORE/SERVICES/BMI/ol_fw.c b/CORE/SERVICES/BMI/ol_fw.c
+index 83ae0d9..4f7dfbd 100644
+--- a/CORE/SERVICES/BMI/ol_fw.c
++++ b/CORE/SERVICES/BMI/ol_fw.c
+@@ -552,7 +552,7 @@ static char *ol_board_id_to_filename(struct ol_softc *scn, uint16_t board_id)
+ 	if (board_id > 0xFF)
+ 		board_id = 0x0;
+ 
+-	snprintf(&dest[input_len - 2], 3, "%.2x", board_id);
++	//snprintf(&dest[input_len - 2], 3, "%.2x", board_id);
+ out:
+ 	return dest;
+ }
+@@ -2314,6 +2314,7 @@ int ol_download_firmware(struct ol_softc *scn)
+ 	}
+ 
+ 	address = BMI_SEGMENTED_WRITE_ADDR;
++#if 0
+ 	if (scn->enablesinglebinary == FALSE) {
+ 		if (ol_transfer_bin_file(scn, ATH_SETUP_FILE,
+ 					BMI_SEGMENTED_WRITE_ADDR, TRUE) == EOK) {
+@@ -2322,6 +2323,7 @@ int ol_download_firmware(struct ol_softc *scn)
+ 			BMIExecute(scn->hif_hdl, address, &param, scn);
+ 		}
+ 	}
++#endif
+ 
+ 	/* Download Target firmware - TODO point to target specific files in runtime */
+ 	if (ol_transfer_bin_file(scn, ATH_FIRMWARE_FILE, address, TRUE) != EOK) {
+diff --git a/CORE/SERVICES/HIF/sdio/linux/if_ath_sdio.c b/CORE/SERVICES/HIF/sdio/linux/if_ath_sdio.c
+index 24bf785..0f68c58 100644
+--- a/CORE/SERVICES/HIF/sdio/linux/if_ath_sdio.c
++++ b/CORE/SERVICES/HIF/sdio/linux/if_ath_sdio.c
+@@ -227,7 +227,7 @@ ath_hif_sdio_probe(void *context, void *hif_handle)
+     ol_sc->hif_hdl = hif_handle;
+ 
+     /* Get RAM dump memory address and size */
+-    ol_sc->ramdump_base = hif_get_virt_ramdump_mem(&ol_sc->ramdump_size);
++    ol_sc->ramdump_base = NULL;//hif_get_virt_ramdump_mem(&ol_sc->ramdump_size);
+     if (ol_sc->ramdump_base == NULL || !ol_sc->ramdump_size) {
+         VOS_TRACE(VOS_MODULE_ID_HIF, VOS_TRACE_LEVEL_ERROR,
+             "%s: Failed to get RAM dump memory address or size!\n",
+diff --git a/CORE/VOSS/inc/vos_cnss.h b/CORE/VOSS/inc/vos_cnss.h
+index fa2d7f8..6d7c8f1 100644
+--- a/CORE/VOSS/inc/vos_cnss.h
++++ b/CORE/VOSS/inc/vos_cnss.h
+@@ -53,10 +53,12 @@ enum cnss_cc_src {
+ };
+ 
+ static inline void vos_wlan_pci_link_down(void){ return; }
++#ifdef HIF_PCI
+ static inline int vos_pcie_shadow_control(struct pci_dev *dev, bool enable)
+ {
+ 	return -ENODEV;
+ }
++#endif
+ 
+ static inline u8 *vos_get_cnss_wlan_mac_buff(struct device *dev, uint32_t *num)
+ {
+diff --git a/CORE/VOSS/src/vos_nvitem.c b/CORE/VOSS/src/vos_nvitem.c
+index bd463d0..ed7a048 100644
+--- a/CORE/VOSS/src/vos_nvitem.c
++++ b/CORE/VOSS/src/vos_nvitem.c
+@@ -976,7 +976,7 @@ static void vos_set_5g_channel_params(uint16_t oper_ch,
+ 				      struct ch_params_s *ch_params)
+ {
+ 	eNVChannelEnabledType chan_state = NV_CHANNEL_ENABLE;
+-	const struct bonded_chan *bonded_chan_ptr;
++	const struct bonded_chan *bonded_chan_ptr = NULL;
+ 	uint16_t center_chan;
+ 
+ 	if (CH_WIDTH_MAX <= ch_params->ch_width)
+@@ -1782,7 +1782,7 @@ bool vos_is_channel_support_sub20(uint16_t operation_channel,
+ 	eNVChannelEnabledType channel_state;
+ 
+ 	if (VOS_IS_CHANNEL_5GHZ(operation_channel)) {
+-		const struct bonded_chan *bonded_chan_ptr;
++		const struct bonded_chan *bonded_chan_ptr = NULL;
+ 
+ 		channel_state =
+ 		    vos_search_5g_bonded_channel(operation_channel,
+diff --git a/Kbuild b/Kbuild
+index c386d37..96d9b37 100644
+--- a/Kbuild
++++ b/Kbuild
+@@ -222,6 +222,8 @@ ifeq ($(CONFIG_ROME_IF),usb)
+ endif
+ ifeq ($(CONFIG_QCA_WIFI_SDIO), 1)
+ CONFIG_ATH_11AC_TXCOMPACT := 0
++CONFIG_WLAN_SYNC_TSF := y
++#CONFIG_WLAN_SYNC_TSF_PLUS := y
+ endif
+ 
+ #Enable per vdev Tx desc pool
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0002-Kbuild-Eliminate-errors-by-tool-chain-and-disable-de.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0002-Kbuild-Eliminate-errors-by-tool-chain-and-disable-de.patch
new file mode 100644
index 0000000..7df6558
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0002-Kbuild-Eliminate-errors-by-tool-chain-and-disable-de.patch
@@ -0,0 +1,66 @@
+From 990dd836c6dffa810611e2b1e42582b79088e345 Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Mon, 2 Apr 2018 14:51:05 +0800
+Subject: [PATCH 02/11] Kbuild: Eliminate errors by tool chain and disable
+ debug configs
+
+- Eliminate errors caused by GCC 6.x warning.
+- Disable debug configs in default.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ Kbuild | 13 +++++++------
+ 1 file changed, 7 insertions(+), 6 deletions(-)
+
+diff --git a/Kbuild b/Kbuild
+index 96d9b37..3c4bd8d 100644
+--- a/Kbuild
++++ b/Kbuild
+@@ -191,13 +191,13 @@ endif
+ # Feature flags which are not (currently) configurable via Kconfig
+ 
+ #Whether to build debug version
+-BUILD_DEBUG_VERSION := 1
++#BUILD_DEBUG_VERSION := 1
+ 
+ #Enable this flag to build driver in diag version
+-BUILD_DIAG_VERSION := 1
++#BUILD_DIAG_VERSION := 1
+ 
+ #Do we panic on bug?  default is to warn
+-PANIC_ON_BUG := 1
++#PANIC_ON_BUG := 1
+ 
+ #Re-enable wifi on WDI timeout
+ RE_ENABLE_WIFI_ON_WDI_TIMEOUT := 0
+@@ -1015,7 +1015,6 @@ CDEFINES :=	-DANI_LITTLE_BYTE_ENDIAN \
+ 		-DWLAN_PERF \
+ 		-DPTT_SOCK_SVC_ENABLE \
+ 		-Wall\
+-		-Werror\
+ 		-D__linux__ \
+ 		-DHAL_SELF_STA_PER_BSS=1 \
+ 		-DWLAN_FEATURE_VOWIFI_11R \
+@@ -1055,7 +1054,9 @@ CDEFINES :=	-DANI_LITTLE_BYTE_ENDIAN \
+ 		-DFEATURE_WLAN_CH144 \
+ 		-DHTC_CRP_DEBUG \
+ 		-DWLAN_VOWIFI_DEBUG \
+-		-DATH_SUPPORT_DFS
++		-DATH_SUPPORT_DFS \
++		-Wno-misleading-indentation
++#-Werror is omitted
+ 
+ ifeq ($(CONFIG_WLAN_POWER_DEBUGFS), y)
+ CDEFINES += -DWLAN_POWER_DEBUGFS
+@@ -1156,7 +1157,7 @@ CDEFINES += -DMDNS_OFFLOAD
+ endif
+ 
+ ifeq (y,$(findstring y,$(CONFIG_ARCH_MSM) $(CONFIG_ARCH_QCOM)))
+-CDEFINES += -DMSM_PLATFORM
++#CDEFINES += -DMSM_PLATFORM
+ ifeq ($(CONFIG_CNSS), y)
+ ifeq ($(CONFIG_HIF_PCI), 1)
+ CDEFINES += -DFEATURE_BUS_BANDWIDTH
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0003-dbglog_host-add-timeout-for-dbglog_block-fwlog-read.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0003-dbglog_host-add-timeout-for-dbglog_block-fwlog-read.patch
new file mode 100644
index 0000000..60dbcff
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0003-dbglog_host-add-timeout-for-dbglog_block-fwlog-read.patch
@@ -0,0 +1,39 @@
+From 48b35557f766f360d65b1c693c472997847c4738 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Wed, 9 May 2018 16:08:57 +0800
+Subject: [PATCH 03/11] dbglog_host: add timeout for dbglog_block fwlog read
+
+Add timeout for dbglog_block fwlog read operation.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/UTILS/FWLOG/dbglog_host.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/CORE/UTILS/FWLOG/dbglog_host.c b/CORE/UTILS/FWLOG/dbglog_host.c
+index 7a7be6d..5ac1dee 100644
+--- a/CORE/UTILS/FWLOG/dbglog_host.c
++++ b/CORE/UTILS/FWLOG/dbglog_host.c
+@@ -57,6 +57,7 @@
+ #define CLD_DEBUGFS_DIR          "cld"
+ #endif
+ #define DEBUGFS_BLOCK_NAME       "dbglog_block"
++#define CNSS_DIAG_FWLOG_TIMEOUT	2000
+ 
+ #define ATH_MODULE_NAME fwlog
+ #include <a_debug.h>
+@@ -4291,8 +4292,9 @@ static ssize_t dbglog_block_read(struct file *file,
+ 
+        spin_unlock_bh(&fwlog->fwlog_queue.lock);
+ 
+-       ret = wait_for_completion_interruptible(
+-                    &fwlog->fwlog_completion);
++       ret = wait_for_completion_interruptible_timeout(
++                    &fwlog->fwlog_completion,
++		    msecs_to_jiffies(CNSS_DIAG_FWLOG_TIMEOUT));
+        if (ret == -ERESTARTSYS) {
+                vfree(buf);
+                return ret;
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0004-CORE-remove-the-debug-message-in-default.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0004-CORE-remove-the-debug-message-in-default.patch
new file mode 100644
index 0000000..451de5e
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0004-CORE-remove-the-debug-message-in-default.patch
@@ -0,0 +1,176 @@
+From 1f285b2023fa97a140bf65e81a5778c96320a275 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Mon, 14 May 2018 14:42:37 +0800
+Subject: [PATCH 04/11] CORE: remove the debug message in default
+
+Remove the debug message in default.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/CLD_TXRX/HTT/htt.c                            |  2 +-
+ CORE/CLD_TXRX/HTT/htt_t2h.c                        |  2 +-
+ CORE/CLD_TXRX/TXRX/ol_txrx.c                       |  2 +-
+ CORE/SERVICES/BMI/ol_fw.c                          | 10 +++++-----
+ CORE/SERVICES/HIF/sdio/linux/native_sdio/src/hif.c |  2 +-
+ CORE/SERVICES/WMA/wma_dfs_interface.c              |  2 +-
+ CORE/SERVICES/WMI/wmi_unified.c                    | 10 +++++-----
+ 7 files changed, 15 insertions(+), 15 deletions(-)
+
+diff --git a/CORE/CLD_TXRX/HTT/htt.c b/CORE/CLD_TXRX/HTT/htt.c
+index 3e91ceb..e3b97f5 100644
+--- a/CORE/CLD_TXRX/HTT/htt.c
++++ b/CORE/CLD_TXRX/HTT/htt.c
+@@ -217,7 +217,7 @@ htt_attach(
+ 
+     pdev->cfg.is_full_reorder_offload =
+          ol_cfg_is_full_reorder_offload(pdev->ctrl_pdev);
+-    adf_os_print("is_full_reorder_offloaded? %d\n",
++    pr_debug("is_full_reorder_offloaded? %d\n",
+                   (int)pdev->cfg.is_full_reorder_offload);
+     pdev->targetdef = htc_get_targetdef(htc_pdev);
+     /*
+diff --git a/CORE/CLD_TXRX/HTT/htt_t2h.c b/CORE/CLD_TXRX/HTT/htt_t2h.c
+index 78c7c4e..6ea740c 100644
+--- a/CORE/CLD_TXRX/HTT/htt_t2h.c
++++ b/CORE/CLD_TXRX/HTT/htt_t2h.c
+@@ -168,7 +168,7 @@ htt_t2h_lp_msg_handler(void *context, adf_nbuf_t htt_t2h_msg )
+             /* abort if the target is incompatible with the host */
+             adf_os_assert(pdev->tgt_ver.major == HTT_CURRENT_VERSION_MAJOR);
+             if (pdev->tgt_ver.minor != HTT_CURRENT_VERSION_MINOR) {
+-                adf_os_print(
++                pr_debug(
+                     "*** Warning: host/target HTT versions are different, "
+                     "though compatible!\n");
+             }
+diff --git a/CORE/CLD_TXRX/TXRX/ol_txrx.c b/CORE/CLD_TXRX/TXRX/ol_txrx.c
+index e251c79..f9ded71 100644
+--- a/CORE/CLD_TXRX/TXRX/ol_txrx.c
++++ b/CORE/CLD_TXRX/TXRX/ol_txrx.c
+@@ -486,7 +486,7 @@ ol_txrx_pdev_attach(
+         desc_per_page = desc_per_page >> 1;
+     }
+     pdev->tx_desc.page_divider = (sig_bit - 1);
+-    TXRX_PRINT(TXRX_PRINT_LEVEL_ERR,
++    TXRX_PRINT(TXRX_PRINT_LEVEL_INFO1,
+         "page_divider 0x%x, offset_filter 0x%x num elem %d, ol desc num page %d, ol desc per page %d",
+         pdev->tx_desc.page_divider, pdev->tx_desc.offset_filter,
+         desc_pool_size, pdev->tx_desc.desc_pages.num_pages,
+diff --git a/CORE/SERVICES/BMI/ol_fw.c b/CORE/SERVICES/BMI/ol_fw.c
+index 4f7dfbd..8e8f7cb 100644
+--- a/CORE/SERVICES/BMI/ol_fw.c
++++ b/CORE/SERVICES/BMI/ol_fw.c
+@@ -744,7 +744,7 @@ defined(CONFIG_NON_QC_PLATFORM_PCI)
+        status = request_firmware(&fw_entry, filename, scn->sc_osdev->device);
+ 	if (status)
+ 	{
+-		pr_err("%s: Failed to get %s:%d\n", __func__, filename, status);
++		pr_debug("%s: Failed to get %s:%d\n", __func__, filename, status);
+ 
+ 		if (file == ATH_OTP_FILE)
+ 			return -ENOENT;
+@@ -759,7 +759,7 @@ defined(CONFIG_NON_QC_PLATFORM_PCI)
+ 				return -1;
+ 			}
+ 
+-			pr_info("%s: Trying to load default %s\n",
++			pr_debug("%s: Trying to load default %s\n",
+ 							__func__, filename);
+ 
+ 			status = request_firmware(&fw_entry, filename,
+@@ -836,7 +836,7 @@ defined(CONFIG_NON_QC_PLATFORM_PCI)
+ 		BMIReadMemory(scn->hif_hdl,
+ 				HOST_INTEREST_ITEM_ADDRESS(scn->target_type, hi_board_ext_data),
+ 				(u_int8_t *)&board_ext_address, 4, scn);
+-		printk("Board extended Data download address: 0x%x\n", board_ext_address);
++		pr_debug("Board extended Data download address: 0x%x\n", board_ext_address);
+ 
+ 		/*
+ 		 * Check whether the target has allocated memory for extended board
+@@ -2240,7 +2240,7 @@ int ol_download_firmware(struct ol_softc *scn)
+ 	} else {
+ 		/* Transfer One Time Programmable data */
+ 		address = BMI_SEGMENTED_WRITE_ADDR;
+-		printk("%s: Using 0x%x for the remainder of init\n", __func__, address);
++		pr_debug("%s: Using 0x%x for the remainder of init\n", __func__, address);
+ 
+ 		if ( scn->enablesinglebinary == FALSE ) {
+ #ifdef HIF_PCI
+@@ -2258,7 +2258,7 @@ int ol_download_firmware(struct ol_softc *scn)
+ 				bdf_ret = param & 0xff;
+ 				if (!bdf_ret)
+ 					scn->board_id = (param >> 8) & 0xffff;
+-				pr_err("%s: chip_id:0x%0x board_id:0x%0x\n",
++				pr_debug("%s: chip_id:0x%0x board_id:0x%0x\n",
+ 						__func__, scn->target_version,
+ 							scn->board_id);
+ 			} else if (status < 0) {
+diff --git a/CORE/SERVICES/HIF/sdio/linux/native_sdio/src/hif.c b/CORE/SERVICES/HIF/sdio/linux/native_sdio/src/hif.c
+index 0174a60..51148ad 100644
+--- a/CORE/SERVICES/HIF/sdio/linux/native_sdio/src/hif.c
++++ b/CORE/SERVICES/HIF/sdio/linux/native_sdio/src/hif.c
+@@ -114,7 +114,7 @@ unsigned int forcecard = 0;
+ module_param(forcecard, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
+ MODULE_PARM_DESC(forcecard, "Ignore card capabilities information to switch bus mode");
+ 
+-unsigned int debugcccr = 1;
++unsigned int debugcccr = 0;
+ module_param(debugcccr, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
+ MODULE_PARM_DESC(debugcccr, "Output this cccr values");
+ 
+diff --git a/CORE/SERVICES/WMA/wma_dfs_interface.c b/CORE/SERVICES/WMA/wma_dfs_interface.c
+index 61f161c..2f90886 100644
+--- a/CORE/SERVICES/WMA/wma_dfs_interface.c
++++ b/CORE/SERVICES/WMA/wma_dfs_interface.c
+@@ -65,7 +65,7 @@ ol_if_dfs_attach(struct ieee80211com *ic, void *ptr, void *radar_info)
+ {
+     struct ath_dfs_caps *pCap = (struct ath_dfs_caps *) ptr;
+ 
+-    adf_os_print("%s: called; ptr=%pK, radar_info=%pK\n",
++    pr_debug("%s: called; ptr=%pK, radar_info=%pK\n",
+                   __func__, ptr, radar_info);
+ 
+     pCap->ath_chip_is_bb_tlv = 1;
+diff --git a/CORE/SERVICES/WMI/wmi_unified.c b/CORE/SERVICES/WMI/wmi_unified.c
+index 386a3b7..0b9c1cd 100644
+--- a/CORE/SERVICES/WMI/wmi_unified.c
++++ b/CORE/SERVICES/WMI/wmi_unified.c
+@@ -1066,7 +1066,7 @@ int wmi_unified_unregister_event_handler(wmi_unified_t wmi_handle,
+ {
+     u_int32_t idx=0;
+     if ( (idx = wmi_unified_get_event_handler_ix( wmi_handle, event_id)) == -1) {
+-        printk("%s : event handler is not registered: event id 0x%x \n",
++        pr_debug("%s : event handler is not registered: event id 0x%x \n",
+                 __func__, event_id);
+         return -1;
+     }
+@@ -1237,7 +1237,7 @@ void __wmi_control_rx(struct wmi_unified *wmi_handle, wmi_buf_t evt_buf)
+ 
+ 		idx = wmi_unified_get_event_handler_ix(wmi_handle, id) ;
+ 		if (idx == -1) {
+-			pr_err("%s : event handler is not registered: event id 0x%x\n",
++			pr_debug("%s : event handler is not registered: event id 0x%x\n",
+ 			       __func__, id);
+ 			goto end;
+ 		}
+@@ -1256,15 +1256,15 @@ void __wmi_control_rx(struct wmi_unified *wmi_handle, wmi_buf_t evt_buf)
+ 
+ 	switch (id) {
+ 	default:
+-		pr_info("%s: Unhandled WMI event %d\n", __func__, id);
++		pr_debug("%s: Unhandled WMI event %d\n", __func__, id);
+ 		break;
+ 	case WMI_SERVICE_READY_EVENTID:
+-		pr_info("%s: WMI UNIFIED SERVICE READY event\n", __func__);
++		pr_debug("%s: WMI UNIFIED SERVICE READY event\n", __func__);
+ 		wma_rx_service_ready_event(wmi_handle->scn_handle,
+ 					   wmi_cmd_struct_ptr);
+ 		break;
+ 	case WMI_READY_EVENTID:
+-		pr_info("%s:  WMI UNIFIED READY event\n", __func__);
++		pr_debug("%s:  WMI UNIFIED READY event\n", __func__);
+ 		wma_rx_ready_event(wmi_handle->scn_handle, wmi_cmd_struct_ptr);
+ 		break;
+ 	}
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0005-CORE-cannot-call-spin_lock_bh-in-irq-context.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0005-CORE-cannot-call-spin_lock_bh-in-irq-context.patch
new file mode 100644
index 0000000..191cb7c
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0005-CORE-cannot-call-spin_lock_bh-in-irq-context.patch
@@ -0,0 +1,81 @@
+From b0944b8c45efecf75b9d1be3182bd41cba0a1859 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Mon, 14 May 2018 15:36:44 +0800
+Subject: [PATCH 05/11] CORE: cannot call spin_lock_bh in irq context
+
+Cannot call spin_lock_bh in irq context.
+Remove the dump message when send wmi command during target is suspended.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_main.c    |  7 +++++--
+ CORE/SERVICES/WMI/wmi_unified.c |  3 +--
+ CORE/VOSS/src/vos_sched.c       | 10 +++++++---
+ 3 files changed, 13 insertions(+), 7 deletions(-)
+
+diff --git a/CORE/HDD/src/wlan_hdd_main.c b/CORE/HDD/src/wlan_hdd_main.c
+index db42731..4f48d53 100644
+--- a/CORE/HDD/src/wlan_hdd_main.c
++++ b/CORE/HDD/src/wlan_hdd_main.c
+@@ -13823,10 +13823,13 @@ VOS_STATUS hdd_get_front_adapter( hdd_context_t *pHddCtx,
+                                   hdd_adapter_list_node_t** ppAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    bool in_irq_context = (in_irq() || irqs_disabled());
++    if (!in_irq_context)
++	spin_lock_bh(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_peek_front ( &pHddCtx->hddAdapters,
+                    (hdd_list_node_t**) ppAdapterNode );
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    if (!in_irq_context)
++	spin_unlock_bh(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+diff --git a/CORE/SERVICES/WMI/wmi_unified.c b/CORE/SERVICES/WMI/wmi_unified.c
+index 0b9c1cd..b291614 100644
+--- a/CORE/SERVICES/WMI/wmi_unified.c
++++ b/CORE/SERVICES/WMI/wmi_unified.c
+@@ -926,9 +926,8 @@ int wmi_unified_cmd_send(wmi_unified_t wmi_handle, wmi_buf_t buf, int len,
+ 	if (adf_os_atomic_read(&wmi_handle->is_target_suspended) &&
+ 			( (WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID != cmd_id) &&
+ 			  (WMI_PDEV_RESUME_CMDID != cmd_id)) ) {
+-		adf_os_print("\nERROR: %s: Target is suspended  could not send WMI command: %d\n",
++		pr_debug("\nERROR: %s: Target is suspended  could not send WMI command: %d\n",
+ 				__func__, cmd_id);
+-		VOS_ASSERT(0);
+ 		return -EBUSY;
+ 	} else
+ 		goto dont_tag;
+diff --git a/CORE/VOSS/src/vos_sched.c b/CORE/VOSS/src/vos_sched.c
+index cb5787e..99912ab 100644
+--- a/CORE/VOSS/src/vos_sched.c
++++ b/CORE/VOSS/src/vos_sched.c
+@@ -1370,16 +1370,20 @@ void vos_free_tlshim_pkt(pVosSchedContext pSchedContext,
+ struct VosTlshimPkt *vos_alloc_tlshim_pkt(pVosSchedContext pSchedContext)
+ {
+    struct VosTlshimPkt *pkt;
++   bool in_irq_context = (in_irq() || irqs_disabled());
+ 
+-   spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   if (!in_irq_context)
++	spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
+    if (list_empty(&pSchedContext->VosTlshimPktFreeQ)) {
+-       spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   	if (!in_irq_context)
++		spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
+        return NULL;
+    }
+    pkt = list_first_entry(&pSchedContext->VosTlshimPktFreeQ,
+                           struct VosTlshimPkt, list);
+    list_del(&pkt->list);
+-   spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   if (!in_irq_context)
++	spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
+    return pkt;
+ }
+ 
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0006-Kbuild-disable-QCA_CONFIG_SMP.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0006-Kbuild-disable-QCA_CONFIG_SMP.patch
new file mode 100644
index 0000000..0cbb75e
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0006-Kbuild-disable-QCA_CONFIG_SMP.patch
@@ -0,0 +1,31 @@
+From 8b67d5d294896db83badb8d860051a2ab69e6a3d Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Mon, 14 May 2018 20:09:13 +0800
+Subject: [PATCH 06/11] Kbuild: disable QCA_CONFIG_SMP
+
+Disable QCA_CONFIG_SMP config for CLD driver since it still
+have bug that cause kernel dump.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ Kbuild | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Kbuild b/Kbuild
+index 3c4bd8d..af52286 100644
+--- a/Kbuild
++++ b/Kbuild
+@@ -1470,8 +1470,10 @@ endif
+ 
+ #Mark it as SMP Kernel
+ ifeq ($(CONFIG_SMP),y)
++ifneq ($(CONFIG_ROME_IF), sdio)
+ CDEFINES += -DQCA_CONFIG_SMP
+ endif
++endif
+ 
+ #rps feature
+ ifeq ($(CONFIG_RPS),y)
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0007-LEA.NRT_2.0-fix-the-build-error.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0007-LEA.NRT_2.0-fix-the-build-error.patch
new file mode 100644
index 0000000..0e6f98e
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0007-LEA.NRT_2.0-fix-the-build-error.patch
@@ -0,0 +1,53 @@
+From 26a981e1b0f0a4c123d2c2eaa59d50811e25929b Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Mon, 2 Apr 2018 15:33:38 +0800
+Subject: [PATCH 07/11] LEA.NRT_2.0: fix the build error
+
+Fix the build error for PCI host in LEA.NRT_1.0 version.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_cfg80211.c | 2 ++
+ CORE/SERVICES/BMI/ol_fw.h        | 4 ++--
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/CORE/HDD/src/wlan_hdd_cfg80211.c b/CORE/HDD/src/wlan_hdd_cfg80211.c
+index cb6f03d..50d5ae0 100644
+--- a/CORE/HDD/src/wlan_hdd_cfg80211.c
++++ b/CORE/HDD/src/wlan_hdd_cfg80211.c
+@@ -13492,12 +13492,14 @@ static int hdd_convert_auth_type(uint32_t auth_type)
+ 	case eCSR_AUTH_TYPE_WAPI_WAI_PSK:
+ 		ret_val = QCA_WLAN_AUTH_TYPE_WAI_PSK;
+ 		break;
++#ifdef WLAN_FEATURE_11W
+ 	case eCSR_AUTH_TYPE_RSN_PSK_SHA256:
+ 		ret_val = QCA_WLAN_AUTH_TYPE_SHA256_PSK;
+ 		break;
+ 	case eCSR_AUTH_TYPE_RSN_8021X_SHA256:
+ 		ret_val = QCA_WLAN_AUTH_TYPE_SHA256;
+ 		break;
++#endif
+ 	case eCSR_NUM_OF_SUPPORT_AUTH_TYPE:
+ 	case eCSR_AUTH_TYPE_FAILED:
+ 	case eCSR_AUTH_TYPE_NONE:
+diff --git a/CORE/SERVICES/BMI/ol_fw.h b/CORE/SERVICES/BMI/ol_fw.h
+index aca4961..fdd07f4 100644
+--- a/CORE/SERVICES/BMI/ol_fw.h
++++ b/CORE/SERVICES/BMI/ol_fw.h
+@@ -162,11 +162,11 @@ void ol_target_failure(void *instance, A_STATUS status);
+ u_int8_t ol_get_number_of_peers_supported(struct ol_softc *scn);
+ 
+ #ifdef REMOVE_PKT_LOG
+-static inline void ol_pktlog_init(void *)
++static inline void ol_pktlog_init(void *hif_sc)
+ {
+ }
+ #else
+-void ol_pktlog_init(void *);
++void ol_pktlog_init(void *hif_sc);
+ #endif
+ 
+ #if defined(HIF_SDIO)
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0008-CORE-add-pcie-multi_if_name-support.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0008-CORE-add-pcie-multi_if_name-support.patch
new file mode 100644
index 0000000..d98d800
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0008-CORE-add-pcie-multi_if_name-support.patch
@@ -0,0 +1,85 @@
+From 72964bb8777fd806e23849a44a07c11af55fdf92 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Fri, 4 May 2018 15:31:21 +0800
+Subject: [PATCH 08/11] CORE: add pcie multi_if_name support
+
+Add pcie multi_if_name support.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/SERVICES/BMI/ol_fw.c           | 33 +++++++++++++++++++++++----------
+ CORE/SERVICES/COMMON/ol_if_athvar.h |  2 +-
+ 2 files changed, 24 insertions(+), 11 deletions(-)
+
+diff --git a/CORE/SERVICES/BMI/ol_fw.c b/CORE/SERVICES/BMI/ol_fw.c
+index 8e8f7cb..e8d52a5 100644
+--- a/CORE/SERVICES/BMI/ol_fw.c
++++ b/CORE/SERVICES/BMI/ol_fw.c
+@@ -152,21 +152,28 @@ static int ol_get_fw_files_for_target(struct ol_fw_files *pfw_files,
+ #endif
+ 
+ #ifdef CONFIG_NON_QC_PLATFORM_PCI
++
++#ifdef MULTI_IF_NAME
++#define PREFIX MULTI_IF_NAME "/"
++#else
++#define PREFIX ""
++#endif
++
+ static struct non_qc_platform_pci_fw_files FW_FILES_QCA6174_FW_1_1 = {
+-"qwlan11.bin", "bdwlan11.bin", "otp11.bin", "utf11.bin",
+-"utfbd11.bin", "epping11.bin", "evicted11.bin"};
++	PREFIX "qwlan11.bin", PREFIX "bdwlan11.bin", PREFIX "otp11.bin",  PREFIX "utf11.bin",
++	PREFIX "utfbd11.bin", PREFIX "epping11.bin", PREFIX "evicted11.bin"};
+ static struct non_qc_platform_pci_fw_files FW_FILES_QCA6174_FW_2_0 = {
+-"qwlan20.bin", "bdwlan20.bin", "otp20.bin", "utf20.bin",
+-"utfbd20.bin", "epping20.bin", "evicted20.bin"};
++	PREFIX "qwlan20.bin", PREFIX "bdwlan20.bin", PREFIX "otp20.bin", PREFIX "utf20.bin",
++	PREFIX "utfbd20.bin", PREFIX "epping20.bin", PREFIX "evicted20.bin"};
+ static struct non_qc_platform_pci_fw_files FW_FILES_QCA6174_FW_1_3 = {
+-"qwlan13.bin", "bdwlan13.bin", "otp13.bin", "utf13.bin",
+-"utfbd13.bin", "epping13.bin", "evicted13.bin"};
++	PREFIX "qwlan13.bin", PREFIX "bdwlan13.bin", PREFIX "otp13.bin", PREFIX "utf13.bin",
++	PREFIX "utfbd13.bin", PREFIX "epping13.bin", PREFIX "evicted13.bin"};
+ static struct non_qc_platform_pci_fw_files FW_FILES_QCA6174_FW_3_0 = {
+-"qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
+-"utfbd30.bin", "epping30.bin", "evicted30.bin"};
++	PREFIX "qwlan30.bin", PREFIX "bdwlan30.bin", PREFIX "otp30.bin", PREFIX "utf30.bin",
++	PREFIX "utfbd30.bin", PREFIX "epping30.bin", PREFIX "evicted30.bin"};
+ static struct non_qc_platform_pci_fw_files FW_FILES_DEFAULT = {
+-"qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
+-"utfbd.bin", "epping.bin", "evicted.bin"};
++	PREFIX "qwlan.bin", PREFIX "bdwlan.bin", PREFIX "otp.bin", PREFIX "utf.bin",
++	PREFIX "utfbd.bin", PREFIX "epping.bin", PREFIX "evicted.bin"};
+ 
+ static
+ int get_fw_files_for_non_qc_pci_target(struct non_qc_platform_pci_fw_files *pfw_files,
+@@ -202,6 +209,12 @@ int get_fw_files_for_non_qc_pci_target(struct non_qc_platform_pci_fw_files *pfw_
+ 				__func__, target_type, target_version);
+ 			break;
+ 	}
++
++	pr_debug("%s:%d: pfw_files:%s, %s, %s, %s, %s, %s, %s\n", __func__, __LINE__,
++		pfw_files->image_file, pfw_files->board_data, pfw_files->otp_data,
++		pfw_files->utf_file, pfw_files->utf_board_data, pfw_files->epping_file,
++		pfw_files->evicted_data);
++
+ 	return 0;
+ }
+ #endif
+diff --git a/CORE/SERVICES/COMMON/ol_if_athvar.h b/CORE/SERVICES/COMMON/ol_if_athvar.h
+index 03fc4d3..a689b6b 100644
+--- a/CORE/SERVICES/COMMON/ol_if_athvar.h
++++ b/CORE/SERVICES/COMMON/ol_if_athvar.h
+@@ -149,7 +149,7 @@ struct fw_ramdump {
+ };
+ #endif
+ #ifdef CONFIG_NON_QC_PLATFORM_PCI
+-#define MAX_FILE_NAME        20
++#define MAX_FILE_NAME        40
+ struct non_qc_platform_pci_fw_files {
+     char image_file[MAX_FILE_NAME];
+     char board_data[MAX_FILE_NAME];
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0009-CORE-add-timeout-when-BMI-request-response-transacti.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0009-CORE-add-timeout-when-BMI-request-response-transacti.patch
new file mode 100644
index 0000000..4ce2612
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0009-CORE-add-timeout-when-BMI-request-response-transacti.patch
@@ -0,0 +1,83 @@
+From a2314b0afa1687cd043183ab3794e27336ad47b3 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Tue, 15 May 2018 10:45:21 +0800
+Subject: [PATCH 09/11] CORE: add timeout when BMI request/response transaction
+ are not completed
+
+Add timeout when BMI request/response transaction are not completed.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/SERVICES/COMMON/adf/adf_os_lock.h           | 10 ++++++++++
+ CORE/SERVICES/COMMON/adf/linux/adf_os_lock_pvt.h |  6 ++++++
+ CORE/SERVICES/HIF/PCIe/hif_pci.c                 |  7 ++++---
+ 3 files changed, 20 insertions(+), 3 deletions(-)
+
+diff --git a/CORE/SERVICES/COMMON/adf/adf_os_lock.h b/CORE/SERVICES/COMMON/adf/adf_os_lock.h
+index 9e0a733..a634ea3 100644
+--- a/CORE/SERVICES/COMMON/adf/adf_os_lock.h
++++ b/CORE/SERVICES/COMMON/adf/adf_os_lock.h
+@@ -72,6 +72,16 @@ static inline int adf_os_mutex_acquire(adf_os_device_t osdev, adf_os_mutex_t *m)
+ }
+ 
+ /**
++ * @brief Take the mutex
++ *
++ * @param[in] m mutex to take
++ */
++static inline int adf_os_mutex_acquire_timeout(adf_os_device_t osdev, adf_os_mutex_t *m, long timeout)
++{
++    return (__adf_os_mutex_acquire_timeout(osdev, m, timeout));
++}
++
++/**
+  * @brief Give the mutex
+  *
+  * @param[in] m mutex to give
+diff --git a/CORE/SERVICES/COMMON/adf/linux/adf_os_lock_pvt.h b/CORE/SERVICES/COMMON/adf/linux/adf_os_lock_pvt.h
+index 9bfdb50..36c847e 100644
+--- a/CORE/SERVICES/COMMON/adf/linux/adf_os_lock_pvt.h
++++ b/CORE/SERVICES/COMMON/adf/linux/adf_os_lock_pvt.h
+@@ -70,6 +70,12 @@ __adf_os_mutex_acquire(adf_os_device_t osdev, struct semaphore *m)
+     return 0;
+ }
+ 
++static inline int
++__adf_os_mutex_acquire_timeout(adf_os_device_t osdev, struct semaphore *m, long timeout)
++{
++    return down_timeout(m, timeout);
++}
++
+ static inline void
+ __adf_os_mutex_release(adf_os_device_t osdev, struct semaphore *m)
+ {
+diff --git a/CORE/SERVICES/HIF/PCIe/hif_pci.c b/CORE/SERVICES/HIF/PCIe/hif_pci.c
+index 508aac9..1496f08 100644
+--- a/CORE/SERVICES/HIF/PCIe/hif_pci.c
++++ b/CORE/SERVICES/HIF/PCIe/hif_pci.c
+@@ -2033,9 +2033,9 @@ HIFExchangeBMIMsg(HIF_DEVICE *hif_device,
+     struct CE_handle *ce_recv = recv_pipe_info->ce_hdl;
+ 
+ #ifdef BMI_RSP_POLLING
++    int i;
+     CE_addr_t buf;
+     unsigned int completed_nbytes, id, flags;
+-    int i;
+ #endif
+ 
+     AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" %s\n",__FUNCTION__));
+@@ -2092,8 +2092,9 @@ HIFExchangeBMIMsg(HIF_DEVICE *hif_device,
+ 
+     /* Wait for BMI request/response transaction to complete */
+     /* Always just wait for BMI request here if BMI_RSP_POLLING is defined */
+-    while (adf_os_mutex_acquire(scn->adf_dev, &transaction->bmi_transaction_sem)) {
+-        /*need some break out condition(time out?)*/
++    if (adf_os_mutex_acquire_timeout(scn->adf_dev, &transaction->bmi_transaction_sem, HZ)) {
++	printk("%s:error, can't get bmi response\n", __func__);
++	status = A_EBUSY;
+     }
+ 
+     if (bmi_response) {
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0010-CORE-HIF-PCIe-only-support-one-instance.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0010-CORE-HIF-PCIe-only-support-one-instance.patch
new file mode 100644
index 0000000..a258674
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0010-CORE-HIF-PCIe-only-support-one-instance.patch
@@ -0,0 +1,45 @@
+From 5c01620b0b3a3d7d6a95b4d00d75d44bd8e78b0c Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Tue, 15 May 2018 10:55:42 +0800
+Subject: [PATCH 10/11] CORE: HIF: PCIe: only support one instance
+
+The CLD driver only support one instance, add code check it.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/SERVICES/HIF/PCIe/if_pci.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/CORE/SERVICES/HIF/PCIe/if_pci.c b/CORE/SERVICES/HIF/PCIe/if_pci.c
+index 53fb1c2..374a9b0 100644
+--- a/CORE/SERVICES/HIF/PCIe/if_pci.c
++++ b/CORE/SERVICES/HIF/PCIe/if_pci.c
+@@ -1601,12 +1601,17 @@ hif_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+     u_int16_t device_id;
+     u_int16_t revision_id;
+     u_int32_t lcr_val;
++    static int devid = 0;
+ 
+     printk(KERN_INFO "%s:, con_mode= 0x%x\n", __func__, vos_get_conparam());
+ 
+ again:
+     ret = 0;
+ 
++    /* CLD driver only support one instance */
++    if (devid)
++	return -EIO;
++
+ #define BAR_NUM 0
+     /*
+      * Without any knowledge of the Host, the Target
+@@ -1886,6 +1891,7 @@ again:
+     pci_write_config_dword(pdev, 0x80, lcr_val);
+ 
+     hif_pci_pm_runtime_init(sc);
++    devid++;
+ 
+     return 0;
+ 
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0011-CORE-BMI-RF-align-the-utf-firmware-bin-name.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0011-CORE-BMI-RF-align-the-utf-firmware-bin-name.patch
new file mode 100644
index 0000000..884464c
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0011-CORE-BMI-RF-align-the-utf-firmware-bin-name.patch
@@ -0,0 +1,31 @@
+From bcddb095fb2ac2a4584705178d78c08d2d5ad583 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Tue, 15 May 2018 14:03:02 +0800
+Subject: [PATCH 11/11] CORE: BMI: RF: align the utf firmware bin name
+
+Align the utf firmware bin with release's name.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/SERVICES/BMI/ol_fw.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/CORE/SERVICES/BMI/ol_fw.c b/CORE/SERVICES/BMI/ol_fw.c
+index e8d52a5..8f7d978 100644
+--- a/CORE/SERVICES/BMI/ol_fw.c
++++ b/CORE/SERVICES/BMI/ol_fw.c
+@@ -682,11 +682,7 @@ defined(CONFIG_NON_QC_PLATFORM_PCI)
+ 		}
+ #ifdef QCA_WIFI_FTM
+ 		if (vos_get_conparam() == VOS_FTM_MODE) {
+-#if defined(CONFIG_CNSS) || defined(HIF_SDIO)
+ 			filename = scn->fw_files.utf_file;
+-#else
+-			filename = QCA_UTF_FIRMWARE_FILE;
+-#endif
+ #ifdef QCA_SIGNED_SPLIT_BINARY_SUPPORT
+ 			bin_sign = TRUE;
+ #endif
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0012-CORE-revert-two-patches-to-support-QCA-SMP.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0012-CORE-revert-two-patches-to-support-QCA-SMP.patch
new file mode 100644
index 0000000..5cdf338
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0012-CORE-revert-two-patches-to-support-QCA-SMP.patch
@@ -0,0 +1,81 @@
+From 3ff83bf4a4f7c0e399f6ed32b0883ac1239b7b1c Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Fri, 18 May 2018 16:52:01 +0800
+Subject: [PATCH 1/2] CORE: revert two patches to support QCA SMP
+
+This reverts commit af8e2f5c3b2f4cd56ed972a22761049f402742c4.
+This reverts commit 2ba3dce3e199a29efcc1d56a4a33be0cfa8de529.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_main.c |  7 ++-----
+ CORE/VOSS/src/vos_sched.c    | 10 +++-------
+ Kbuild                       |  2 --
+ 3 files changed, 5 insertions(+), 14 deletions(-)
+
+diff --git a/CORE/HDD/src/wlan_hdd_main.c b/CORE/HDD/src/wlan_hdd_main.c
+index 4f48d53..db42731 100644
+--- a/CORE/HDD/src/wlan_hdd_main.c
++++ b/CORE/HDD/src/wlan_hdd_main.c
+@@ -13823,13 +13823,10 @@ VOS_STATUS hdd_get_front_adapter( hdd_context_t *pHddCtx,
+                                   hdd_adapter_list_node_t** ppAdapterNode)
+ {
+     VOS_STATUS status;
+-    bool in_irq_context = (in_irq() || irqs_disabled());
+-    if (!in_irq_context)
+-	spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    spin_lock_bh(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_peek_front ( &pHddCtx->hddAdapters,
+                    (hdd_list_node_t**) ppAdapterNode );
+-    if (!in_irq_context)
+-	spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+diff --git a/CORE/VOSS/src/vos_sched.c b/CORE/VOSS/src/vos_sched.c
+index 99912ab..cb5787e 100644
+--- a/CORE/VOSS/src/vos_sched.c
++++ b/CORE/VOSS/src/vos_sched.c
+@@ -1370,20 +1370,16 @@ void vos_free_tlshim_pkt(pVosSchedContext pSchedContext,
+ struct VosTlshimPkt *vos_alloc_tlshim_pkt(pVosSchedContext pSchedContext)
+ {
+    struct VosTlshimPkt *pkt;
+-   bool in_irq_context = (in_irq() || irqs_disabled());
+ 
+-   if (!in_irq_context)
+-	spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
+    if (list_empty(&pSchedContext->VosTlshimPktFreeQ)) {
+-   	if (!in_irq_context)
+-		spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++       spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
+        return NULL;
+    }
+    pkt = list_first_entry(&pSchedContext->VosTlshimPktFreeQ,
+                           struct VosTlshimPkt, list);
+    list_del(&pkt->list);
+-   if (!in_irq_context)
+-	spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
+    return pkt;
+ }
+ 
+diff --git a/Kbuild b/Kbuild
+index af52286..3c4bd8d 100644
+--- a/Kbuild
++++ b/Kbuild
+@@ -1470,10 +1470,8 @@ endif
+ 
+ #Mark it as SMP Kernel
+ ifeq ($(CONFIG_SMP),y)
+-ifneq ($(CONFIG_ROME_IF), sdio)
+ CDEFINES += -DQCA_CONFIG_SMP
+ endif
+-endif
+ 
+ #rps feature
+ ifeq ($(CONFIG_RPS),y)
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0013-CORE-services-os-fix-issue-to-avoid-spin_lock_bh-in-.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0013-CORE-services-os-fix-issue-to-avoid-spin_lock_bh-in-.patch
new file mode 100644
index 0000000..2e6dfc7
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0013-CORE-services-os-fix-issue-to-avoid-spin_lock_bh-in-.patch
@@ -0,0 +1,1367 @@
+From a2ba3705d738df2870ee58e7c65de0472428d5e4 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Thu, 17 May 2018 19:03:22 +0800
+Subject: [PATCH 2/2] CORE: services: os: fix issue to avoid spin_lock_bh in
+ irq context
+
+Iusse fixes: to avoid spin_lock_bh calling in irq context.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_assoc.c        |  8 +++---
+ CORE/HDD/src/wlan_hdd_ftm.c          | 12 ++++-----
+ CORE/HDD/src/wlan_hdd_hostapd.c      | 30 +++++++++++-----------
+ CORE/HDD/src/wlan_hdd_ipa.c          | 50 ++++++++++++++++++------------------
+ CORE/HDD/src/wlan_hdd_main.c         | 34 ++++++++++++------------
+ CORE/HDD/src/wlan_hdd_softap_tx_rx.c | 28 ++++++++++----------
+ CORE/HDD/src/wlan_hdd_tx_rx.c        | 38 +++++++++++++--------------
+ CORE/HDD/src/wlan_hdd_wext.c         |  8 +++---
+ CORE/SERVICES/COMMON/adf/adf_trace.c | 24 +++++++++--------
+ CORE/SERVICES/COMMON/osapi_linux.h   |  4 +--
+ CORE/SERVICES/COMMON/osdep_adf.h     | 18 +++++++++++++
+ CORE/UTILS/FWLOG/dbglog_host.c       |  8 +++---
+ CORE/UTILS/PKTLOG/linux_ac.c         | 42 +++++++++++++++---------------
+ CORE/UTILS/PKTLOG/pktlog_ac.c        |  8 +++---
+ CORE/VOSS/src/vos_packet.c           |  8 +++---
+ CORE/VOSS/src/vos_sched.c            | 42 +++++++++++++++---------------
+ 16 files changed, 191 insertions(+), 171 deletions(-)
+
+diff --git a/CORE/HDD/src/wlan_hdd_assoc.c b/CORE/HDD/src/wlan_hdd_assoc.c
+index 1c16702..889ea95 100644
+--- a/CORE/HDD/src/wlan_hdd_assoc.c
++++ b/CORE/HDD/src/wlan_hdd_assoc.c
+@@ -1299,13 +1299,13 @@ static void hdd_SendAssociationEvent(struct net_device *dev,tCsrRoamInfo *pCsrRo
+ 
+ #ifdef FEATURE_BUS_BANDWIDTH
+         /* start timer in sta/p2p_cli */
+-        spin_lock_bh(&pHddCtx->bus_bw_lock);
++        SPIN_LOCK_BH(&pHddCtx->bus_bw_lock);
+         pAdapter->prev_tx_packets = pAdapter->stats.tx_packets;
+         pAdapter->prev_rx_packets = pAdapter->stats.rx_packets;
+         tlshim_get_intra_bss_fwd_pkts_count(pAdapter->sessionId,
+              &pAdapter->prev_fwd_tx_packets, &pAdapter->prev_fwd_rx_packets);
+         pAdapter->prev_tx_bytes = pAdapter->stats.tx_bytes;
+-        spin_unlock_bh(&pHddCtx->bus_bw_lock);
++        SPIN_UNLOCK_BH(&pHddCtx->bus_bw_lock);
+         hdd_start_bus_bw_compute_timer(pAdapter);
+ #endif
+         if (pHddCtx->cfg_ini->mon_on_sta_enable &&
+@@ -1364,13 +1364,13 @@ static void hdd_SendAssociationEvent(struct net_device *dev,tCsrRoamInfo *pCsrRo
+ 
+ #ifdef FEATURE_BUS_BANDWIDTH
+         /* stop timer in sta/p2p_cli */
+-        spin_lock_bh(&pHddCtx->bus_bw_lock);
++        SPIN_LOCK_BH(&pHddCtx->bus_bw_lock);
+         pAdapter->prev_tx_packets = 0;
+         pAdapter->prev_rx_packets = 0;
+         pAdapter->prev_fwd_tx_packets = 0;
+         pAdapter->prev_fwd_rx_packets = 0;
+         pAdapter->prev_tx_bytes = 0;
+-        spin_unlock_bh(&pHddCtx->bus_bw_lock);
++        SPIN_UNLOCK_BH(&pHddCtx->bus_bw_lock);
+         hdd_stop_bus_bw_compute_timer(pAdapter);
+ #endif
+         if (pHddCtx->cfg_ini->mon_on_sta_enable &&
+diff --git a/CORE/HDD/src/wlan_hdd_ftm.c b/CORE/HDD/src/wlan_hdd_ftm.c
+index acf8c77..2854eb2 100644
+--- a/CORE/HDD/src/wlan_hdd_ftm.c
++++ b/CORE/HDD/src/wlan_hdd_ftm.c
+@@ -834,7 +834,7 @@ int wlan_hdd_ftm_close(hdd_context_t *pHddCtx)
+     }
+ 
+ #if defined(QCA_WIFI_FTM) && defined(LINUX_QCMBR)
+-    spin_lock_bh(&qcmbr_queue_lock);
++    SPIN_LOCK_BH(&qcmbr_queue_lock);
+     if (!list_empty(&qcmbr_queue_head)) {
+         qcmbr_queue_t *msg_buf, *tmp_buf;
+         list_for_each_entry_safe(msg_buf, tmp_buf, &qcmbr_queue_head, list) {
+@@ -842,7 +842,7 @@ int wlan_hdd_ftm_close(hdd_context_t *pHddCtx)
+             kfree(msg_buf);
+         }
+     }
+-    spin_unlock_bh(&qcmbr_queue_lock);
++    SPIN_UNLOCK_BH(&qcmbr_queue_lock);
+ #endif
+ 
+     return 0;
+@@ -972,7 +972,7 @@ static int wlan_hdd_qcmbr_command(hdd_adapter_t *pAdapter, qcmbr_data_t *pqcmbr_
+         case ATH_XIOCTL_UNIFIED_UTF_RSP: {
+             pqcmbr_data->copy_to_user = 1;
+ 
+-            spin_lock_bh(&qcmbr_queue_lock);
++            SPIN_LOCK_BH(&qcmbr_queue_lock);
+             if (!list_empty(&qcmbr_queue_head)) {
+                 qcmbr_buf = list_first_entry(&qcmbr_queue_head,
+                                              qcmbr_queue_t, list);
+@@ -981,7 +981,7 @@ static int wlan_hdd_qcmbr_command(hdd_adapter_t *pAdapter, qcmbr_data_t *pqcmbr_
+             } else {
+                 ret = -1;
+             }
+-            spin_unlock_bh(&qcmbr_queue_lock);
++            SPIN_UNLOCK_BH(&qcmbr_queue_lock);
+ 
+             if (!ret) {
+                 memcpy(pqcmbr_data->buf, qcmbr_buf->utf_buf,
+@@ -1085,9 +1085,9 @@ static void WLANQCMBR_McProcessMsg(v_VOID_t *message)
+     qcmbr_buf = kzalloc(sizeof(qcmbr_queue_t), GFP_KERNEL);
+     if (qcmbr_buf != NULL) {
+         memcpy(qcmbr_buf->utf_buf, message, data_len);
+-        spin_lock_bh(&qcmbr_queue_lock);
++        SPIN_LOCK_BH(&qcmbr_queue_lock);
+         list_add_tail(&(qcmbr_buf->list), &qcmbr_queue_head);
+-        spin_unlock_bh(&qcmbr_queue_lock);
++        SPIN_UNLOCK_BH(&qcmbr_queue_lock);
+     }
+ }
+ #endif /*LINUX_QCMBR*/
+diff --git a/CORE/HDD/src/wlan_hdd_hostapd.c b/CORE/HDD/src/wlan_hdd_hostapd.c
+index 9519764..8bea288 100644
+--- a/CORE/HDD/src/wlan_hdd_hostapd.c
++++ b/CORE/HDD/src/wlan_hdd_hostapd.c
+@@ -2389,9 +2389,9 @@ VOS_STATUS hdd_hostapd_SAPEventCB( tpSap_Event pSapEvent, v_PVOID_t usrDataForCa
+                 }
+            }
+ 
+-            spin_lock_bh(&pHddCtx->dfs_lock);
++            SPIN_LOCK_BH(&pHddCtx->dfs_lock);
+             pHddCtx->dfs_radar_found = VOS_FALSE;
+-            spin_unlock_bh(&pHddCtx->dfs_lock);
++            SPIN_UNLOCK_BH(&pHddCtx->dfs_lock);
+             WLANSAP_Get_Dfs_Ignore_CAC(pHddCtx->hHal, &ignoreCAC);
+             if ((NV_CHANNEL_DFS !=
+                 vos_nv_getChannelEnabledState(pHddApCtx->operatingChannel))
+@@ -2723,7 +2723,7 @@ VOS_STATUS hdd_hostapd_SAPEventCB( tpSap_Event pSapEvent, v_PVOID_t usrDataForCa
+             /* start timer in sap/p2p_go */
+             if (pHddApCtx->bApActive == VOS_FALSE)
+             {
+-                spin_lock_bh(&pHddCtx->bus_bw_lock);
++                SPIN_LOCK_BH(&pHddCtx->bus_bw_lock);
+                 pHostapdAdapter->prev_tx_packets = pHostapdAdapter->stats.tx_packets;
+                 pHostapdAdapter->prev_rx_packets = pHostapdAdapter->stats.rx_packets;
+                 tlshim_get_intra_bss_fwd_pkts_count(
+@@ -2732,7 +2732,7 @@ VOS_STATUS hdd_hostapd_SAPEventCB( tpSap_Event pSapEvent, v_PVOID_t usrDataForCa
+                        &pHostapdAdapter->prev_fwd_rx_packets);
+                 pHostapdAdapter->prev_tx_bytes =
+                         pHostapdAdapter->stats.tx_bytes;
+-                spin_unlock_bh(&pHddCtx->bus_bw_lock);
++                SPIN_UNLOCK_BH(&pHddCtx->bus_bw_lock);
+                 hdd_start_bus_bw_compute_timer(pHostapdAdapter);
+             }
+ #endif
+@@ -2869,7 +2869,7 @@ VOS_STATUS hdd_hostapd_SAPEventCB( tpSap_Event pSapEvent, v_PVOID_t usrDataForCa
+             hdd_softap_DeregisterSTA(pHostapdAdapter, staId);
+ 
+             pHddApCtx->bApActive = VOS_FALSE;
+-            spin_lock_bh( &pHostapdAdapter->staInfo_lock );
++            SPIN_LOCK_BH( &pHostapdAdapter->staInfo_lock );
+             for (i = 0; i < WLAN_MAX_STA_COUNT; i++)
+             {
+                 if (pHostapdAdapter->aStaInfo[i].isUsed && i != (WLAN_HDD_GET_AP_CTX_PTR(pHostapdAdapter))->uBCStaId)
+@@ -2878,7 +2878,7 @@ VOS_STATUS hdd_hostapd_SAPEventCB( tpSap_Event pSapEvent, v_PVOID_t usrDataForCa
+                     break;
+                 }
+             }
+-            spin_unlock_bh( &pHostapdAdapter->staInfo_lock );
++            SPIN_UNLOCK_BH( &pHostapdAdapter->staInfo_lock );
+ 
+             // Start AP inactivity timer if no stations associated with it
+             if ((0 != (WLAN_HDD_GET_CTX(pHostapdAdapter))->cfg_ini->nAPAutoShutOff))
+@@ -2943,13 +2943,13 @@ VOS_STATUS hdd_hostapd_SAPEventCB( tpSap_Event pSapEvent, v_PVOID_t usrDataForCa
+             /*stop timer in sap/p2p_go */
+             if (pHddApCtx->bApActive == FALSE)
+             {
+-                spin_lock_bh(&pHddCtx->bus_bw_lock);
++                SPIN_LOCK_BH(&pHddCtx->bus_bw_lock);
+                 pHostapdAdapter->prev_tx_packets = 0;
+                 pHostapdAdapter->prev_rx_packets = 0;
+                 pHostapdAdapter->prev_fwd_tx_packets = 0;
+                 pHostapdAdapter->prev_fwd_rx_packets = 0;
+                 pHostapdAdapter->prev_tx_bytes = 0;
+-                spin_unlock_bh(&pHddCtx->bus_bw_lock);
++                SPIN_UNLOCK_BH(&pHddCtx->bus_bw_lock);
+                 hdd_stop_bus_bw_compute_timer(pHostapdAdapter);
+             }
+ #endif
+@@ -3359,10 +3359,10 @@ int hdd_softap_set_channel_change(struct net_device *dev, int target_channel)
+         }
+     }
+ 
+-    spin_lock_bh(&pHddCtx->dfs_lock);
++    SPIN_LOCK_BH(&pHddCtx->dfs_lock);
+     if (pHddCtx->dfs_radar_found == VOS_TRUE)
+     {
+-        spin_unlock_bh(&pHddCtx->dfs_lock);
++        SPIN_UNLOCK_BH(&pHddCtx->dfs_lock);
+         hddLog(VOS_TRACE_LEVEL_ERROR, "%s: Channel switch in progress!!",
+                __func__);
+         ret = -EBUSY;
+@@ -3379,7 +3379,7 @@ int hdd_softap_set_channel_change(struct net_device *dev, int target_channel)
+      */
+     pHddCtx->dfs_radar_found = VOS_TRUE;
+ 
+-    spin_unlock_bh(&pHddCtx->dfs_lock);
++    SPIN_UNLOCK_BH(&pHddCtx->dfs_lock);
+     /*
+      * Post the Channel Change request to SAP.
+      */
+@@ -3402,9 +3402,9 @@ int hdd_softap_set_channel_change(struct net_device *dev, int target_channel)
+          * queues.
+          */
+ 
+-        spin_lock_bh(&pHddCtx->dfs_lock);
++        SPIN_LOCK_BH(&pHddCtx->dfs_lock);
+         pHddCtx->dfs_radar_found = VOS_FALSE;
+-        spin_unlock_bh(&pHddCtx->dfs_lock);
++        SPIN_UNLOCK_BH(&pHddCtx->dfs_lock);
+ 
+         ret = -EINVAL;
+     }
+@@ -5278,7 +5278,7 @@ static __iw_softap_getassoc_stamacaddr(struct net_device *dev,
+     maclist_index = sizeof(maclist_index);
+     left = wrqu->data.length - maclist_index;
+ 
+-    spin_lock_bh(&pHostapdAdapter->staInfo_lock);
++    SPIN_LOCK_BH(&pHostapdAdapter->staInfo_lock);
+     while ((cnt < WLAN_MAX_STA_COUNT) && (left >= VOS_MAC_ADDR_SIZE)) {
+         if ((pStaInfo[cnt].isUsed) &&
+             (!IS_BROADCAST_MAC(pStaInfo[cnt].macAddrSTA.bytes))) {
+@@ -5289,7 +5289,7 @@ static __iw_softap_getassoc_stamacaddr(struct net_device *dev,
+         }
+         cnt++;
+     }
+-    spin_unlock_bh(&pHostapdAdapter->staInfo_lock);
++    SPIN_UNLOCK_BH(&pHostapdAdapter->staInfo_lock);
+ 
+     *((u32 *)buf) = maclist_index;
+     wrqu->data.length = maclist_index;
+diff --git a/CORE/HDD/src/wlan_hdd_ipa.c b/CORE/HDD/src/wlan_hdd_ipa.c
+index f169620..8837214 100644
+--- a/CORE/HDD/src/wlan_hdd_ipa.c
++++ b/CORE/HDD/src/wlan_hdd_ipa.c
+@@ -596,7 +596,7 @@ static struct ipa_tx_data_desc *hdd_ipa_alloc_data_desc(
+ {
+ 	struct ipa_tx_data_desc *desc = NULL;
+ 
+-	spin_lock_bh(&hdd_ipa->q_lock);
++	SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	/* Keep the descriptors for priority alloc which can be used for
+ 	 * anchor nodes
+@@ -616,7 +616,7 @@ static struct ipa_tx_data_desc *hdd_ipa_alloc_data_desc(
+ 	}
+ 
+ end:
+-	spin_unlock_bh(&hdd_ipa->q_lock);
++	SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	return desc;
+ }
+@@ -627,10 +627,10 @@ static void hdd_ipa_free_data_desc(struct hdd_ipa_priv *hdd_ipa,
+ 	desc->priv = NULL;
+ 	desc->pyld_buffer = NULL;
+ 	desc->pyld_len = 0;
+-	spin_lock_bh(&hdd_ipa->q_lock);
++	SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 	list_add_tail(&desc->link, &hdd_ipa->free_desc_head);
+ 	hdd_ipa->freeq_cnt++;
+-	spin_unlock_bh(&hdd_ipa->q_lock);
++	SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ }
+ 
+ static struct iphdr * hdd_ipa_get_ip_pkt(void *data, uint16_t *eth_type)
+@@ -2532,12 +2532,12 @@ static int hdd_ipa_rm_try_release(struct hdd_ipa_priv *hdd_ipa)
+ 		return -EAGAIN;
+ 
+ #ifndef IPA_UC_STA_OFFLOAD
+-	spin_lock_bh(&hdd_ipa->q_lock);
++	SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 	if (hdd_ipa->pending_hw_desc_cnt || hdd_ipa->pend_q_cnt) {
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 		return -EAGAIN;
+ 	}
+-	spin_unlock_bh(&hdd_ipa->q_lock);
++	SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ #endif
+ 
+ 	adf_os_spin_lock_bh(&hdd_ipa->pm_lock);
+@@ -2613,11 +2613,11 @@ static void hdd_ipa_send_pkt_to_ipa(struct hdd_ipa_priv *hdd_ipa)
+ 
+ 	INIT_LIST_HEAD(&send_desc_head->link);
+ 
+-	spin_lock_bh(&hdd_ipa->q_lock);
++	SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	if (hdd_ipa->pending_hw_desc_cnt >= hdd_ipa->hw_desc_cnt) {
+ 		hdd_ipa->stats.num_rx_ipa_hw_maxed_out++;
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 		hdd_ipa_free_data_desc(hdd_ipa, send_desc_head);
+ 		return;
+ 	}
+@@ -2625,7 +2625,7 @@ static void hdd_ipa_send_pkt_to_ipa(struct hdd_ipa_priv *hdd_ipa)
+ 	pend_q_cnt = hdd_ipa->pend_q_cnt;
+ 
+ 	if (pend_q_cnt == 0) {
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 		hdd_ipa_free_data_desc(hdd_ipa, send_desc_head);
+ 		return;
+ 	}
+@@ -2659,7 +2659,7 @@ static void hdd_ipa_send_pkt_to_ipa(struct hdd_ipa_priv *hdd_ipa)
+ 	}
+ 
+ 	hdd_ipa->pending_hw_desc_cnt += cur_send_cnt;
+-	spin_unlock_bh(&hdd_ipa->q_lock);
++	SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	if (ipa_tx_dp_mul(hdd_ipa->prod_client, send_desc_head) != 0) {
+ 		HDD_IPA_LOG(VOS_TRACE_LEVEL_ERROR,
+@@ -2677,9 +2677,9 @@ static void hdd_ipa_send_pkt_to_ipa(struct hdd_ipa_priv *hdd_ipa)
+ 
+ ipa_tx_failed:
+ 
+-	spin_lock_bh(&hdd_ipa->q_lock);
++	SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 	hdd_ipa->pending_hw_desc_cnt -= cur_send_cnt;
+-	spin_unlock_bh(&hdd_ipa->q_lock);
++	SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	list_for_each_entry_safe(desc, tmp, &send_desc_head->link, link) {
+ 		list_del(&desc->link);
+@@ -3126,10 +3126,10 @@ VOS_STATUS hdd_ipa_process_rxt(v_VOID_t *vosContext, adf_nbuf_t rx_buf_list,
+ 		send_desc->priv = buf;
+ 		send_desc->pyld_buffer = buf->data;
+ 		send_desc->pyld_len = buf->len;
+-		spin_lock_bh(&hdd_ipa->q_lock);
++		SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 		list_add_tail(&send_desc->link, &hdd_ipa->pend_desc_head);
+ 		hdd_ipa->pend_q_cnt++;
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 		cur_cnt++;
+ 		buf = next_buf;
+ 	}
+@@ -3392,9 +3392,9 @@ static void hdd_ipa_w2i_cb(void *priv, enum ipa_dp_evt_type evt,
+ 			buf = done_desc->priv;
+ 			adf_nbuf_free(buf);
+ 			hdd_ipa_free_data_desc(hdd_ipa, done_desc);
+-			spin_lock_bh(&hdd_ipa->q_lock);
++			SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 			hdd_ipa->pending_hw_desc_cnt--;
+-			spin_unlock_bh(&hdd_ipa->q_lock);
++			SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 			hdd_ipa->stats.num_rx_ipa_write_done++;
+ 		}
+ 		/* add anchor node also back to free list */
+@@ -4751,24 +4751,24 @@ static void hdd_ipa_rx_pipe_desc_free(void)
+ 
+ 	max_desc_cnt = hdd_ipa->hw_desc_cnt * HDD_IPA_DESC_BUFFER_RATIO;
+ 
+-	spin_lock_bh(&hdd_ipa->q_lock);
++	SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	list_for_each_entry_safe(desc, tmp, &hdd_ipa->pend_desc_head, link) {
+ 		list_del(&desc->link);
+ 		adf_nbuf_free(desc->priv);
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 		hdd_ipa_free_data_desc(hdd_ipa, desc);
+-		spin_lock_bh(&hdd_ipa->q_lock);
++		SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 	}
+ 
+ 	list_for_each_entry_safe(desc, tmp, &hdd_ipa->free_desc_head, link) {
+ 		list_del(&desc->link);
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 		adf_os_mem_free(desc);
+-		spin_lock_bh(&hdd_ipa->q_lock);
++		SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 		i++;
+ 	}
+-	spin_unlock_bh(&hdd_ipa->q_lock);
++	SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 
+ 	if (i != max_desc_cnt)
+ 		HDD_IPA_LOG(VOS_TRACE_LEVEL_FATAL, "free desc leak: %u, %u", i,
+@@ -4803,9 +4803,9 @@ static int hdd_ipa_rx_pipe_desc_alloc(void)
+ 					"Descriptor allocation failed");
+ 			goto fail;
+ 		}
+-		spin_lock_bh(&hdd_ipa->q_lock);
++		SPIN_LOCK_BH(&hdd_ipa->q_lock);
+ 		list_add_tail(&tmp_desc->link, &hdd_ipa->free_desc_head);
+-		spin_unlock_bh(&hdd_ipa->q_lock);
++		SPIN_UNLOCK_BH(&hdd_ipa->q_lock);
+ 	}
+ 
+ 
+diff --git a/CORE/HDD/src/wlan_hdd_main.c b/CORE/HDD/src/wlan_hdd_main.c
+old mode 100644
+new mode 100755
+index db42731..636ba5f
+--- a/CORE/HDD/src/wlan_hdd_main.c
++++ b/CORE/HDD/src/wlan_hdd_main.c
+@@ -9513,18 +9513,18 @@ bool hdd_dfs_indicate_radar(void *context, void *param)
+ 
+     if (VOS_TRUE == hdd_radar_event->dfs_radar_status)
+     {
+-        spin_lock_bh(&pHddCtx->dfs_lock);
++        SPIN_LOCK_BH(&pHddCtx->dfs_lock);
+         if (pHddCtx->dfs_radar_found)
+         {
+             /* Application already triggered channel switch
+              * on current channel, so return here
+              */
+-            spin_unlock_bh(&pHddCtx->dfs_lock);
++            SPIN_UNLOCK_BH(&pHddCtx->dfs_lock);
+             return false;
+         }
+ 
+         pHddCtx->dfs_radar_found = VOS_TRUE;
+-        spin_unlock_bh(&pHddCtx->dfs_lock);
++        SPIN_UNLOCK_BH(&pHddCtx->dfs_lock);
+ 
+         status = hdd_get_front_adapter ( pHddCtx, &pAdapterNode );
+         while ( NULL != pAdapterNode && VOS_STATUS_SUCCESS == status )
+@@ -13823,10 +13823,10 @@ VOS_STATUS hdd_get_front_adapter( hdd_context_t *pHddCtx,
+                                   hdd_adapter_list_node_t** ppAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_LOCK_BH(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_peek_front ( &pHddCtx->hddAdapters,
+                    (hdd_list_node_t**) ppAdapterNode );
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_UNLOCK_BH(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+@@ -13835,12 +13835,12 @@ VOS_STATUS hdd_get_next_adapter( hdd_context_t *pHddCtx,
+                                  hdd_adapter_list_node_t** pNextAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_LOCK_BH(&pHddCtx->hddAdapters.lock);
+     status = hdd_list_peek_next ( &pHddCtx->hddAdapters,
+                                   (hdd_list_node_t*) pAdapterNode,
+                                   (hdd_list_node_t**)pNextAdapterNode );
+ 
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_UNLOCK_BH(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+@@ -13848,10 +13848,10 @@ VOS_STATUS hdd_remove_adapter( hdd_context_t *pHddCtx,
+                                hdd_adapter_list_node_t* pAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_LOCK_BH(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_remove_node ( &pHddCtx->hddAdapters,
+                                      &pAdapterNode->node );
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_UNLOCK_BH(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+@@ -13859,10 +13859,10 @@ VOS_STATUS hdd_remove_front_adapter( hdd_context_t *pHddCtx,
+                                      hdd_adapter_list_node_t** ppAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_LOCK_BH(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_remove_front( &pHddCtx->hddAdapters,
+                    (hdd_list_node_t**) ppAdapterNode );
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_UNLOCK_BH(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+@@ -13870,10 +13870,10 @@ VOS_STATUS hdd_add_adapter_back( hdd_context_t *pHddCtx,
+                                  hdd_adapter_list_node_t* pAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_LOCK_BH(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_insert_back ( &pHddCtx->hddAdapters,
+                    (hdd_list_node_t*) pAdapterNode );
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_UNLOCK_BH(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+@@ -13881,10 +13881,10 @@ VOS_STATUS hdd_add_adapter_front( hdd_context_t *pHddCtx,
+                                   hdd_adapter_list_node_t* pAdapterNode)
+ {
+     VOS_STATUS status;
+-    spin_lock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_LOCK_BH(&pHddCtx->hddAdapters.lock);
+     status =  hdd_list_insert_front ( &pHddCtx->hddAdapters,
+                    (hdd_list_node_t*) pAdapterNode );
+-    spin_unlock_bh(&pHddCtx->hddAdapters.lock);
++    SPIN_UNLOCK_BH(&pHddCtx->hddAdapters.lock);
+     return status;
+ }
+ 
+@@ -15527,13 +15527,13 @@ static void hdd_bus_bw_compute_cbk(void *priv)
+         total_tx += pAdapter->stats.tx_packets;
+ 
+ 
+-        spin_lock_bh(&pHddCtx->bus_bw_lock);
++        SPIN_LOCK_BH(&pHddCtx->bus_bw_lock);
+         pAdapter->prev_tx_packets = pAdapter->stats.tx_packets;
+         pAdapter->prev_tx_bytes = pAdapter->stats.tx_bytes;
+         pAdapter->prev_rx_packets = pAdapter->stats.rx_packets;
+         pAdapter->prev_fwd_tx_packets = fwd_tx_packets;
+         pAdapter->prev_fwd_rx_packets = fwd_rx_packets;
+-        spin_unlock_bh(&pHddCtx->bus_bw_lock);
++        SPIN_UNLOCK_BH(&pHddCtx->bus_bw_lock);
+         connected = TRUE;
+     }
+ 
+diff --git a/CORE/HDD/src/wlan_hdd_softap_tx_rx.c b/CORE/HDD/src/wlan_hdd_softap_tx_rx.c
+index 501f073..c02e983 100644
+--- a/CORE/HDD/src/wlan_hdd_softap_tx_rx.c
++++ b/CORE/HDD/src/wlan_hdd_softap_tx_rx.c
+@@ -82,7 +82,7 @@ static VOS_STATUS hdd_softap_flush_tx_queues( hdd_adapter_t *pAdapter )
+    skb_list_node_t *pktNode = NULL;
+    struct sk_buff *skb = NULL;
+ 
+-   spin_lock_bh( &pAdapter->staInfo_lock );
++   SPIN_LOCK_BH( &pAdapter->staInfo_lock );
+    for (STAId = 0; STAId < WLAN_MAX_STA_COUNT; STAId++)
+    {
+       if (FALSE == pAdapter->aStaInfo[STAId].isUsed)
+@@ -92,7 +92,7 @@ static VOS_STATUS hdd_softap_flush_tx_queues( hdd_adapter_t *pAdapter )
+ 
+       for (i = 0; i < NUM_TX_QUEUES; i ++)
+       {
+-         spin_lock_bh(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
++         SPIN_LOCK_BH(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
+          while (true)
+          {
+             status = hdd_list_remove_front ( &pAdapter->aStaInfo[STAId].wmm_tx_queue[i], &anchor);
+@@ -111,12 +111,12 @@ static VOS_STATUS hdd_softap_flush_tx_queues( hdd_adapter_t *pAdapter )
+             break;
+          }
+          pAdapter->aStaInfo[STAId].txSuspended[i] = VOS_FALSE;
+-         spin_unlock_bh(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
++         SPIN_UNLOCK_BH(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
+       }
+       pAdapter->aStaInfo[STAId].vosLowResource = VOS_FALSE;
+    }
+ 
+-   spin_unlock_bh( &pAdapter->staInfo_lock );
++   SPIN_UNLOCK_BH( &pAdapter->staInfo_lock );
+ 
+    return status;
+ }
+@@ -680,7 +680,7 @@ static void hdd_softap_flush_tx_queues_sta( hdd_adapter_t *pAdapter, v_U8_t STAI
+ 
+    for (i = 0; i < NUM_TX_QUEUES; i ++)
+    {
+-      spin_lock_bh(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
++      SPIN_LOCK_BH(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
+       while (true)
+       {
+          if (VOS_STATUS_E_EMPTY !=
+@@ -698,7 +698,7 @@ static void hdd_softap_flush_tx_queues_sta( hdd_adapter_t *pAdapter, v_U8_t STAI
+          //current list is empty
+          break;
+       }
+-      spin_unlock_bh(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
++      SPIN_UNLOCK_BH(&pAdapter->aStaInfo[STAId].wmm_tx_queue[i].lock);
+    }
+ 
+    return;
+@@ -717,12 +717,12 @@ static void hdd_softap_flush_tx_queues_sta( hdd_adapter_t *pAdapter, v_U8_t STAI
+ VOS_STATUS hdd_softap_init_tx_rx_sta( hdd_adapter_t *pAdapter, v_U8_t STAId, v_MACADDR_t *pmacAddrSTA)
+ {
+    v_U8_t i = 0;
+-   spin_lock_bh( &pAdapter->staInfo_lock );
++   SPIN_LOCK_BH( &pAdapter->staInfo_lock );
+    if (pAdapter->aStaInfo[STAId].isUsed)
+    {
+       VOS_TRACE( VOS_MODULE_ID_HDD_SAP_DATA, VOS_TRACE_LEVEL_ERROR,
+                  "%s: Reinit station %d", __func__, STAId );
+-      spin_unlock_bh( &pAdapter->staInfo_lock );
++      SPIN_UNLOCK_BH( &pAdapter->staInfo_lock );
+       return VOS_STATUS_E_FAILURE;
+    }
+ 
+@@ -736,7 +736,7 @@ VOS_STATUS hdd_softap_init_tx_rx_sta( hdd_adapter_t *pAdapter, v_U8_t STAId, v_M
+    pAdapter->aStaInfo[STAId].isDeauthInProgress = FALSE;
+    vos_copy_macaddr( &pAdapter->aStaInfo[STAId].macAddrSTA, pmacAddrSTA);
+ 
+-   spin_unlock_bh( &pAdapter->staInfo_lock );
++   SPIN_UNLOCK_BH( &pAdapter->staInfo_lock );
+    return VOS_STATUS_SUCCESS;
+ }
+ 
+@@ -761,12 +761,12 @@ VOS_STATUS hdd_softap_deinit_tx_rx_sta ( hdd_adapter_t *pAdapter, v_U8_t STAId )
+ 
+    pHostapdState = WLAN_HDD_GET_HOSTAP_STATE_PTR(pAdapter);
+ 
+-   spin_lock_bh( &pAdapter->staInfo_lock );
++   SPIN_LOCK_BH( &pAdapter->staInfo_lock );
+    if (FALSE == pAdapter->aStaInfo[STAId].isUsed)
+    {
+       VOS_TRACE( VOS_MODULE_ID_HDD_SAP_DATA, VOS_TRACE_LEVEL_ERROR,
+                  "%s: Deinit station not inited %d", __func__, STAId );
+-      spin_unlock_bh( &pAdapter->staInfo_lock );
++      SPIN_UNLOCK_BH( &pAdapter->staInfo_lock );
+       return VOS_STATUS_E_FAILURE;
+    }
+ 
+@@ -814,7 +814,7 @@ VOS_STATUS hdd_softap_deinit_tx_rx_sta ( hdd_adapter_t *pAdapter, v_U8_t STAId )
+       }
+    }
+ 
+-   spin_unlock_bh( &pAdapter->staInfo_lock );
++   SPIN_UNLOCK_BH( &pAdapter->staInfo_lock );
+    return status;
+ }
+ 
+@@ -1008,7 +1008,7 @@ VOS_STATUS hdd_softap_DeregisterSTA( hdd_adapter_t *pAdapter, tANI_U8 staId )
+     }
+ 
+     if (pAdapter->aStaInfo[staId].isUsed) {
+-        spin_lock_bh( &pAdapter->staInfo_lock );
++        SPIN_LOCK_BH( &pAdapter->staInfo_lock );
+         vos_mem_zero(&pAdapter->aStaInfo[staId], sizeof(hdd_station_info_t));
+ 
+         /* re-init spin lock, since netdev can still open adapter until
+@@ -1019,7 +1019,7 @@ VOS_STATUS hdd_softap_DeregisterSTA( hdd_adapter_t *pAdapter, tANI_U8 staId )
+             hdd_list_init(&pAdapter->aStaInfo[staId].wmm_tx_queue[i],
+                           HDD_TX_QUEUE_MAX_LEN);
+         }
+-        spin_unlock_bh( &pAdapter->staInfo_lock );
++        SPIN_UNLOCK_BH( &pAdapter->staInfo_lock );
+    }
+     pHddCtx->sta_to_adapter[staId] = NULL;
+ 
+diff --git a/CORE/HDD/src/wlan_hdd_tx_rx.c b/CORE/HDD/src/wlan_hdd_tx_rx.c
+index 8e9464f..b874191 100644
+--- a/CORE/HDD/src/wlan_hdd_tx_rx.c
++++ b/CORE/HDD/src/wlan_hdd_tx_rx.c
+@@ -114,7 +114,7 @@ static VOS_STATUS hdd_flush_tx_queues( hdd_adapter_t *pAdapter )
+    while (++i != NUM_TX_QUEUES)
+    {
+       //Free up any packets in the Tx queue
+-      spin_lock_bh(&pAdapter->wmm_tx_queue[i].lock);
++      SPIN_LOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+       while (true)
+       {
+          status = hdd_list_remove_front( &pAdapter->wmm_tx_queue[i], &anchor );
+@@ -128,7 +128,7 @@ static VOS_STATUS hdd_flush_tx_queues( hdd_adapter_t *pAdapter )
+          }
+          break;
+       }
+-      spin_unlock_bh(&pAdapter->wmm_tx_queue[i].lock);
++      SPIN_UNLOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+       /* Back pressure is no longer in effect */
+       pAdapter->isTxSuspended[i] = VOS_FALSE;
+    }
+@@ -165,11 +165,11 @@ void hdd_flush_ibss_tx_queues( hdd_adapter_t *pAdapter, v_U8_t STAId)
+ 
+    for (i = 0; i < NUM_TX_QUEUES; i++)
+    {
+-      spin_lock_bh(&pAdapter->wmm_tx_queue[i].lock);
++      SPIN_LOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+ 
+       if ( list_empty( &pAdapter->wmm_tx_queue[i].anchor ) )
+       {
+-         spin_unlock_bh(&pAdapter->wmm_tx_queue[i].lock);
++         SPIN_UNLOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+          continue;
+       }
+ 
+@@ -204,7 +204,7 @@ void hdd_flush_ibss_tx_queues( hdd_adapter_t *pAdapter, v_U8_t STAId)
+          pAdapter->isTxSuspended[i] = VOS_FALSE;
+       }
+ 
+-      spin_unlock_bh(&pAdapter->wmm_tx_queue[i].lock);
++      SPIN_UNLOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+    }
+ }
+ 
+@@ -1723,38 +1723,38 @@ void wlan_hdd_netif_queue_control(hdd_adapter_t *adapter,
+ 		break;
+ 
+ 	case WLAN_STOP_ALL_NETIF_QUEUE:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_stop_all_queues(adapter->dev);
+ 			wlan_hdd_update_txq_timestamp(adapter->dev);
+ 			wlan_hdd_update_unpause_time(adapter);
+ 		}
+ 		adapter->pause_map |= (1 << reason);
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	case WLAN_START_ALL_NETIF_QUEUE:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		adapter->pause_map &= ~(1 << reason);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_start_all_queues(adapter->dev);
+ 			wlan_hdd_update_pause_time(adapter);
+ 		}
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	case WLAN_WAKE_ALL_NETIF_QUEUE:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		adapter->pause_map &= ~(1 << reason);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_wake_all_queues(adapter->dev);
+ 			wlan_hdd_update_pause_time(adapter);
+ 		}
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	case WLAN_STOP_ALL_NETIF_QUEUE_N_CARRIER:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_stop_all_queues(adapter->dev);
+ 			wlan_hdd_update_txq_timestamp(adapter->dev);
+@@ -1762,33 +1762,33 @@ void wlan_hdd_netif_queue_control(hdd_adapter_t *adapter,
+ 		}
+ 		adapter->pause_map |= (1 << reason);
+ 		netif_carrier_off(adapter->dev);
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	case WLAN_START_ALL_NETIF_QUEUE_N_CARRIER:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		netif_carrier_on(adapter->dev);
+ 		adapter->pause_map &= ~(1 << reason);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_start_all_queues(adapter->dev);
+ 			wlan_hdd_update_pause_time(adapter);
+ 		}
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	case WLAN_NETIF_TX_DISABLE:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_disable(adapter->dev);
+ 			wlan_hdd_update_txq_timestamp(adapter->dev);
+ 			wlan_hdd_update_unpause_time(adapter);
+ 		}
+ 		adapter->pause_map |= (1 << reason);
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	case WLAN_NETIF_TX_DISABLE_N_CARRIER:
+-		spin_lock_bh(&adapter->pause_map_lock);
++		SPIN_LOCK_BH(&adapter->pause_map_lock);
+ 		if (!adapter->pause_map) {
+ 			netif_tx_disable(adapter->dev);
+ 			wlan_hdd_update_txq_timestamp(adapter->dev);
+@@ -1796,7 +1796,7 @@ void wlan_hdd_netif_queue_control(hdd_adapter_t *adapter,
+ 		}
+ 		adapter->pause_map |= (1 << reason);
+ 		netif_carrier_off(adapter->dev);
+-		spin_unlock_bh(&adapter->pause_map_lock);
++		SPIN_UNLOCK_BH(&adapter->pause_map_lock);
+ 		break;
+ 
+ 	default:
+diff --git a/CORE/HDD/src/wlan_hdd_wext.c b/CORE/HDD/src/wlan_hdd_wext.c
+index d139555..83d3b82 100644
+--- a/CORE/HDD/src/wlan_hdd_wext.c
++++ b/CORE/HDD/src/wlan_hdd_wext.c
+@@ -8924,11 +8924,11 @@ void hdd_wmm_tx_snapshot(hdd_adapter_t *pAdapter)
+     int i = 0, j = 0;
+     for ( i=0; i< NUM_TX_QUEUES; i++)
+     {
+-        spin_lock_bh(&pAdapter->wmm_tx_queue[i].lock);
++	SPIN_LOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+         hddLog(LOGE, "HDD WMM TxQueue Info For AC: %d Count: %d PrevAdress:%pK, NextAddress:%pK",
+                i, pAdapter->wmm_tx_queue[i].count,
+                pAdapter->wmm_tx_queue[i].anchor.prev, pAdapter->wmm_tx_queue[i].anchor.next);
+-        spin_unlock_bh(&pAdapter->wmm_tx_queue[i].lock);
++        SPIN_UNLOCK_BH(&pAdapter->wmm_tx_queue[i].lock);
+     }
+ 
+     for(i =0; i<WLAN_MAX_STA_COUNT; i++)
+@@ -8938,12 +8938,12 @@ void hdd_wmm_tx_snapshot(hdd_adapter_t *pAdapter)
+              hddLog(LOGE, "******STAIndex: %d*********", i);
+              for ( j=0; j< NUM_TX_QUEUES; j++)
+              {
+-                spin_lock_bh(&pAdapter->aStaInfo[i].wmm_tx_queue[j].lock);
++                SPIN_LOCK_BH(&pAdapter->aStaInfo[i].wmm_tx_queue[j].lock);
+                 hddLog(LOGE, "HDD TxQueue Info For AC: %d Count: %d PrevAdress:%pK, NextAddress:%pK",
+                        j, pAdapter->aStaInfo[i].wmm_tx_queue[j].count,
+                        pAdapter->aStaInfo[i].wmm_tx_queue[j].anchor.prev,
+                        pAdapter->aStaInfo[i].wmm_tx_queue[j].anchor.next);
+-                spin_unlock_bh(&pAdapter->aStaInfo[i].wmm_tx_queue[j].lock);
++                SPIN_UNLOCK_BH(&pAdapter->aStaInfo[i].wmm_tx_queue[j].lock);
+              }
+         }
+     }
+diff --git a/CORE/SERVICES/COMMON/adf/adf_trace.c b/CORE/SERVICES/COMMON/adf/adf_trace.c
+index 4a7b30a..d910f1a 100644
+--- a/CORE/SERVICES/COMMON/adf/adf_trace.c
++++ b/CORE/SERVICES/COMMON/adf/adf_trace.c
+@@ -44,6 +44,8 @@
+ #include "debug_linux.h"
+ #include "adf_os_io.h"
+ #include "vos_timer.h"
++#include "osdep.h"
++
+ 
+ /* Static and Global variables */
+ static spinlock_t l_dp_trace_lock;
+@@ -114,11 +116,11 @@ void adf_dp_trace_init(void)
+ void adf_dp_trace_set_value(uint8_t proto_bitmap, uint8_t no_of_record,
+ 			 uint8_t verbosity)
+ {
+-	spin_lock_bh(&l_dp_trace_lock);
++	SPIN_LOCK_BH(&l_dp_trace_lock);
+ 	g_adf_dp_trace_data.proto_bitmap = proto_bitmap;
+ 	g_adf_dp_trace_data.no_of_record = no_of_record;
+ 	g_adf_dp_trace_data.verbosity    = verbosity;
+-	spin_unlock_bh(&l_dp_trace_lock);
++	SPIN_UNLOCK_BH(&l_dp_trace_lock);
+ }
+ 
+ /**
+@@ -173,7 +175,7 @@ void adf_dp_trace_set_track(adf_nbuf_t nbuf,  enum adf_proto_dir dir)
+ {
+ 	uint32_t count = 0;
+ 
+-	spin_lock_bh(&l_dp_trace_lock);
++	SPIN_LOCK_BH(&l_dp_trace_lock);
+ 	if (ADF_TX == dir)
+ 		count = ++g_adf_dp_trace_data.tx_count;
+ 	else if (ADF_RX == dir)
+@@ -186,7 +188,7 @@ void adf_dp_trace_set_track(adf_nbuf_t nbuf,  enum adf_proto_dir dir)
+ 		else if (ADF_RX == dir)
+ 			ADF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
+ 	}
+-	spin_unlock_bh(&l_dp_trace_lock);
++	SPIN_UNLOCK_BH(&l_dp_trace_lock);
+ }
+ 
+ #define DPTRACE_PRINT(args...) \
+@@ -415,7 +417,7 @@ void adf_dp_add_record(enum ADF_DP_TRACE_ID code,
+ 	struct adf_dp_trace_record_s *rec = NULL;
+ 	int index;
+ 
+-	spin_lock_bh(&l_dp_trace_lock);
++	SPIN_LOCK_BH(&l_dp_trace_lock);
+ 
+ 	g_adf_dp_trace_data.num++;
+ 
+@@ -456,7 +458,7 @@ void adf_dp_add_record(enum ADF_DP_TRACE_ID code,
+ 	vos_get_time_of_the_day_in_hr_min_sec_usec(rec->time,
+ 					sizeof(rec->time));
+ 	rec->pid = (in_interrupt() ? 0 : current->pid);
+-	spin_unlock_bh(&l_dp_trace_lock);
++	SPIN_UNLOCK_BH(&l_dp_trace_lock);
+ 
+ 	if ((g_adf_dp_trace_data.live_mode || print == true) &&
+ 	    (rec->code < ADF_DP_TRACE_MAX))
+@@ -874,7 +876,7 @@ void adf_dp_trace_dump_all(uint32_t count)
+ 	/* aquire the lock so that only one thread at a time can read
+ 	 * the ring buffer
+ 	 */
+-	spin_lock_bh(&l_dp_trace_lock);
++	SPIN_LOCK_BH(&l_dp_trace_lock);
+ 
+ 	if (g_adf_dp_trace_data.head != INVALID_ADF_DP_TRACE_ADDR) {
+ 		i = g_adf_dp_trace_data.head;
+@@ -891,7 +893,7 @@ void adf_dp_trace_dump_all(uint32_t count)
+ 		}
+ 
+ 		pRecord = g_adf_dp_trace_tbl[i];
+-		spin_unlock_bh(&l_dp_trace_lock);
++		SPIN_UNLOCK_BH(&l_dp_trace_lock);
+ 		for (;; ) {
+ 			adf_dp_trace_cb_table[pRecord.
+ 					   code] (&pRecord, (uint16_t)i);
+@@ -899,14 +901,14 @@ void adf_dp_trace_dump_all(uint32_t count)
+ 				break;
+ 			i += 1;
+ 
+-			spin_lock_bh(&l_dp_trace_lock);
++			SPIN_LOCK_BH(&l_dp_trace_lock);
+ 			if (MAX_ADF_DP_TRACE_RECORDS == i)
+ 				i = 0;
+ 
+ 			pRecord = g_adf_dp_trace_tbl[i];
+-			spin_unlock_bh(&l_dp_trace_lock);
++			SPIN_UNLOCK_BH(&l_dp_trace_lock);
+ 		}
+ 	} else {
+-		spin_unlock_bh(&l_dp_trace_lock);
++		SPIN_UNLOCK_BH(&l_dp_trace_lock);
+ 	}
+ }
+diff --git a/CORE/SERVICES/COMMON/osapi_linux.h b/CORE/SERVICES/COMMON/osapi_linux.h
+index cb7b3ac..92b791d 100644
+--- a/CORE/SERVICES/COMMON/osapi_linux.h
++++ b/CORE/SERVICES/COMMON/osapi_linux.h
+@@ -149,8 +149,8 @@ extern int logger_write(const enum logidx idx,
+ /* Mutual Exclusion */
+ typedef spinlock_t                      A_MUTEX_T;
+ #define A_MUTEX_INIT(mutex)             spin_lock_init(mutex)
+-#define A_MUTEX_LOCK(mutex)             spin_lock_bh(mutex)
+-#define A_MUTEX_UNLOCK(mutex)           spin_unlock_bh(mutex)
++#define A_MUTEX_LOCK(mutex)             SPIN_LOCK_BH(mutex)
++#define A_MUTEX_UNLOCK(mutex)           SPIN_UNLOCK_BH(mutex)
+ #define A_IS_MUTEX_VALID(mutex)         TRUE  /* okay to return true, since A_MUTEX_DELETE does nothing */
+ #define A_MUTEX_DELETE(mutex)           /* spin locks are not kernel resources so nothing to free.. */
+ 
+diff --git a/CORE/SERVICES/COMMON/osdep_adf.h b/CORE/SERVICES/COMMON/osdep_adf.h
+index 4e2ff99..f111cde 100644
+--- a/CORE/SERVICES/COMMON/osdep_adf.h
++++ b/CORE/SERVICES/COMMON/osdep_adf.h
+@@ -277,6 +277,7 @@ typedef rwlock_t usb_readwrite_lock_t;
+ 
+ #ifdef CONFIG_SMP
+ /* Undo the one provided by the kernel to debug spin locks */
++#if 0
+ #undef spin_lock
+ #undef spin_unlock
+ #undef spin_trylock
+@@ -297,6 +298,23 @@ spin_unlock_bh(x);\
+ } while (0)
+ 
+ #define spin_trylock(x) spin_trylock_bh(x)
++#endif
++
++#define SPIN_LOCK_BH(x) do {\
++    if (irqs_disabled() || in_irq()) {\
++        spin_lock(x);\
++    } else {\
++        spin_lock_bh(x);\
++    }\
++} while (0)
++
++#define SPIN_UNLOCK_BH(x) do {\
++    if (irqs_disabled() || in_irq()) {\
++        spin_unlock(x);\
++    } else {\
++        spin_unlock_bh(x);\
++    }\
++} while (0)
+ 
+ #define OS_SUPPORT_ASYNC_Q 1 /* support for handling asyn function calls */
+ 
+diff --git a/CORE/UTILS/FWLOG/dbglog_host.c b/CORE/UTILS/FWLOG/dbglog_host.c
+index 5ac1dee..fe247a9 100644
+--- a/CORE/UTILS/FWLOG/dbglog_host.c
++++ b/CORE/UTILS/FWLOG/dbglog_host.c
+@@ -4284,13 +4284,13 @@ static ssize_t dbglog_block_read(struct file *file,
+     if (!buf)
+        return -ENOMEM;
+ 
+-    spin_lock_bh(&fwlog->fwlog_queue.lock);
++    SPIN_LOCK_BH(&fwlog->fwlog_queue.lock);
+ 
+     if (skb_queue_len(&fwlog->fwlog_queue) == 0) {
+        /* we must init under queue lock */
+        init_completion(&fwlog->fwlog_completion);
+ 
+-       spin_unlock_bh(&fwlog->fwlog_queue.lock);
++       SPIN_UNLOCK_BH(&fwlog->fwlog_queue.lock);
+ 
+        ret = wait_for_completion_interruptible_timeout(
+                     &fwlog->fwlog_completion,
+@@ -4300,7 +4300,7 @@ static ssize_t dbglog_block_read(struct file *file,
+                return ret;
+        }
+ 
+-       spin_lock_bh(&fwlog->fwlog_queue.lock);
++       SPIN_LOCK_BH(&fwlog->fwlog_queue.lock);
+     }
+ 
+     while ((skb = __skb_dequeue(&fwlog->fwlog_queue))) {
+@@ -4316,7 +4316,7 @@ static ssize_t dbglog_block_read(struct file *file,
+        kfree_skb(skb);
+     }
+ 
+-    spin_unlock_bh(&fwlog->fwlog_queue.lock);
++    SPIN_UNLOCK_BH(&fwlog->fwlog_queue.lock);
+ 
+     /* FIXME: what to do if len == 0? */
+     not_copied = copy_to_user(user_buf, buf, len);
+diff --git a/CORE/UTILS/PKTLOG/linux_ac.c b/CORE/UTILS/PKTLOG/linux_ac.c
+index ed6db17..1dd03b7 100644
+--- a/CORE/UTILS/PKTLOG/linux_ac.c
++++ b/CORE/UTILS/PKTLOG/linux_ac.c
+@@ -136,13 +136,13 @@ int pktlog_alloc_buf(struct ol_softc *scn)
+ 
+ 	page_cnt = (sizeof(*(pl_info->buf)) + pl_info->buf_size) / PAGE_SIZE;
+ 
+-	spin_lock_bh(&pl_info->log_lock);
++	SPIN_LOCK_BH(&pl_info->log_lock);
+ 	if(pl_info->buf != NULL) {
+ 		printk("Buffer is already in use\n");
+-		spin_unlock_bh(&pl_info->log_lock);
++		SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 		return -EINVAL;
+ 	}
+-	spin_unlock_bh(&pl_info->log_lock);
++	SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 
+ 	if ((buffer = vmalloc((page_cnt + 2) * PAGE_SIZE)) == NULL) {
+ 		printk(PKTLOG_TAG
+@@ -167,12 +167,12 @@ int pktlog_alloc_buf(struct ol_softc *scn)
+ 		SetPageReserved(vpg);
+ 	}
+ 
+-	spin_lock_bh(&pl_info->log_lock);
++	SPIN_LOCK_BH(&pl_info->log_lock);
+ 	if(pl_info->buf != NULL)
+ 		pktlog_release_buf(scn);
+ 
+ 	pl_info->buf =  buffer;
+-	spin_unlock_bh(&pl_info->log_lock);
++	SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 	return 0;
+ }
+ 
+@@ -574,10 +574,10 @@ static void pktlog_detach(struct ol_softc *scn)
+ 	remove_proc_entry(WLANDEV_BASENAME, g_pktlog_pde);
+ 	pktlog_sysctl_unregister(pl_dev);
+ 
+-	spin_lock_bh(&pl_info->log_lock);
++	SPIN_LOCK_BH(&pl_info->log_lock);
+ 	if (pl_info->buf)
+ 		pktlog_release_buf(scn);
+-	spin_unlock_bh(&pl_info->log_lock);
++	SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 	pktlog_cleanup(pl_info);
+ 
+ 	if (pl_dev) {
+@@ -630,14 +630,14 @@ pktlog_read_proc_entry(char *buf, size_t nbytes, loff_t *ppos,
+ 	int fold_offset, ppos_data, cur_rd_offset, cur_wr_offset;
+ 	struct ath_pktlog_buf *log_buf;
+ 
+-	spin_lock_bh(&pl_info->log_lock);
++	SPIN_LOCK_BH(&pl_info->log_lock);
+ 	log_buf = pl_info->buf;
+ 
+ 	*read_complete = false;
+ 
+ 	if (log_buf == NULL) {
+ 		*read_complete = true;
+-		spin_unlock_bh(&pl_info->log_lock);
++		SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 		return 0;
+ 	}
+ 
+@@ -754,7 +754,7 @@ rd_done:
+ 			*read_complete = true;
+ 		}
+ 	}
+-	spin_unlock_bh(&pl_info->log_lock);
++	SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 	return ret_val;
+ }
+ 
+@@ -776,11 +776,11 @@ __pktlog_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
+ #endif
+ 	struct ath_pktlog_buf *log_buf;
+ 
+-	spin_lock_bh(&pl_info->log_lock);
++	SPIN_LOCK_BH(&pl_info->log_lock);
+ 	log_buf = pl_info->buf;
+ 
+ 	if (log_buf == NULL) {
+-		spin_unlock_bh(&pl_info->log_lock);
++		SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 		return 0;
+ 	}
+ 
+@@ -797,13 +797,13 @@ __pktlog_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
+ 
+ 	if (*ppos < bufhdr_size) {
+ 		count = MIN((bufhdr_size - *ppos), rem_len);
+-		spin_unlock_bh(&pl_info->log_lock);
++		SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 		if (copy_to_user(buf, ((char *)&log_buf->bufhdr) + *ppos,
+ 				 count))
+ 			return -EFAULT;
+ 		rem_len -= count;
+ 		ret_val += count;
+-		spin_lock_bh(&pl_info->log_lock);
++		SPIN_LOCK_BH(&pl_info->log_lock);
+ 	}
+ 
+ 	start_offset = log_buf->rd_offset;
+@@ -845,25 +845,25 @@ __pktlog_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
+ 			goto rd_done;
+ 
+ 		count = MIN(rem_len, (end_offset - ppos_data + 1));
+-		spin_unlock_bh(&pl_info->log_lock);
++		SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 		if (copy_to_user(buf + ret_val,
+ 				 log_buf->log_data + ppos_data,
+ 				 count))
+ 			return -EFAULT;
+ 		ret_val += count;
+ 		rem_len -= count;
+-		spin_lock_bh(&pl_info->log_lock);
++		SPIN_LOCK_BH(&pl_info->log_lock);
+ 	} else {
+ 		if (ppos_data <= fold_offset) {
+ 			count = MIN(rem_len, (fold_offset - ppos_data + 1));
+-			spin_unlock_bh(&pl_info->log_lock);
++			SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 			if (copy_to_user(buf + ret_val,
+ 					 log_buf->log_data + ppos_data,
+ 					 count))
+ 				return -EFAULT;
+ 			ret_val += count;
+ 			rem_len -= count;
+-			spin_lock_bh(&pl_info->log_lock);
++			SPIN_LOCK_BH(&pl_info->log_lock);
+ 		}
+ 
+ 		if (rem_len == 0)
+@@ -875,14 +875,14 @@ __pktlog_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
+ 
+ 		if (ppos_data <= end_offset) {
+ 			count = MIN(rem_len, (end_offset - ppos_data + 1));
+-			spin_unlock_bh(&pl_info->log_lock);
++			SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 			if (copy_to_user(buf + ret_val,
+ 					 log_buf->log_data + ppos_data,
+ 					 count))
+ 				return -EFAULT;
+ 			ret_val += count;
+ 			rem_len -= count;
+-			spin_lock_bh(&pl_info->log_lock);
++			SPIN_LOCK_BH(&pl_info->log_lock);
+ 		}
+ 	}
+ 
+@@ -893,7 +893,7 @@ rd_done:
+ 	}
+ 	*ppos += ret_val;
+ 
+-	spin_unlock_bh(&pl_info->log_lock);
++	SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 	return ret_val;
+ }
+ 
+diff --git a/CORE/UTILS/PKTLOG/pktlog_ac.c b/CORE/UTILS/PKTLOG/pktlog_ac.c
+index 679a78c..63fab8e 100644
+--- a/CORE/UTILS/PKTLOG/pktlog_ac.c
++++ b/CORE/UTILS/PKTLOG/pktlog_ac.c
+@@ -351,7 +351,7 @@ __pktlog_enable(struct ol_softc *scn, int32_t log_state)
+ 			}
+ 		}
+ 
+-		spin_lock_bh(&pl_info->log_lock);
++		SPIN_LOCK_BH(&pl_info->log_lock);
+ 		pl_info->buf->bufhdr.version = CUR_PKTLOG_VER;
+ 		pl_info->buf->bufhdr.magic_num = PKTLOG_MAGIC_NUM;
+ 		pl_info->buf->wr_offset = 0;
+@@ -360,7 +360,7 @@ __pktlog_enable(struct ol_softc *scn, int32_t log_state)
+ 		pl_info->buf->bytes_written = 0;
+ 		pl_info->buf->msg_index = 1;
+ 		pl_info->buf->offset = PKTLOG_READ_OFFSET;
+-		spin_unlock_bh(&pl_info->log_lock);
++		SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 
+ 		pl_info->start_time_thruput = OS_GET_TIMESTAMP();
+ 		pl_info->start_time_per = pl_info->start_time_thruput;
+@@ -449,13 +449,13 @@ __pktlog_setsize(struct ol_softc *scn, int32_t size)
+ 		return -EINVAL;
+ 	}
+ 
+-	spin_lock_bh(&pl_info->log_lock);
++	SPIN_LOCK_BH(&pl_info->log_lock);
+ 	if (pl_info->buf != NULL)
+ 		pktlog_release_buf(scn);
+ 
+ 	if (size != 0)
+ 		pl_info->buf_size = size;
+-	spin_unlock_bh(&pl_info->log_lock);
++	SPIN_UNLOCK_BH(&pl_info->log_lock);
+ 
+ 	return 0;
+ }
+diff --git a/CORE/VOSS/src/vos_packet.c b/CORE/VOSS/src/vos_packet.c
+index db8e10d..e6ed59c 100644
+--- a/CORE/VOSS/src/vos_packet.c
++++ b/CORE/VOSS/src/vos_packet.c
+@@ -342,11 +342,11 @@ void vos_pkt_trace_buf_update
+       return;
+    }
+ 
+-   spin_lock_bh(&trace_buffer_lock);
++   SPIN_LOCK_BH(&trace_buffer_lock);
+    slot = trace_buffer_order % VOS_PKT_TRAC_MAX_TRACE_BUF;
+    trace_buffer[slot].order = trace_buffer_order;
+    trace_buffer_order++;
+-   spin_unlock_bh(&trace_buffer_lock);
++   SPIN_UNLOCK_BH(&trace_buffer_lock);
+    do_gettimeofday(&tv);
+    trace_buffer[slot].event_sec_time = tv.tv_sec;
+    trace_buffer[slot].event_msec_time = tv.tv_usec;
+@@ -462,10 +462,10 @@ void vos_pkt_proto_trace_close
+ {
+    VOS_TRACE(VOS_MODULE_ID_VOSS, VOS_TRACE_LEVEL_ERROR,
+              "%s %d", __func__, __LINE__);
+-   spin_lock_bh(&trace_buffer_lock);
++   SPIN_LOCK_BH(&trace_buffer_lock);
+    vos_mem_free(trace_buffer);
+    trace_buffer = NULL;
+-   spin_unlock_bh(&trace_buffer_lock);
++   SPIN_UNLOCK_BH(&trace_buffer_lock);
+ 
+    return;
+ }
+diff --git a/CORE/VOSS/src/vos_sched.c b/CORE/VOSS/src/vos_sched.c
+index cb5787e..ce09796 100644
+--- a/CORE/VOSS/src/vos_sched.c
++++ b/CORE/VOSS/src/vos_sched.c
+@@ -551,14 +551,14 @@ vos_sched_open
+   spin_lock_init(&pSchedContext->TlshimRxQLock);
+   spin_lock_init(&pSchedContext->VosTlshimPktFreeQLock);
+   INIT_LIST_HEAD(&pSchedContext->tlshimRxQueue);
+-  spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++  SPIN_LOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+   INIT_LIST_HEAD(&pSchedContext->VosTlshimPktFreeQ);
+   if (vos_alloc_tlshim_pkt_freeq(pSchedContext) !=  VOS_STATUS_SUCCESS)
+   {
+-       spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++       SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+        return VOS_STATUS_E_FAILURE;
+   }
+-  spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++  SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+   register_hotcpu_notifier(&vos_cpu_hotplug_notifier);
+   pSchedContext->cpuHotPlugNotifier = &vos_cpu_hotplug_notifier;
+   vos_lock_init(&pSchedContext->affinity_lock);
+@@ -1289,16 +1289,16 @@ void vos_free_tlshim_pkt_freeq(pVosSchedContext pSchedContext)
+ {
+    struct VosTlshimPkt *pkt;
+ 
+-   spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   SPIN_LOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+    while (!list_empty(&pSchedContext->VosTlshimPktFreeQ)) {
+        pkt = list_entry((&pSchedContext->VosTlshimPktFreeQ)->next,
+                      typeof(*pkt), list);
+        list_del(&pkt->list);
+-       spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++       SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+        vos_mem_free(pkt);
+-       spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++       SPIN_LOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+    }
+-   spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+ 
+ }
+ 
+@@ -1353,9 +1353,9 @@ void vos_free_tlshim_pkt(pVosSchedContext pSchedContext,
+                          struct VosTlshimPkt *pkt)
+ {
+    memset(pkt, 0, sizeof(*pkt));
+-   spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   SPIN_LOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+    list_add_tail(&pkt->list, &pSchedContext->VosTlshimPktFreeQ);
+-   spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+ }
+ 
+ /*---------------------------------------------------------------------------
+@@ -1371,15 +1371,15 @@ struct VosTlshimPkt *vos_alloc_tlshim_pkt(pVosSchedContext pSchedContext)
+ {
+    struct VosTlshimPkt *pkt;
+ 
+-   spin_lock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   SPIN_LOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+    if (list_empty(&pSchedContext->VosTlshimPktFreeQ)) {
+-       spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++       SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+        return NULL;
+    }
+    pkt = list_first_entry(&pSchedContext->VosTlshimPktFreeQ,
+                           struct VosTlshimPkt, list);
+    list_del(&pkt->list);
+-   spin_unlock_bh(&pSchedContext->VosTlshimPktFreeQLock);
++   SPIN_UNLOCK_BH(&pSchedContext->VosTlshimPktFreeQLock);
+    return pkt;
+ }
+ 
+@@ -1396,9 +1396,9 @@ struct VosTlshimPkt *vos_alloc_tlshim_pkt(pVosSchedContext pSchedContext)
+ void vos_indicate_rxpkt(pVosSchedContext pSchedContext,
+                         struct VosTlshimPkt *pkt)
+ {
+-   spin_lock_bh(&pSchedContext->TlshimRxQLock);
++   SPIN_LOCK_BH(&pSchedContext->TlshimRxQLock);
+    list_add_tail(&pkt->list, &pSchedContext->tlshimRxQueue);
+-   spin_unlock_bh(&pSchedContext->TlshimRxQLock);
++   SPIN_UNLOCK_BH(&pSchedContext->TlshimRxQLock);
+    set_bit(RX_POST_EVENT, &pSchedContext->tlshimRxEvtFlg);
+    wake_up_interruptible(&pSchedContext->tlshimRxWaitQueue);
+ }
+@@ -1420,16 +1420,16 @@ void vos_drop_rxpkt_by_staid(pVosSchedContext pSchedContext, u_int16_t staId)
+    adf_nbuf_t buf, next_buf;
+ 
+    INIT_LIST_HEAD(&local_list);
+-   spin_lock_bh(&pSchedContext->TlshimRxQLock);
++   SPIN_LOCK_BH(&pSchedContext->TlshimRxQLock);
+    if (list_empty(&pSchedContext->tlshimRxQueue)) {
+-       spin_unlock_bh(&pSchedContext->TlshimRxQLock);
++       SPIN_UNLOCK_BH(&pSchedContext->TlshimRxQLock);
+        return;
+    }
+    list_for_each_entry_safe(pkt, tmp, &pSchedContext->tlshimRxQueue, list) {
+        if (pkt->staId == staId || staId == WLAN_MAX_STA_COUNT)
+            list_move_tail(&pkt->list, &local_list);
+    }
+-   spin_unlock_bh(&pSchedContext->TlshimRxQLock);
++   SPIN_UNLOCK_BH(&pSchedContext->TlshimRxQLock);
+ 
+    list_for_each_entry_safe(pkt, tmp, &local_list, list) {
+        list_del(&pkt->list);
+@@ -1457,18 +1457,18 @@ static void vos_rx_from_queue(pVosSchedContext pSchedContext)
+    struct VosTlshimPkt *pkt;
+    u_int16_t sta_id;
+ 
+-   spin_lock_bh(&pSchedContext->TlshimRxQLock);
++   SPIN_LOCK_BH(&pSchedContext->TlshimRxQLock);
+    while (!list_empty(&pSchedContext->tlshimRxQueue)) {
+            pkt = list_first_entry(&pSchedContext->tlshimRxQueue,
+                                   struct VosTlshimPkt, list);
+            list_del(&pkt->list);
+-           spin_unlock_bh(&pSchedContext->TlshimRxQLock);
++           SPIN_UNLOCK_BH(&pSchedContext->TlshimRxQLock);
+            sta_id = pkt->staId;
+            pkt->callback(pkt->context, pkt->Rxpkt, sta_id);
+            vos_free_tlshim_pkt(pSchedContext, pkt);
+-           spin_lock_bh(&pSchedContext->TlshimRxQLock);
++           SPIN_LOCK_BH(&pSchedContext->TlshimRxQLock);
+    }
+-   spin_unlock_bh(&pSchedContext->TlshimRxQLock);
++   SPIN_UNLOCK_BH(&pSchedContext->TlshimRxQLock);
+ }
+ 
+ /*---------------------------------------------------------------------------
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0014-CLD-CORE-add-CONFIG_HDD_WLAN_WAIT_TIME-support-for-u.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0014-CLD-CORE-add-CONFIG_HDD_WLAN_WAIT_TIME-support-for-u.patch
new file mode 100644
index 0000000..0eaf198
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0014-CLD-CORE-add-CONFIG_HDD_WLAN_WAIT_TIME-support-for-u.patch
@@ -0,0 +1,51 @@
+From 67edc9c191c31fc3dc911c6c8b81d584524d91e6 Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Tue, 22 May 2018 16:13:54 +0800
+Subject: [PATCH] CLD: CORE: add CONFIG_HDD_WLAN_WAIT_TIME support for user
+
+User can point the CONFIG_HDD_WLAN_WAIT_TIME for driver firmware loading
+timeout.
+
+In general, it can be set to 10s like:
+	export CONFIG_HDD_WLAN_WAIT_TIME=10000
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_main.c | 4 ++++
+ Kbuild                       | 4 ++++
+ 2 files changed, 8 insertions(+)
+
+diff --git a/CORE/HDD/src/wlan_hdd_main.c b/CORE/HDD/src/wlan_hdd_main.c
+index 636ba5f..00dca1a 100755
+--- a/CORE/HDD/src/wlan_hdd_main.c
++++ b/CORE/HDD/src/wlan_hdd_main.c
+@@ -17645,7 +17645,11 @@ int hdd_hif_register_driver(void)
+ 		return ret;
+ 	}
+ 
++#ifdef HDD_WLAN_WAIT_TIME
++	timeout = msecs_to_jiffies(HDD_WLAN_WAIT_TIME);
++#else
+ 	timeout = msecs_to_jiffies(HDD_WLAN_START_WAIT_TIME);
++#endif
+ 
+ 	rc = wait_for_completion_timeout(&wlan_comp.wlan_start_comp, timeout);
+ 
+diff --git a/Kbuild b/Kbuild
+index 3c4bd8d..e26a7c9 100644
+--- a/Kbuild
++++ b/Kbuild
+@@ -1062,6 +1062,10 @@ ifeq ($(CONFIG_WLAN_POWER_DEBUGFS), y)
+ CDEFINES += -DWLAN_POWER_DEBUGFS
+ endif
+ 
++ifneq ($(CONFIG_HDD_WLAN_WAIT_TIME),)
++CDEFINES += -DHDD_WLAN_WAIT_TIME=$(CONFIG_HDD_WLAN_WAIT_TIME)
++endif
++
+ ifeq ($(CONFIG_FEATURE_COEX_PTA_CONFIG_ENABLE), y)
+ CDEFINES += -DFEATURE_COEX_PTA_CONFIG_ENABLE
+ endif
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0015-CORE-HIF-enable-pcie-MSI-feature.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0015-CORE-HIF-enable-pcie-MSI-feature.patch
new file mode 100644
index 0000000..cb13bbc
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0015-CORE-HIF-enable-pcie-MSI-feature.patch
@@ -0,0 +1,96 @@
+From 1c3170fe6acfd3ab411199bcf2235964a9036c2c Mon Sep 17 00:00:00 2001
+From: Hangtian Zhu <hangtian@qti.qualcomm.com>
+Date: Tue, 29 May 2018 18:09:49 +0800
+Subject: [PATCH] CORE: HIF: enable pcie MSI feature
+
+Add PCIe MSI interrupt support.
+Currently, it only support 1 MSI interrupt.
+
+Hangtian Zhu <hangtian@qti.qualcomm.com>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/SERVICES/HIF/PCIe/cepci.h  |  2 +-
+ CORE/SERVICES/HIF/PCIe/if_pci.c | 19 +++++++++++++++++--
+ Kbuild                          |  2 +-
+ 3 files changed, 19 insertions(+), 4 deletions(-)
+
+diff --git a/CORE/SERVICES/HIF/PCIe/cepci.h b/CORE/SERVICES/HIF/PCIe/cepci.h
+index f5ba19b..95db903 100644
+--- a/CORE/SERVICES/HIF/PCIe/cepci.h
++++ b/CORE/SERVICES/HIF/PCIe/cepci.h
+@@ -41,7 +41,7 @@
+  * so for now we abide by this limit and avoid requesting more
+  * than that.
+  */
+-#define MSI_NUM_REQUEST_LOG2  3
++#define MSI_NUM_REQUEST_LOG2  0
+ #define MSI_NUM_REQUEST       (1<<MSI_NUM_REQUEST_LOG2)
+ 
+ /*
+diff --git a/CORE/SERVICES/HIF/PCIe/if_pci.c b/CORE/SERVICES/HIF/PCIe/if_pci.c
+index 374a9b0..840724d 100644
+--- a/CORE/SERVICES/HIF/PCIe/if_pci.c
++++ b/CORE/SERVICES/HIF/PCIe/if_pci.c
+@@ -81,7 +81,7 @@
+ #define RAMDUMP_EVENT_TIMEOUT 2500
+ #define MAX_REG_READ_RETRIES 10
+ 
+-unsigned int msienable = 0;
++unsigned int msienable = 1;
+ module_param(msienable, int, S_IRUSR | S_IRGRP | S_IROTH);
+ 
+ int hif_pci_configure(struct hif_pci_softc *sc, hif_handle_t *hif_hdl);
+@@ -788,6 +788,7 @@ wlan_tasklet(unsigned long data)
+     struct HIF_CE_state *hif_state = (struct HIF_CE_state *)sc->hif_device;
+     volatile int tmp;
+     bool hif_init_done = sc->hif_init_done;
++    A_target_id_t targid = hif_state->targid;
+ 
+     if (hif_init_done == FALSE) {
+          goto irq_handled;
+@@ -809,7 +810,7 @@ wlan_tasklet(unsigned long data)
+          goto irq_handled;
+ 
+     CE_per_engine_service_any(sc->irq_event, sc);
+-    adf_os_atomic_set(&sc->tasklet_from_intr, 0);
++    adf_os_atomic_set(&sc->tasklet_from_intr, 1);
+     if (CE_get_rx_pending(sc)) {
+         if (vos_is_load_unload_in_progress(VOS_MODULE_ID_HIF, NULL)) {
+             pr_err("%s: Load/Unload in Progress\n", __func__);
+@@ -835,6 +836,20 @@ end:
+         adf_os_atomic_set(&sc->ce_suspend, 1);
+         return;
+     }
++
++    if(!LEGACY_INTERRUPTS(sc) && CE_INTERRUPT_SUMMARY(targid)) {
++	if (vos_is_load_unload_in_progress(VOS_MODULE_ID_HIF, NULL))
++		goto msiend;
++
++	if (vos_is_logp_in_progress(VOS_MODULE_ID_HIF, NULL))
++		goto msiend;
++
++	tasklet_schedule(&sc->intr_tq);
++msiend:
++	adf_os_atomic_set(&sc->ce_suspend, 1);
++	return;
++    }
++
+ irq_handled:
+     /* use cached value for hif_init_done to prevent
+      * unlocking an unlocked spinlock if hif init finishes
+diff --git a/Kbuild b/Kbuild
+index e26a7c9..77feef4 100644
+--- a/Kbuild
++++ b/Kbuild
+@@ -1690,7 +1690,7 @@ CDEFINES += -DFEATURE_DPTRACE_ENABLE
+ endif
+ 
+ ifeq ($(CONFIG_HIF_PCI), 1)
+-CDEFINES += -DFORCE_LEGACY_PCI_INTERRUPTS
++#CDEFINES += -DFORCE_LEGACY_PCI_INTERRUPTS
+ endif
+ 
+ ifeq ($(CONFIG_WLAN_THERMAL_SHUTDOWN), 1)
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0016-MLK-18490-CORE-HDD-add-ssid-len-check.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0016-MLK-18490-CORE-HDD-add-ssid-len-check.patch
new file mode 100644
index 0000000..2139cf5
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0016-MLK-18490-CORE-HDD-add-ssid-len-check.patch
@@ -0,0 +1,75 @@
+From 5294a5788854d05ebea6e4f0d103d42fac220f00 Mon Sep 17 00:00:00 2001
+From: Hangtian Zhu <hangtian@qti.qualcomm.com>
+Date: Thu, 7 Jun 2018 13:12:43 +0800
+Subject: [PATCH] MLK-18490 CORE: HDD: add ssid len check
+
+Add ssid len check to avoid the race between iface up and down.
+
+log:
+[ 1579.835577] CPU: 1 PID: 8058 Comm: kworker/u8:0 Tainted:
+[ 1579.846096] Hardware name: FSL i.MX8MM EVK board (DT)
+[ 1579.851154] Workqueue: cfg80211 cfg80211_event_work
+[ 1579.856649] task: ffff800077df0c80 task.stack: ffff80006e668000
+[ 1579.862739] PC is at __cfg80211_connect_result+0x2d0/0x400
+[ 1579.868224] LR is at __cfg80211_connect_result+0x13c/0x400
+[ 1579.873709] pc : [<ffff000008c1f428>] lr : [<ffff000008c1f294>] pstate: 40000145
+
+Signed-off-by: Hangtian Zhu <hangtian@qti.qualcomm.com>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/HDD/src/wlan_hdd_assoc.c | 25 ++++++++++++++-----------
+ 1 file changed, 14 insertions(+), 11 deletions(-)
+
+diff --git a/CORE/HDD/src/wlan_hdd_assoc.c b/CORE/HDD/src/wlan_hdd_assoc.c
+index 889ea95..9818d79 100644
+--- a/CORE/HDD/src/wlan_hdd_assoc.c
++++ b/CORE/HDD/src/wlan_hdd_assoc.c
+@@ -2309,6 +2309,7 @@ static eHalStatus hdd_AssociationCompletionHandler( hdd_adapter_t *pAdapter, tCs
+     hdd_ap_ctx_t *hdd_ap_ctx;
+     uint8_t default_sap_channel = 6;
+     tSirResultCodes timeout_reason = 0;
++    struct wireless_dev *wdev = dev->ieee80211_ptr;
+ #ifdef WLAN_FEATURE_ROAM_OFFLOAD
+     if (pRoamInfo && pRoamInfo->roamSynchInProgress) {
+        /* change logging before release */
+@@ -2604,12 +2605,13 @@ static eHalStatus hdd_AssociationCompletionHandler( hdd_adapter_t *pAdapter, tCs
+                     hddLog(LOG1, "%s ft_carrier_on is %d, sending connect "
+                                  "indication", __FUNCTION__, ft_carrier_on);
+ 
+-                    hdd_connect_result(dev, pRoamInfo->bssid, pRoamInfo,
+-                                       pFTAssocReq, assocReqlen,
+-                                       pFTAssocRsp, assocRsplen,
+-                                       WLAN_STATUS_SUCCESS,
+-                                       GFP_KERNEL, false,
+-                                       pRoamInfo->statusCode);
++		    if(wdev->ssid_len != 0)
++			    hdd_connect_result(dev, pRoamInfo->bssid, pRoamInfo,
++					       pFTAssocReq, assocReqlen,
++					       pFTAssocRsp, assocRsplen,
++					       WLAN_STATUS_SUCCESS,
++					       GFP_KERNEL, false,
++					       pRoamInfo->statusCode);
+                 }
+             }
+             else
+@@ -2640,11 +2642,12 @@ static eHalStatus hdd_AssociationCompletionHandler( hdd_adapter_t *pAdapter, tCs
+                                roamResult, roamStatus);
+ 
+                         /* inform connect result to nl80211 */
+-                        hdd_connect_result(dev, pRoamInfo->bssid, pRoamInfo,
+-                                reqRsnIe, reqRsnLength,
+-                                rspRsnIe, rspRsnLength,
+-                                WLAN_STATUS_SUCCESS,
+-                                GFP_KERNEL, false, pRoamInfo->statusCode);
++			if(wdev->ssid_len != 0)
++				hdd_connect_result(dev, pRoamInfo->bssid, pRoamInfo,
++					reqRsnIe, reqRsnLength,
++					rspRsnIe, rspRsnLength,
++					WLAN_STATUS_SUCCESS,
++					GFP_KERNEL, false, pRoamInfo->statusCode);
+                     }
+                 }
+             }
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0017-MLK-18491-qcacld-2.0-avoid-overflow-of-bounce-buffer.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0017-MLK-18491-qcacld-2.0-avoid-overflow-of-bounce-buffer.patch
new file mode 100644
index 0000000..ab04221
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0017-MLK-18491-qcacld-2.0-avoid-overflow-of-bounce-buffer.patch
@@ -0,0 +1,29 @@
+From a41baa51cbc517243d55ff24ec7aedc625ab376c Mon Sep 17 00:00:00 2001
+From: Andy Duan <fugang.duan@nxp.com>
+Date: Fri, 8 Jun 2018 13:12:20 +0800
+Subject: [PATCH] MLK-18491 qcacld-2.0: avoid overflow of bounce buffer
+
+Disable pEndpoint->TxCreditFlowEnabled to avoid overflow of bounce buffer.
+
+Signed-off-by: Hangtian Zhu <hangtian@qti.qualcomm.com>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ CORE/SERVICES/HTC/htc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/CORE/SERVICES/HTC/htc.c b/CORE/SERVICES/HTC/htc.c
+index 09936a0..1e2450d 100644
+--- a/CORE/SERVICES/HTC/htc.c
++++ b/CORE/SERVICES/HTC/htc.c
+@@ -657,7 +657,7 @@ static void ResetEndpointStates(HTC_TARGET *target)
+         INIT_HTC_PACKET_QUEUE(&pEndpoint->RxBufferHoldQueue);
+         pEndpoint->target = target;
+         //pEndpoint->TxCreditFlowEnabled = (A_BOOL)htc_credit_flow;
+-        pEndpoint->TxCreditFlowEnabled = (A_BOOL)1;
++        pEndpoint->TxCreditFlowEnabled = (A_BOOL)0;
+         adf_os_atomic_init(&pEndpoint->TxProcessCount);
+     }
+ }
+-- 
+1.9.1
+
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0018-MLK-18491-02-qcacld-2.0-fix-the-overflow-of-bounce-b.patch b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0018-MLK-18491-02-qcacld-2.0-fix-the-overflow-of-bounce-b.patch
new file mode 100644
index 0000000..ebd82a2
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea/0018-MLK-18491-02-qcacld-2.0-fix-the-overflow-of-bounce-b.patch
@@ -0,0 +1,90 @@
+From e480b6825d3670f3517c3b7be0c13fd318cbe985 Mon Sep 17 00:00:00 2001
+From: Hangtian Zhu <hangtian@qti.qualcomm.com>
+Date: Thu, 14 Jun 2018 11:10:05 +0800
+Subject: [PATCH] MLK-18491-02 qcacld-2.0: fix the overflow of bounce buffer
+
+Patch a41baa51cbc5("MLK-18491 qcacld-2.0: avoid overflow of bounce buffer")
+is not reasonable to fix overflow of bounce buffer issue.
+
+The patch is released by Qualcomm to fix the issue.
+(Case Number:03515221)
+
+Signed-off-by: Hangtian Zhu <hangtian@qti.qualcomm.com>
+---
+ CORE/SERVICES/HTC/htc.c      |  2 +-
+ CORE/SERVICES/HTC/htc_send.c | 28 ++++++++++++++--------------
+ 2 files changed, 15 insertions(+), 15 deletions(-)
+
+diff --git a/CORE/SERVICES/HTC/htc.c b/CORE/SERVICES/HTC/htc.c
+index 1e2450d..09936a0 100644
+--- a/CORE/SERVICES/HTC/htc.c
++++ b/CORE/SERVICES/HTC/htc.c
+@@ -657,7 +657,7 @@ static void ResetEndpointStates(HTC_TARGET *target)
+         INIT_HTC_PACKET_QUEUE(&pEndpoint->RxBufferHoldQueue);
+         pEndpoint->target = target;
+         //pEndpoint->TxCreditFlowEnabled = (A_BOOL)htc_credit_flow;
+-        pEndpoint->TxCreditFlowEnabled = (A_BOOL)0;
++        pEndpoint->TxCreditFlowEnabled = (A_BOOL)1;
+         adf_os_atomic_init(&pEndpoint->TxProcessCount);
+     }
+ }
+diff --git a/CORE/SERVICES/HTC/htc_send.c b/CORE/SERVICES/HTC/htc_send.c
+index 1a3dd28..19d8065 100644
+--- a/CORE/SERVICES/HTC/htc_send.c
++++ b/CORE/SERVICES/HTC/htc_send.c
+@@ -105,12 +105,12 @@ void HTCGetControlEndpointTxHostCredits(HTC_HANDLE HTCHandle, int *credits)
+ 
+ static INLINE void RestoreTxPacket(HTC_TARGET *target, HTC_PACKET *pPacket)
+ {
++    adf_nbuf_t netbuf = GET_HTC_PACKET_NET_BUF_CONTEXT(pPacket);
+     if (pPacket->PktInfo.AsTx.Flags & HTC_TX_PACKET_FLAG_FIXUP_NETBUF) {
+-        adf_nbuf_t netbuf = GET_HTC_PACKET_NET_BUF_CONTEXT(pPacket);
+         adf_nbuf_unmap(target->osdev, netbuf, ADF_OS_DMA_TO_DEVICE);
+-        adf_nbuf_pull_head(netbuf, sizeof(HTC_FRAME_HDR));
+         pPacket->PktInfo.AsTx.Flags &= ~HTC_TX_PACKET_FLAG_FIXUP_NETBUF;
+     }
++    adf_nbuf_pull_head(netbuf, sizeof(HTC_FRAME_HDR));
+ 
+ }
+ 
+@@ -641,12 +641,11 @@ static A_STATUS HTCIssuePackets(HTC_TARGET       *target,
+              * that is already mapped, or a non-data netbuf that needs to be
+              * mapped.
+              */
+-            if (pPacket->PktInfo.AsTx.Flags & HTC_TX_PACKET_FLAG_FIXUP_NETBUF) {
+-                adf_nbuf_map(
+-                        target->osdev,
+-                        GET_HTC_PACKET_NET_BUF_CONTEXT(pPacket),
+-                        ADF_OS_DMA_TO_DEVICE);
+-            }
++            pPacket->PktInfo.AsTx.Flags |= HTC_TX_PACKET_FLAG_FIXUP_NETBUF;
++            adf_nbuf_map(
++                    target->osdev,
++                    GET_HTC_PACKET_NET_BUF_CONTEXT(pPacket),
++                    ADF_OS_DMA_TO_DEVICE);
+         }
+         LOCK_HTC_TX(target);
+             /* store in look up queue to match completions */
+@@ -1261,12 +1260,13 @@ A_STATUS HTCSendPktsMultiple(HTC_HANDLE HTCHandle, HTC_PACKET_QUEUE *pPktQueue)
+              * mapped.  This only applies to non-data frames, since data frames
+              * were already mapped as they entered into the driver.
+              */
+-            adf_nbuf_map(
+-                    target->osdev,
+-                    GET_HTC_PACKET_NET_BUF_CONTEXT(pPacket),
+-                    ADF_OS_DMA_TO_DEVICE);
+-
+-	pPacket->PktInfo.AsTx.Flags |= HTC_TX_PACKET_FLAG_FIXUP_NETBUF;
++            if(!IS_TX_CREDIT_FLOW_ENABLED(pEndpoint)) {
++	        pPacket->PktInfo.AsTx.Flags |= HTC_TX_PACKET_FLAG_FIXUP_NETBUF;
++                adf_nbuf_map(
++                        target->osdev,
++                        GET_HTC_PACKET_NET_BUF_CONTEXT(pPacket),
++                        ADF_OS_DMA_TO_DEVICE);
++	    }
+     } HTC_PACKET_QUEUE_ITERATE_END;
+ 
+     HTCTrySend(target,pEndpoint,pPktQueue);
+-- 
+1.9.1
+
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 45/52] kernel-module-qca6174: Add support for QCA6174 on i.MX 8 Series
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (13 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 44/52] kernel-module-qca9377: Add support for QCA9377 on i.MX 7ULP Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 46/52] formfactor: Add machconfig for 6ULL and 7ULP Tom Hochstein
                   ` (6 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-kernel/kernel-modules/kernel-module-qca6174_2.0.bb | 5 +++++
 recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc | 9 ++++++++-
 2 files changed, 13 insertions(+), 1 deletion(-)
 create mode 100644 recipes-kernel/kernel-modules/kernel-module-qca6174_2.0.bb

diff --git a/recipes-kernel/kernel-modules/kernel-module-qca6174_2.0.bb b/recipes-kernel/kernel-modules/kernel-module-qca6174_2.0.bb
new file mode 100644
index 0000000..8f94938
--- /dev/null
+++ b/recipes-kernel/kernel-modules/kernel-module-qca6174_2.0.bb
@@ -0,0 +1,5 @@
+require kernel-module-qcacld-lea.inc
+
+SUMMARY = "Qualcomm WiFi driver for QCA module 6174"
+
+EXTRA_OEMAKE += "${EXTRA_OEMAKE_QCA6174}"
diff --git a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc
index 1284f24..2b439f8 100644
--- a/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc
+++ b/recipes-kernel/kernel-modules/kernel-module-qcacld-lea.inc
@@ -1,6 +1,6 @@
 # Copyright 2018 NXP
 
-SUMMARY = "Qualcomm WiFi driver for QCA module 9377"
+SUMMARY = "Qualcomm WiFi driver for QCA module 9377 and 6174"
 LICENSE = "BSD & GPLv2"
 LIC_FILES_CHKSUM = "file://CORE/HDD/src/wlan_hdd_main.c;beginline=1;endline=20;md5=ec8d62116b13db773825ebf7cf91be1d;"
 
@@ -43,6 +43,13 @@ EXTRA_OEMAKE_QCA9377 += " \
     MODNAME=qca9377 \
     SAP_AUTH_OFFLOAD=1 \
 "
+EXTRA_OEMAKE_QCA6174 = " \
+    CONFIG_ROME_IF=pci \
+    CONFIG_WLAN_FEATURE_11W=y \
+    CONFIG_WLAN_FEATURE_FILS=y \
+    CONFIG_WLAN_WAPI_MODE_11AC_DISABLE=y \
+    MODNAME=qca6174 \
+"
 EXTRA_OEMAKE += " \
     CONFIG_CFG80211_INTERNAL_REGDB=y \
     CONFIG_HDD_WLAN_WAIT_TIME=10000 \
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 46/52] formfactor: Add machconfig for 6ULL and 7ULP
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (14 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 45/52] kernel-module-qca6174: Add support for QCA6174 on i.MX 8 Series Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-08-01 15:58   ` Max Krummenacher
  2018-07-30 19:44 ` [PATCH 47/52] imx-kobs: Add i.MX 8 support Tom Hochstein
                   ` (5 subsequent siblings)
  21 siblings, 1 reply; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/formfactor/formfactor/mx6sll/machconfig | 11 +++++++++++
 recipes-bsp/formfactor/formfactor/mx7ulp/machconfig | 11 +++++++++++
 recipes-bsp/formfactor/formfactor_%.bbappend        |  2 +-
 3 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 recipes-bsp/formfactor/formfactor/mx6sll/machconfig
 create mode 100644 recipes-bsp/formfactor/formfactor/mx7ulp/machconfig

diff --git a/recipes-bsp/formfactor/formfactor/mx6sll/machconfig b/recipes-bsp/formfactor/formfactor/mx6sll/machconfig
new file mode 100644
index 0000000..e3b99b7
--- /dev/null
+++ b/recipes-bsp/formfactor/formfactor/mx6sll/machconfig
@@ -0,0 +1,11 @@
+# Display options
+HAVE_TOUCHSCREEN=1
+HAVE_KEYBOARD=0
+
+#DISPLAY_CAN_ROTATE=0
+#DISPLAY_ORIENTATION=0
+#DISPLAY_WIDTH_PIXELS=1024
+#DISPLAY_HEIGHT_PIXELS=720
+#DISPLAY_BPP=16
+#DISPLAY_DPI=150
+#DISPLAY_SUBPIXEL_ORDER=vrgb
diff --git a/recipes-bsp/formfactor/formfactor/mx7ulp/machconfig b/recipes-bsp/formfactor/formfactor/mx7ulp/machconfig
new file mode 100644
index 0000000..25b18f2
--- /dev/null
+++ b/recipes-bsp/formfactor/formfactor/mx7ulp/machconfig
@@ -0,0 +1,11 @@
+# Display options
+HAVE_TOUCHSCREEN=0
+HAVE_KEYBOARD=0
+
+#DISPLAY_CAN_ROTATE=0
+#DISPLAY_ORIENTATION=0
+#DISPLAY_WIDTH_PIXELS=1024
+#DISPLAY_HEIGHT_PIXELS=720
+#DISPLAY_BPP=16
+#DISPLAY_DPI=150
+#DISPLAY_SUBPIXEL_ORDER=vrgb
diff --git a/recipes-bsp/formfactor/formfactor_%.bbappend b/recipes-bsp/formfactor/formfactor_%.bbappend
index 8c77b8d..96551f3 100644
--- a/recipes-bsp/formfactor/formfactor_%.bbappend
+++ b/recipes-bsp/formfactor/formfactor_%.bbappend
@@ -1,2 +1,2 @@
-# Append path for freescale to include costom matchconfig
+# Append path for i.MX custom machconfig
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 47/52] imx-kobs: Add i.MX 8 support
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (15 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 46/52] formfactor: Add machconfig for 6ULL and 7ULP Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 48/52] imx-test: " Tom Hochstein
                   ` (4 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/imx-kobs/imx-kobs_git.bb | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/recipes-bsp/imx-kobs/imx-kobs_git.bb b/recipes-bsp/imx-kobs/imx-kobs_git.bb
index 4bd7726..864cbe5 100644
--- a/recipes-bsp/imx-kobs/imx-kobs_git.bb
+++ b/recipes-bsp/imx-kobs/imx-kobs_git.bb
@@ -1,5 +1,5 @@
 # Copyright (C) 2013-2016 Freescale Semiconductor
-# Copyright 2017 NXP
+# Copyright 2017-2018 NXP
 # Copyright 2018 (C) O.S. Systems Software LTDA.
 
 SUMMARY = "Nand boot write source"
@@ -8,12 +8,10 @@ LICENSE = "GPLv2"
 LIC_FILES_CHKSUM = "file://COPYING;md5=393a5ca445f6965873eca0259a17f833"
 
 PV = "5.5+git${SRCPV}"
-SRCREV = "c70685de47cfb67c5e16e1631b7033023ca3e97c"
-
 SRC_URI = "git://github.com/NXPmicro/imx-kobs.git;protocal=https \
            file://0001-Add-missing-includes-as-pointed-out-by-musl.patch \
 "
-
+SRCREV = "a0e9adce2fb7fcd57e794d7f9a5deba0f94f521b"
 S = "${WORKDIR}/git"
 
 inherit autotools pkgconfig
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 48/52] imx-test: Add i.MX 8 support
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (16 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 47/52] imx-kobs: Add i.MX 8 support Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 49/52] imx-vpu: Clarify compatibility for Chips&Media VPU Tom Hochstein
                   ` (3 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/imx-test/imx-test/memtool_profile |  1 +
 recipes-bsp/imx-test/imx-test_git.bb          | 30 ++++++++++++++-------------
 2 files changed, 17 insertions(+), 14 deletions(-)
 create mode 100644 recipes-bsp/imx-test/imx-test/memtool_profile

diff --git a/recipes-bsp/imx-test/imx-test/memtool_profile b/recipes-bsp/imx-test/imx-test/memtool_profile
new file mode 100644
index 0000000..97d6f61
--- /dev/null
+++ b/recipes-bsp/imx-test/imx-test/memtool_profile
@@ -0,0 +1 @@
+complete -o nospace -C /unit_tests/memtool memtool
diff --git a/recipes-bsp/imx-test/imx-test_git.bb b/recipes-bsp/imx-test/imx-test_git.bb
index 0932d41..df3bdd1 100644
--- a/recipes-bsp/imx-test/imx-test_git.bb
+++ b/recipes-bsp/imx-test/imx-test_git.bb
@@ -8,34 +8,34 @@ SECTION = "base"
 LICENSE = "GPLv2"
 LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6"
 
-DEPENDS  = "virtual/kernel imx-lib alsa-lib"
+DEPENDS = "virtual/kernel imx-lib alsa-lib libdrm"
 
 PE = "1"
 PV = "7.0+${SRCPV}"
 
-SRCBRANCH = "imx_4.9.88_2.0.0_ga"
-SRCREV = "1f7da41b3a8d5dff8329d7b01b10d4d71144b43e"
+SRCBRANCH = "imx_4.9.88_imx8qxp_beta2"
 SRC_URI = " \
     git://source.codeaurora.org/external/imx/imx-test.git;protocol=https;branch=${SRCBRANCH} \
     file://0001-test-Makefile-Add-include-path-to-CC-command.patch \
+    file://memtool_profile \
 "
-
+SRCREV = "3a87347ae408ef0234314a279ee74d9b015f06be"
 S = "${WORKDIR}/git"
 
-
 inherit module-base
 
 INHIBIT_PACKAGE_STRIP = "1"
 INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
 
-PLATFORM_mx6q  = "IMX6Q"
-PLATFORM_mx6dl = "IMX6Q"
-PLATFORM_mx6sl = "IMX6SL"
+PLATFORM_mx6q   = "IMX6Q"
+PLATFORM_mx6dl  = "IMX6Q"
+PLATFORM_mx6sl  = "IMX6SL"
 PLATFORM_mx6sll = "IMX6SL"
-PLATFORM_mx6sx = "IMX6SX"
-PLATFORM_mx6ul = "IMX6UL"
-PLATFORM_mx7d  = "IMX7D"
-PLATFORM_mx7ulp  = "IMX7D"
+PLATFORM_mx6sx  = "IMX6SX"
+PLATFORM_mx6ul  = "IMX6UL"
+PLATFORM_mx7d   = "IMX7D"
+PLATFORM_mx7ulp = "IMX7D"
+PLATFORM_mx8    = "IMX8"
 
 PARALLEL_MAKE = "-j 1"
 EXTRA_OEMAKE += "${PACKAGECONFIG_CONFARGS}"
@@ -73,10 +73,12 @@ do_install() {
     if [ -e ${WORKDIR}/clocks.sh ]; then
         install -m 755 ${WORKDIR}/clocks.sh ${D}/unit_tests/clocks.sh
     fi
+    install -d -m 0755 ${D}/home/root/
+    install -m 0644 ${WORKDIR}/memtool_profile ${D}/home/root/.profile
 }
 
-FILES_${PN} += "/unit_tests"
+FILES_${PN} += "/unit_tests /home/root/.profile"
 RDEPENDS_${PN} = "bash"
 
 FILES_${PN}-dbg += "/unit_tests/.debug"
-COMPATIBLE_MACHINE = "(mx6|mx7)"
+COMPATIBLE_MACHINE = "(mx6|mx7|mx8)"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 49/52] imx-vpu: Clarify compatibility for Chips&Media VPU
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (17 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 48/52] imx-test: " Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-30 19:44 ` [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0 Tom Hochstein
                   ` (2 subsequent siblings)
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-bsp/imx-vpu/imx-vpu_5.4.38.bb | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/recipes-bsp/imx-vpu/imx-vpu_5.4.38.bb b/recipes-bsp/imx-vpu/imx-vpu_5.4.38.bb
index f0c9d5a..d886e30 100644
--- a/recipes-bsp/imx-vpu/imx-vpu_5.4.38.bb
+++ b/recipes-bsp/imx-vpu/imx-vpu_5.4.38.bb
@@ -1,8 +1,8 @@
 # Copyright (C) 2013-2018 O.S. Systems Software LTDA.
 # Copyright (C) 2013-2016 Freescale Semiconductor
-# Copyright 2017 NXP
+# Copyright 2017-2018 NXP
 
-DESCRIPTION = "Freescale VPU library"
+DESCRIPTION = "Freescale Chips&Media VPU library"
 LICENSE = "Proprietary"
 LIC_FILES_CHKSUM = "file://COPYING;md5=75abe2fa1d16ca79f87cde926f05f72d"
 
@@ -32,4 +32,4 @@ do_install () {
 }
 
 PACKAGE_ARCH = "${MACHINE_ARCH}"
-COMPATIBLE_MACHINE = "(mx6)"
+COMPATIBLE_MACHINE = "(mx6q|mx6dl)"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (18 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 49/52] imx-vpu: Clarify compatibility for Chips&Media VPU Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-07-31  6:53   ` Gary Bisson
  2018-07-30 19:44 ` [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3 Tom Hochstein
  2018-07-30 19:44 ` [PATCH 52/52] bluez5: Add patches to support Tufello 1.1 SoC Tom Hochstein
  21 siblings, 1 reply; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 ...Fix-ion.h-header-inclusion-to-be-standard.patch | 37 ++++++++++------------
 recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb | 33 -------------------
 recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb | 35 ++++++++++++++++++++
 3 files changed, 52 insertions(+), 53 deletions(-)
 rename recipes-bsp/imx-vpu-hantro/{imx-vpu-hantro-1.6.0 => imx-vpu-hantro}/0001-Fix-ion.h-header-inclusion-to-be-standard.patch (71%)
 delete mode 100644 recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb
 create mode 100644 recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb

diff --git a/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro-1.6.0/0001-Fix-ion.h-header-inclusion-to-be-standard.patch b/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
similarity index 71%
rename from recipes-bsp/imx-vpu-hantro/imx-vpu-hantro-1.6.0/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
rename to recipes-bsp/imx-vpu-hantro/imx-vpu-hantro/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
index 951ead9..e7b23f7 100644
--- a/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro-1.6.0/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
+++ b/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
@@ -13,23 +13,10 @@ Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
  decoder_sw/software/linux/dwl/dwl_linux.c | 2 +-
  2 files changed, 3 insertions(+), 1 deletion(-)
 
-diff --git a/Makefile b/Makefile
-index b74e23a..a5ce22b 100755
---- a/Makefile
-+++ b/Makefile
-@@ -11,6 +11,8 @@ INCLUDE_HEADERS = -I./decoder_sw -I$(SOURCE_ROOT)/source/inc -I$(SOURCE_ROOT)/so
- INCLUDE_HEADERS += -I$(SOURCE_ROOT)/linux/memalloc
- #INCLUDE_HEADERS += -I$(SOURCE_ROOT)/linux/ldriver
- INCLUDE_HEADERS += -I$(LINUX_KERNEL_ROOT)/include/uapi -I$(LINUX_KERNEL_ROOT)/include
-+# ION header location
-+INCLUDE_HEADERS += -I$(LINUX_KERNEL_ROOT)/drivers/staging/android/uapi
- 
- CFLAGS += -DDEC_MODULE_PATH=\"/dev/mxc_hantro\" -DUSE_FAKE_RFC_TABLE -DFIFO_DATATYPE=void* -DNDEBUG -DDOWN_SCALER \
-            -DUSE_EXTERNAL_BUFFER -DUSE_FAST_EC -DUSE_VP9_EC -DGET_FREE_BUFFER_NON_BLOCK \
-diff --git a/decoder_sw/software/linux/dwl/dwl_linux.c b/decoder_sw/software/linux/dwl/dwl_linux.c
-index 8183660..ed37d86 100644
---- a/decoder_sw/software/linux/dwl/dwl_linux.c
-+++ b/decoder_sw/software/linux/dwl/dwl_linux.c
+Index: imx-vpu-hantro-1.7.0/decoder_sw/software/linux/dwl/dwl_linux.c
+===================================================================
+--- imx-vpu-hantro-1.7.0.orig/decoder_sw/software/linux/dwl/dwl_linux.c
++++ imx-vpu-hantro-1.7.0/decoder_sw/software/linux/dwl/dwl_linux.c
 @@ -41,7 +41,7 @@
  #include "dwl.h"
  #include <linux/hantrodec.h>
@@ -39,6 +26,16 @@ index 8183660..ed37d86 100644
  #ifdef ANDROID
  #include <linux/mxc_ion.h>
  #endif
--- 
-2.18.0
-
+Index: imx-vpu-hantro-1.7.0/Makefile_G1G2
+===================================================================
+--- imx-vpu-hantro-1.7.0.orig/Makefile_G1G2
++++ imx-vpu-hantro-1.7.0/Makefile_G1G2
+@@ -11,6 +11,8 @@ INCLUDE_HEADERS = -I./decoder_sw -I$(SOU
+ INCLUDE_HEADERS += -I$(SOURCE_ROOT)/linux/memalloc
+ #INCLUDE_HEADERS += -I$(SOURCE_ROOT)/linux/ldriver
+ INCLUDE_HEADERS += -I$(LINUX_KERNEL_ROOT)/include/uapi -I$(LINUX_KERNEL_ROOT)/include
++# ION header location
++INCLUDE_HEADERS += -I$(LINUX_KERNEL_ROOT)/drivers/staging/android/uapi
+ 
+ CFLAGS += -DDEC_MODULE_PATH=\"/dev/mxc_hantro\" -DUSE_FAKE_RFC_TABLE -DFIFO_DATATYPE=void* -DNDEBUG -DDOWN_SCALER \
+            -DUSE_EXTERNAL_BUFFER -DUSE_FAST_EC -DUSE_VP9_EC -DGET_FREE_BUFFER_NON_BLOCK \
diff --git a/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb b/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb
deleted file mode 100644
index 609d692..0000000
--- a/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright 2017 NXP
-
-DESCRIPTION = "i.MX Hantro VPU library"
-LICENSE = "Proprietary"
-LIC_FILES_CHKSUM = "file://COPYING;md5=08fd295cce89b0a9c74b9b83ed74f671"
-
-DEPENDS = "virtual/kernel"
-
-PROVIDES = "virtual/imxvpu"
-
-SRC_URI = "${FSL_MIRROR}/${PN}-${PV}.bin;fsl-eula=true \
-           file://0001-Fix-ion.h-header-inclusion-to-be-standard.patch \
-"
-
-SRC_URI[md5sum] = "09ec833586afb5f194ce0202da925ed6"
-SRC_URI[sha256sum] = "cbc648e41f005aad209f74c9e5dd346138dca12efeb7b27e471de7474c4da302"
-
-inherit fsl-eula-unpack
-
-PARALLEL_MAKE="-j 1"
-
-do_compile () {
-    oe_runmake CROSS_COMPILE="${HOST_PREFIX}" LINUX_KERNEL_ROOT="${STAGING_KERNEL_DIR}" SDKTARGETSYSROOT="${STAGING_DIR_TARGET}" all
-}
-
-do_install () {
-    oe_runmake DEST_DIR="${D}" install
-}
-
-FILES_${PN} += "/unit_tests"
-
-PACKAGE_ARCH = "${MACHINE_ARCH}"
-COMPATIBLE_MACHINE = "(mx8mq)"
diff --git a/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb b/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb
new file mode 100644
index 0000000..da2ac51
--- /dev/null
+++ b/recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb
@@ -0,0 +1,35 @@
+# Copyright 2017-2018 NXP
+
+DESCRIPTION = "i.MX Hantro VPU library"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://COPYING;md5=ab61cab9599935bfe9f700405ef00f28"
+
+DEPENDS = "virtual/kernel"
+
+PROVIDES = "virtual/imxvpu"
+
+SRC_URI = " \
+    ${FSL_MIRROR}/${PN}-${PV}.bin;fsl-eula=true \
+    file://0001-Fix-ion.h-header-inclusion-to-be-standard.patch \
+"
+SRC_URI[md5sum] = "9a8ade25333e6ac3f7c345b71f3477a6"
+SRC_URI[sha256sum] = "a3bbf2d8ac00ecae6d48b05cb94d9bdf68085d5bfc54eb176e3bf59670a87ad1"
+
+inherit fsl-eula-unpack
+
+PARALLEL_MAKE="-j 1"
+
+PLATFORM_mx8mq = "IMX8MQ"
+
+do_compile () {
+    oe_runmake CROSS_COMPILE="${HOST_PREFIX}" LINUX_KERNEL_ROOT="${STAGING_KERNEL_DIR}" SDKTARGETSYSROOT="${STAGING_DIR_TARGET}" PLATFORM="${PLATFORM}" all
+}
+
+do_install () {
+    oe_runmake DEST_DIR="${D}" PLATFORM="${PLATFORM}" install
+}
+
+FILES_${PN} += "/unit_tests"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+COMPATIBLE_MACHINE = "(mx8mq)"
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (19 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0 Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  2018-08-01 14:24   ` Max Krummenacher
  2018-07-30 19:44 ` [PATCH 52/52] bluez5: Add patches to support Tufello 1.1 SoC Tom Hochstein
  21 siblings, 1 reply; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-connectivity/bluez5/bluez5_5.%.bbappend    |   14 +
 ...th-Add-bluetooth-support-for-QCA6174-chip.patch | 2404 ++++++++++++++++++++
 ...tach-set-flag-to-enable-HCI-reset-on-init.patch |   32 +
 ...nstead-of-strlcpy-with-strncpy-to-avoid-r.patch |   35 +
 4 files changed, 2485 insertions(+)
 create mode 100644 recipes-connectivity/bluez5/bluez5_5.%.bbappend
 create mode 100644 recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch
 create mode 100644 recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch
 create mode 100644 recipes-connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch

diff --git a/recipes-connectivity/bluez5/bluez5_5.%.bbappend b/recipes-connectivity/bluez5/bluez5_5.%.bbappend
new file mode 100644
index 0000000..00eb248
--- /dev/null
+++ b/recipes-connectivity/bluez5/bluez5_5.%.bbappend
@@ -0,0 +1,14 @@
+FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
+
+# Do not start the service during system boot up
+INITSCRIPT_PARAMS_${PN} = "stop 20 0 1 6 ."
+
+# Add patch for module bcm43xx
+# Add patches for QCA modules with Qca6174 and Qca9377-3 chips
+SRC_URI += " \
+            file://0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch \
+            file://0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch \
+            file://0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch \
+            file://0004-Add-support-for-Tufello-1.1-SOC.patch \
+            file://0005-bluetooth-Add-support-for-multi-baud-rate.patch \
+"
diff --git a/recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch b/recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch
new file mode 100644
index 0000000..5ae3c98
--- /dev/null
+++ b/recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch
@@ -0,0 +1,2404 @@
+From d509b84f237c11874087d7ea527e5ba2f460ed2c Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Tue, 29 Aug 2017 10:12:57 +0800
+Subject: [PATCH 1/5] bluetooth : Add bluetooth support for QCA6174 chip.
+
+Register the QCA6174 initialization routine with hciattach for
+downloading firmware patches to the bluetooth controller.
+Add optional support 'f' to control installation of line
+discipline driver. Invoke hciattach from command line and
+download the firmware patches:
+        hciattach /dev/ttyHS0 qca 3000000 -t120 flow -f0
+
+cherry-pick and merged from:
+	https://source.codeaurora.org/quic/la/platform/external/bluetooth/bluez
+	branch: LNX.LE.5.3
+	commit: commit bb96f3b759e0b99db70014302ca12929fb42f554
+
+Change-Id: I87f2927d7096904071a02d73d3afef0dc34db414
+Signed-off-by: Rupesh Tatiya <rtatiya@codeaurora.org>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ Makefile.tools         |    3 +-
+ tools/hciattach.c      |   26 +-
+ tools/hciattach.h      |    2 +
+ tools/hciattach_rome.c | 1864 ++++++++++++++++++++++++++++++++++++++++++++++++
+ tools/hciattach_rome.h |  371 ++++++++++
+ 5 files changed, 2264 insertions(+), 2 deletions(-)
+
+diff --git a/Makefile.tools b/Makefile.tools
+index 0fd6dec..f1a1def 100644
+--- a/Makefile.tools
++++ b/Makefile.tools
+@@ -283,7 +283,8 @@ tools_hciattach_SOURCES = tools/hciattach.c tools/hciattach.h \
+ 						tools/hciattach_ath3k.c \
+ 						tools/hciattach_qualcomm.c \
+ 						tools/hciattach_intel.c \
+-						tools/hciattach_bcm43xx.c
++						tools/hciattach_bcm43xx.c \
++						tools/hciattach_rome.c tools/hciattach_rome.h
+ tools_hciattach_LDADD = lib/libbluetooth-internal.la
+ 
+ tools_hciconfig_SOURCES = tools/hciconfig.c tools/csr.h tools/csr.c
+diff --git a/tools/hciattach.c b/tools/hciattach.c
+index fad176c..200f734 100644
+--- a/tools/hciattach.c
++++ b/tools/hciattach.c
+@@ -69,6 +69,8 @@ struct uart_t {
+ #define ENABLE_PM	1
+ #define DISABLE_PM	0
+ 
++int line_disp = 1;
++
+ static volatile sig_atomic_t __io_canceled = 0;
+ 
+ static void sig_hup(int sig)
+@@ -263,6 +265,12 @@ static int ath3k_pm(int fd, struct uart_t *u, struct termios *ti)
+ 	return ath3k_post(fd, u->pm);
+ }
+ 
++static int qca(int fd, struct uart_t *u, struct termios *ti)
++{
++        fprintf(stderr,"qca\n");
++        return qca_soc_init(fd, u->bdaddr);
++}
++
+ static int qualcomm(int fd, struct uart_t *u, struct termios *ti)
+ {
+ 	return qualcomm_init(fd, u->speed, ti, u->bdaddr);
+@@ -1093,6 +1101,11 @@ struct uart_t uart[] = {
+ 	{ "ath3k",    0x0000, 0x0000, HCI_UART_ATH3K, 115200, 115200,
+ 			FLOW_CTL, DISABLE_PM, NULL, ath3k_ps, ath3k_pm  },
+ 
++	/* QCA ROME */
++        { "qca",    0x0000, 0x0000, HCI_UART_H4, 115200, 115200,
++                        FLOW_CTL, DISABLE_PM, NULL, qca, NULL },
++
++
+ 	/* QUALCOMM BTS */
+ 	{ "qualcomm",   0x0000, 0x0000, HCI_UART_H4,   115200, 115200,
+ 			FLOW_CTL, DISABLE_PM, NULL, qualcomm, NULL },
+@@ -1195,6 +1208,8 @@ static int init_uart(char *dev, struct uart_t *u, int send_break, int raw)
+ 		goto fail;
+ 	}
+ 
++if (line_disp) {
++	fprintf(stderr, "Setting TTY to N_HCI line discipline\n");
+ 	/* Set TTY to N_HCI line discipline */
+ 	i = N_HCI;
+ 	if (ioctl(fd, TIOCSETD, &i) < 0) {
+@@ -1211,6 +1226,7 @@ static int init_uart(char *dev, struct uart_t *u, int send_break, int raw)
+ 		perror("Can't set device");
+ 		goto fail;
+ 	}
++}
+ 
+ 	if (u->post && u->post(fd, u, &ti) < 0)
+ 		goto fail;
+@@ -1249,7 +1265,7 @@ int main(int argc, char *argv[])
+ 	printpid = 0;
+ 	raw = 0;
+ 
+-	while ((opt=getopt(argc, argv, "bnpt:s:lr")) != EOF) {
++	while ((opt=getopt(argc, argv, "bnpt:s:lrf:")) != EOF) {
+ 		switch(opt) {
+ 		case 'b':
+ 			send_break = 1;
+@@ -1282,6 +1298,11 @@ int main(int argc, char *argv[])
+ 			raw = 1;
+ 			break;
+ 
++		case 'f':
++			line_disp = atoi(optarg);
++			fprintf(stderr, "Line_disp val : %d\n", line_disp);
++			break;
++
+ 		default:
+ 			usage();
+ 			exit(1);
+@@ -1426,12 +1447,15 @@ int main(int argc, char *argv[])
+ 			break;
+ 	}
+ 
++if (line_disp) {
+ 	/* Restore TTY line discipline */
++	fprintf(stderr, "Restoring the Line Discipline driver\n");
+ 	ld = N_TTY;
+ 	if (ioctl(n, TIOCSETD, &ld) < 0) {
+ 		perror("Can't restore line discipline");
+ 		exit(1);
+ 	}
++}
+ 
+ 	return 0;
+ }
+diff --git a/tools/hciattach.h b/tools/hciattach.h
+index 249aab4..59efa31 100644
+--- a/tools/hciattach.h
++++ b/tools/hciattach.h
+@@ -45,6 +45,7 @@
+ #define HCI_UART_AG6XX	9
+ #define HCI_UART_NOKIA	10
+ #define HCI_UART_MRVL	11
++#define HCI_UART_IBS	12
+ 
+ #define HCI_UART_RAW_DEVICE	0
+ #define HCI_UART_RESET_ON_INIT	1
+@@ -65,6 +66,7 @@ int bgb2xx_init(int dd, bdaddr_t *bdaddr);
+ int ath3k_init(int fd, int speed, int init_speed, char *bdaddr,
+ 						struct termios *ti);
+ int ath3k_post(int fd, int pm);
++int qca_soc_init(int fd, char *bdaddr);
+ int qualcomm_init(int fd, int speed, struct termios *ti, const char *bdaddr);
+ int intel_init(int fd, int init_speed, int *speed, struct termios *ti);
+ int bcm43xx_init(int fd, int def_speed, int speed, struct termios *ti,
+diff --git a/tools/hciattach_rome.c b/tools/hciattach_rome.c
+new file mode 100644
+index 0000000..242a49f
+--- /dev/null
++++ b/tools/hciattach_rome.c
+@@ -0,0 +1,1864 @@
++/*
++ *
++ *  Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
++ *  Not a Contribution.
++ *
++ *  Copyright 2012 The Android Open Source Project
++ *
++ *  Licensed under the Apache License, Version 2.0 (the "License"); you
++ *  may not use this file except in compliance with the License. You may
++ *  obtain a copy of the License at
++ *
++ *  http://www.apache.org/licenses/LICENSE-2.0
++ *
++ *  Unless required by applicable law or agreed to in writing, software
++ *  distributed under the License is distributed on an "AS IS" BASIS,
++ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  permissions and limitations under the License.
++ *
++ */
++
++/******************************************************************************
++ *
++ *  Filename:      hciattach_rome.c
++ *
++ *  Description:   Contains controller-specific functions, like
++ *                      firmware patch download
++ *                      low power mode operations
++ *
++ ******************************************************************************/
++
++#define LOG_TAG "bt_vendor"
++#include <stdio.h>
++#include <unistd.h>
++#include <sys/socket.h>
++#include <sys/types.h>
++#include <sys/stat.h>
++#include <sys/ioctl.h>
++#include <signal.h>
++#include <time.h>
++#include <errno.h>
++#include <fcntl.h>
++#include <dirent.h>
++#include <ctype.h>
++#include <stdlib.h>
++#include <string.h>
++#include <termios.h>
++#include <bluetooth/bluetooth.h>
++#include "hciattach_rome.h"
++#include "hciattach.h"
++
++#ifdef __cplusplus
++}
++#endif
++
++
++/******************************************************************************
++**  Variables
++******************************************************************************/
++FILE *file;
++unsigned char *phdr_buffer;
++unsigned char *pdata_buffer = NULL;
++patch_info rampatch_patch_info;
++int rome_ver = ROME_VER_UNKNOWN;
++unsigned char gTlv_type;
++unsigned char gtlv_dwndcfg;
++char *rampatch_file_path;
++char *nvm_file_path;
++vnd_userial_cb_t vnd_userial;
++unsigned char wait_vsc_evt = TRUE;
++/******************************************************************************
++**  Extern variables
++******************************************************************************/
++//extern unsigned char vnd_local_bd_addr[6];
++
++/*****************************************************************************
++**   Functions
++*****************************************************************************/
++
++/*******************************************************************************
++**
++** Function        userial_to_tcio_baud
++**
++** Description     helper function converts USERIAL baud rates into TCIO
++**                  conforming baud rates
++**
++** Returns         TRUE/FALSE
++**
++*******************************************************************************/
++unsigned char userial_to_tcio_baud(unsigned char cfg_baud, unsigned int *baud)
++{
++    if (cfg_baud == USERIAL_BAUD_115200)
++        *baud = B115200;
++    else if (cfg_baud == USERIAL_BAUD_4M)
++        *baud = B4000000;
++    else if (cfg_baud == USERIAL_BAUD_3M)
++        *baud = B3000000;
++    else if (cfg_baud == USERIAL_BAUD_2M)
++        *baud = B2000000;
++    else if (cfg_baud == USERIAL_BAUD_1M)
++        *baud = B1000000;
++    else if (cfg_baud == USERIAL_BAUD_921600)
++        *baud = B921600;
++    else if (cfg_baud == USERIAL_BAUD_460800)
++        *baud = B460800;
++    else if (cfg_baud == USERIAL_BAUD_230400)
++        *baud = B230400;
++    else if (cfg_baud == USERIAL_BAUD_57600)
++        *baud = B57600;
++    else if (cfg_baud == USERIAL_BAUD_19200)
++        *baud = B19200;
++    else if (cfg_baud == USERIAL_BAUD_9600)
++        *baud = B9600;
++    else if (cfg_baud == USERIAL_BAUD_1200)
++        *baud = B1200;
++    else if (cfg_baud == USERIAL_BAUD_600)
++        *baud = B600;
++    else
++    {
++        fprintf(stderr,  "userial vendor open: unsupported baud idx %i\n", cfg_baud);
++        *baud = B115200;
++        return FALSE;
++    }
++
++    return TRUE;
++}
++
++
++/*******************************************************************************
++**
++** Function        userial_vendor_set_baud
++**
++** Description     Set new baud rate
++**
++** Returns         None
++**
++*******************************************************************************/
++void userial_vendor_set_baud(unsigned char userial_baud)
++{
++    unsigned int tcio_baud;
++    fprintf(stderr, "## userial_vendor_set_baud: %d\n", userial_baud);
++
++    if (tcgetattr(vnd_userial.fd, &vnd_userial.termios) < 0) {
++            perror("Can't get port settings");
++            return;
++    }
++    cfmakeraw(&vnd_userial.termios);
++    vnd_userial.termios.c_cflag |= CLOCAL;
++    vnd_userial.termios.c_cflag |= CREAD;
++    vnd_userial.termios.c_cflag |= CS8;
++    tcsetattr(vnd_userial.fd, TCSANOW, &vnd_userial.termios);
++
++    userial_to_tcio_baud(userial_baud, &tcio_baud);
++
++    cfsetospeed(&vnd_userial.termios, tcio_baud);
++    cfsetispeed(&vnd_userial.termios, tcio_baud);
++    tcsetattr(vnd_userial.fd, TCSADRAIN, &vnd_userial.termios); /* don't change speed until last write done */
++
++}
++
++
++/*******************************************************************************
++**
++** Function        userial_vendor_ioctl
++**
++** Description     ioctl inteface
++**
++** Returns         None
++**
++*******************************************************************************/
++int userial_vendor_ioctl(int fd, userial_vendor_ioctl_op_t op, int *p_data)
++{
++    int err = -1;
++    struct termios ti;
++
++    if (tcgetattr(fd, &ti) < 0) {
++            perror("Can't get port settings");
++            return -1;
++    }
++    cfmakeraw(&ti);
++    ti.c_cflag |= CLOCAL;
++    ti.c_cflag |= CREAD;
++    ti.c_cflag |= CS8;
++
++    switch(op)
++    {
++#if (BT_WAKE_VIA_USERIAL_IOCTL==TRUE)
++        case USERIAL_OP_ASSERT_BT_WAKE:
++            VNDUSERIALDBG("## userial_vendor_ioctl: Asserting BT_Wake ##");
++            err = ioctl(fd, USERIAL_IOCTL_BT_WAKE_ASSERT, NULL);
++            break;
++
++        case USERIAL_OP_DEASSERT_BT_WAKE:
++            VNDUSERIALDBG("## userial_vendor_ioctl: De-asserting BT_Wake ##");
++            err = ioctl(fd, USERIAL_IOCTL_BT_WAKE_DEASSERT, NULL);
++            break;
++
++        case USERIAL_OP_GET_BT_WAKE_STATE:
++            err = ioctl(fd, USERIAL_IOCTL_BT_WAKE_GET_ST, p_data);
++            break;
++#endif  //  (BT_WAKE_VIA_USERIAL_IOCTL==TRUE)
++        case USERIAL_OP_FLOW_ON:
++            fprintf(stderr, "## userial_vendor_ioctl: UART Flow On\n ");
++            ti.c_cflag |= CRTSCTS;
++
++            if (err = tcsetattr(fd, TCSANOW, &ti) < 0) {
++                perror("Can't set port settings");
++                return -1;
++            }
++
++            break;
++
++        case USERIAL_OP_FLOW_OFF:
++            fprintf(stderr, "## userial_vendor_ioctl: UART Flow Off\n ");
++            ti.c_cflag &= ~CRTSCTS;
++            if (err = tcsetattr(fd, TCSANOW, &ti) < 0) {
++                fprintf(stderr, "Can't set port settings");
++                return -1;
++            }
++            break;
++
++        default:
++            break;
++    }
++
++    return err;
++}
++
++
++int get_vs_hci_event(unsigned char *rsp)
++{
++    int err = 0, soc_id =0;
++    unsigned char paramlen = 0;
++
++    if( (rsp[EVENTCODE_OFFSET] == VSEVENT_CODE) || (rsp[EVENTCODE_OFFSET] == EVT_CMD_COMPLETE))
++        fprintf(stderr, "%s: Received HCI-Vendor Specific event\n", __FUNCTION__);
++    else {
++        fprintf(stderr, "%s: Failed to receive HCI-Vendor Specific event\n", __FUNCTION__);
++        err = -EIO;
++        goto failed;
++    }
++
++    fprintf(stderr, "%s: Parameter Length: 0x%x\n", __FUNCTION__, paramlen = rsp[EVT_PLEN]);
++    fprintf(stderr, "%s: Command response: 0x%x\n", __FUNCTION__, rsp[CMD_RSP_OFFSET]);
++    fprintf(stderr, "%s: Response type   : 0x%x\n", __FUNCTION__, rsp[RSP_TYPE_OFFSET]);
++
++    /* Check the status of the operation */
++    switch ( rsp[CMD_RSP_OFFSET] )
++    {
++        case EDL_CMD_REQ_RES_EVT:
++        fprintf(stderr, "%s: Command Request Response\n", __FUNCTION__);
++        switch(rsp[RSP_TYPE_OFFSET])
++        {
++            case EDL_PATCH_VER_RES_EVT:
++            case EDL_APP_VER_RES_EVT:
++                fprintf(stderr, "\t Current Product ID\t\t: 0x%08x\n",
++                    (unsigned int)(rsp[PATCH_PROD_ID_OFFSET +3] << 24 |
++                                        rsp[PATCH_PROD_ID_OFFSET+2] << 16 |
++                                        rsp[PATCH_PROD_ID_OFFSET+1] << 8 |
++                                        rsp[PATCH_PROD_ID_OFFSET]  ));
++
++                /* Patch Version indicates FW patch version */
++                fprintf(stderr, "\t Current Patch Version\t\t: 0x%04x\n",
++                    (unsigned short)(rsp[PATCH_PATCH_VER_OFFSET + 1] << 8 |
++                                            rsp[PATCH_PATCH_VER_OFFSET] ));
++
++                /* ROM Build Version indicates ROM build version like 1.0/1.1/2.0 */
++                fprintf(stderr, "\t Current ROM Build Version\t: 0x%04x\n", rome_ver =
++                    (int)(rsp[PATCH_ROM_BUILD_VER_OFFSET + 1] << 8 |
++                                            rsp[PATCH_ROM_BUILD_VER_OFFSET] ));
++
++                /* In case rome 1.0/1.1, there is no SOC ID version available */
++                if (paramlen - 10)
++                {
++                    fprintf(stderr, "\t Current SOC Version\t\t: 0x%08x\n", soc_id =
++                        (unsigned int)(rsp[PATCH_SOC_VER_OFFSET +3] << 24 |
++                                                rsp[PATCH_SOC_VER_OFFSET+2] << 16 |
++                                                rsp[PATCH_SOC_VER_OFFSET+1] << 8 |
++                                                rsp[PATCH_SOC_VER_OFFSET]  ));
++                }
++
++                /* Rome Chipset Version can be decided by Patch version and SOC version,
++                Upper 2 bytes will be used for Patch version and Lower 2 bytes will be
++                used for SOC as combination for BT host driver */
++                rome_ver = (rome_ver << 16) | (soc_id & 0x0000ffff);
++                break;
++            case EDL_TVL_DNLD_RES_EVT:
++            case EDL_CMD_EXE_STATUS_EVT:
++                switch (err = rsp[CMD_STATUS_OFFSET])
++                    {
++                    case HCI_CMD_SUCCESS:
++                        fprintf(stderr, "%s: Download Packet successfully!\n", __FUNCTION__);
++                        break;
++                    case PATCH_LEN_ERROR:
++                        fprintf(stderr, "%s: Invalid patch length argument passed for EDL PATCH "
++                        "SET REQ cmd\n", __FUNCTION__);
++                        break;
++                    case PATCH_VER_ERROR:
++                        fprintf(stderr, "%s: Invalid patch version argument passed for EDL PATCH "
++                        "SET REQ cmd\n", __FUNCTION__);
++                        break;
++                    case PATCH_CRC_ERROR:
++                        fprintf(stderr, "%s: CRC check of patch failed!!!\n", __FUNCTION__);
++                        break;
++                    case PATCH_NOT_FOUND:
++                        fprintf(stderr, "%s: Invalid patch data!!!\n", __FUNCTION__);
++                        break;
++                    case TLV_TYPE_ERROR:
++                        fprintf(stderr, "%s: TLV Type Error !!!\n", __FUNCTION__);
++                        break;
++                    default:
++                        fprintf(stderr, "%s: Undefined error (0x%x)", __FUNCTION__, err);
++                        break;
++                    }
++            break;
++        }
++        break;
++
++        case NVM_ACCESS_CODE:
++            fprintf(stderr, "%s: NVM Access Code!!!\n", __FUNCTION__);
++            err = HCI_CMD_SUCCESS;
++            break;
++        case EDL_SET_BAUDRATE_RSP_EVT:
++            /* Rome 1.1 has bug with the response, so it should ignore it. */
++            if (rsp[BAUDRATE_RSP_STATUS_OFFSET] != BAUDRATE_CHANGE_SUCCESS)
++            {
++                fprintf(stderr, "%s: Set Baudrate request failed - 0x%x\n", __FUNCTION__,
++                    rsp[CMD_STATUS_OFFSET]);
++                err = -1;
++            }
++            break;
++        default:
++            fprintf(stderr, "%s: Not a valid status!!!\n", __FUNCTION__);
++            err = -1;
++            break;
++    }
++
++failed:
++    return err;
++}
++
++
++int wait_for_data(int fd, int maxTimeOut)
++{
++    fd_set infids;
++    struct timeval timeout;
++
++    if (maxTimeOut <= 0) {
++        fprintf(stderr, "%s: Invalid timeout value specified", __func__);
++        return -EINVAL;
++    }
++
++    FD_ZERO (&infids);
++    FD_SET (fd, &infids);
++    timeout.tv_sec = maxTimeOut;
++    timeout.tv_usec = 0;
++
++    /* Check whether data is available in TTY buffer before calling read() */
++    if (select (fd + 1, &infids, NULL, NULL, &timeout) < 1) {
++        fprintf(stderr, "%s: Timing out on select for %d secs.\n", __FUNCTION__, maxTimeOut);
++        return -1;
++    }
++    else
++        fprintf(stderr, "%s: HCI-VS-EVENT available in TTY Serial buffer\n",
++            __FUNCTION__);
++
++    return 1;
++}
++
++/*
++ * Read an VS HCI event from the given file descriptor.
++ */
++int read_vs_hci_event(int fd, unsigned char* buf, int size)
++{
++    int remain, r, retry = 0;
++    int count = 0;
++
++    if (size <= 0) {
++        fprintf(stderr, "Invalid size arguement!\n");
++        return -1;
++    }
++
++    fprintf(stderr, "%s: Wait for HCI-Vendor Specfic Event from SOC\n",
++        __FUNCTION__);
++
++    /* Check whether data is available in TTY buffer before calling read() */
++    if (wait_for_data(fd, SELECT_TIMEOUT) < 1)
++        return -1;
++
++    /* The first byte identifies the packet type. For HCI event packets, it
++     * should be 0x04, so we read until we get to the 0x04. */
++    /* It will keep reading until find 0x04 byte */
++    while (1) {
++            /* Read UART Buffer for HCI-DATA */
++            r = read(fd, buf, 1);
++            if (r <= 0) {
++                fprintf(stderr, "%s: read() failed. error: %d\n",
++                    __FUNCTION__, r);
++                return -1;
++            }
++
++            /* Check if received data is HCI-DATA or not.
++             * If not HCI-DATA, then retry reading the UART Buffer once.
++             * Sometimes there could be corruption on the UART lines and to
++             * avoid that retry once reading the UART Buffer for HCI-DATA.
++             */
++            if (buf[0] == 0x04) { /* Recvd. HCI DATA */
++                    retry = 0;
++                    break;
++            }
++            else if (retry < MAX_RETRY_CNT){ /* Retry mechanism */
++                retry++;
++                fprintf(stderr, "%s: Not an HCI-VS-Event! buf[0]: %d",
++                    __FUNCTION__, buf[0]);
++                if (wait_for_data(fd, SELECT_TIMEOUT) < 1)
++                    return -1;
++                else /* Data available in UART Buffer: Continue to read */
++                    continue;
++            }
++            else { /* RETRY failed : Exiting with failure */
++                fprintf(stderr, "%s: RETRY failed!", __FUNCTION__);
++                return -1;
++            }
++    }
++    count++;
++
++    fprintf(stderr, "%s: Wait for HCI-Vendor Specfic Event from SOC, buf[0] - 0x%x\n", __FUNCTION__, buf[0]);
++    /* The next two bytes are the event code and parameter total length. */
++    while (count < 3) {
++            r = read(fd, buf + count, 3 - count);
++            if ((r <= 0) || (buf[1] != 0xFF )) {
++                fprintf(stderr, "It is not VS event !!\n");
++                return -1;
++            }
++            count += r;
++    }
++
++    fprintf(stderr, "%s: Wait for HCI-Vendor Specfic Event from SOC, buf[1] - 0x%x\n", __FUNCTION__, buf[1]);
++    /* Now we read the parameters. */
++    if (buf[2] < (size - 3))
++            remain = buf[2];
++    else
++            remain = size - 3;
++
++    while ((count - 3) < remain) {
++            r = read(fd, buf + count, remain - (count - 3));
++            if (r <= 0)
++                    return -1;
++            count += r;
++    }
++
++     /* Check if the set patch command is successful or not */
++    if(get_vs_hci_event(buf) != HCI_CMD_SUCCESS)
++        return -1;
++
++    fprintf(stderr, "%s: Wait for HCI-Vendor Specfic Event from SOC, count - 0x%x\n", __FUNCTION__, count);
++    return count;
++}
++
++
++int hci_send_vs_cmd(int fd, unsigned char *cmd, unsigned char *rsp, int size)
++{
++    int ret = 0;
++
++    /* Send the HCI command packet to UART for transmission */
++    ret = write(fd, cmd, size);
++    if (ret != size) {
++        fprintf(stderr, "%s: Send failed with ret value: %d\n", __FUNCTION__, ret);
++        goto failed;
++    }
++
++    if (wait_vsc_evt) {
++        /* Check for response from the Controller */
++        if (read_vs_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE) < 0) {
++            ret = -ETIMEDOUT;
++            fprintf(stderr, "%s: Failed to get HCI-VS Event from SOC\n", __FUNCTION__);
++            goto failed;
++        }
++        fprintf(stderr, "%s: Received HCI-Vendor Specific Event from SOC\n", __FUNCTION__);
++    }
++
++failed:
++    return ret;
++}
++
++void frame_hci_cmd_pkt(
++    unsigned char *cmd,
++    int edl_cmd, unsigned int p_base_addr,
++    int segtNo, int size
++    )
++{
++    int offset = 0;
++    hci_command_hdr *cmd_hdr;
++
++    memset(cmd, 0x0, HCI_MAX_CMD_SIZE);
++
++    cmd_hdr = (void *) (cmd + 1);
++
++    cmd[0]      = HCI_COMMAND_PKT;
++    cmd_hdr->opcode = cmd_opcode_pack(HCI_VENDOR_CMD_OGF, HCI_PATCH_CMD_OCF);
++    cmd_hdr->plen   = size;
++    cmd[4]      = edl_cmd;
++
++    switch (edl_cmd)
++    {
++        case EDL_PATCH_SET_REQ_CMD:
++            /* Copy the patch header info as CMD params */
++            memcpy(&cmd[5], phdr_buffer, PATCH_HDR_LEN);
++            fprintf(stderr, "%s: Sending EDL_PATCH_SET_REQ_CMD\n", __FUNCTION__);
++            fprintf(stderr, "HCI-CMD %d:\t0x%x \t0x%x \t0x%x \t0x%x \t0x%x\n",
++                segtNo, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4]);
++            break;
++        case EDL_PATCH_DLD_REQ_CMD:
++            offset = ((segtNo - 1) * MAX_DATA_PER_SEGMENT);
++            p_base_addr += offset;
++            cmd_hdr->plen   = (size + 6);
++            cmd[5]  = (size + 4);
++            cmd[6]  = EXTRACT_BYTE(p_base_addr, 0);
++            cmd[7]  = EXTRACT_BYTE(p_base_addr, 1);
++            cmd[8]  = EXTRACT_BYTE(p_base_addr, 2);
++            cmd[9]  = EXTRACT_BYTE(p_base_addr, 3);
++            memcpy(&cmd[10], (pdata_buffer + offset), size);
++
++            fprintf(stderr, "%s: Sending EDL_PATCH_DLD_REQ_CMD: size: %d bytes\n",
++                __FUNCTION__, size);
++            fprintf(stderr, "HCI-CMD %d:\t0x%x\t0x%x\t0x%x\t0x%x\t0x%x\t0x%x\t0x%x\t"
++                "0x%x\t0x%x\t0x%x\t\n", segtNo, cmd[0], cmd[1], cmd[2],
++                cmd[3], cmd[4], cmd[5], cmd[6], cmd[7], cmd[8], cmd[9]);
++            break;
++        case EDL_PATCH_ATCH_REQ_CMD:
++            fprintf(stderr, "%s: Sending EDL_PATCH_ATTACH_REQ_CMD\n", __FUNCTION__);
++            fprintf(stderr, "HCI-CMD %d:\t0x%x \t0x%x \t0x%x \t0x%x \t0x%x\n",
++            segtNo, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4]);
++            break;
++        case EDL_PATCH_RST_REQ_CMD:
++            fprintf(stderr, "%s: Sending EDL_PATCH_RESET_REQ_CMD\n", __FUNCTION__);
++            fprintf(stderr, "HCI-CMD %d:\t0x%x \t0x%x \t0x%x \t0x%x \t0x%x\n",
++            segtNo, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4]);
++            break;
++        case EDL_PATCH_VER_REQ_CMD:
++            fprintf(stderr, "%s: Sending EDL_PATCH_VER_REQ_CMD\n", __FUNCTION__);
++            fprintf(stderr, "HCI-CMD %d:\t0x%x \t0x%x \t0x%x \t0x%x \t0x%x\n",
++            segtNo, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4]);
++            break;
++        case EDL_PATCH_TLV_REQ_CMD:
++            fprintf(stderr, "%s: Sending EDL_PATCH_TLV_REQ_CMD\n", __FUNCTION__);
++            /* Parameter Total Length */
++            cmd[3] = size +2;
++
++            /* TLV Segment Length */
++            cmd[5] = size;
++            fprintf(stderr, "HCI-CMD %d:\t0x%x \t0x%x \t0x%x \t0x%x \t0x%x \t0x%x\n",
++            segtNo, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], cmd[5]);
++            offset = (segtNo * MAX_SIZE_PER_TLV_SEGMENT);
++            memcpy(&cmd[6], (pdata_buffer + offset), size);
++            break;
++        default:
++            fprintf(stderr, "%s: Unknown EDL CMD !!!\n", __FUNCTION__);
++    }
++}
++
++void rome_extract_patch_header_info(unsigned char *buf)
++{
++    int index;
++
++    /* Extract patch id */
++    for (index = 0; index < 4; index++)
++        rampatch_patch_info.patch_id |=
++            (LSH(buf[index + P_ID_OFFSET], (index * 8)));
++
++    /* Extract (ROM and BUILD) version information */
++    for (index = 0; index < 2; index++)
++        rampatch_patch_info.patch_ver.rom_version |=
++            (LSH(buf[index + P_ROME_VER_OFFSET], (index * 8)));
++
++    for (index = 0; index < 2; index++)
++        rampatch_patch_info.patch_ver.build_version |=
++            (LSH(buf[index + P_BUILD_VER_OFFSET], (index * 8)));
++
++    /* Extract patch base and entry addresses */
++    for (index = 0; index < 4; index++)
++        rampatch_patch_info.patch_base_addr |=
++            (LSH(buf[index + P_BASE_ADDR_OFFSET], (index * 8)));
++
++    /* Patch BASE & ENTRY addresses are same */
++    rampatch_patch_info.patch_entry_addr = rampatch_patch_info.patch_base_addr;
++
++    /* Extract total length of the patch payload */
++    for (index = 0; index < 4; index++)
++        rampatch_patch_info.patch_length |=
++            (LSH(buf[index + P_LEN_OFFSET], (index * 8)));
++
++    /* Extract the CRC checksum of the patch payload */
++    for (index = 0; index < 4; index++)
++        rampatch_patch_info.patch_crc |=
++            (LSH(buf[index + P_CRC_OFFSET], (index * 8)));
++
++    /* Extract patch control value */
++    for (index = 0; index < 4; index++)
++        rampatch_patch_info.patch_ctrl |=
++            (LSH(buf[index + P_CONTROL_OFFSET], (index * 8)));
++
++    fprintf(stderr, "PATCH_ID\t : 0x%x\n", rampatch_patch_info.patch_id);
++    fprintf(stderr, "ROM_VERSION\t : 0x%x\n", rampatch_patch_info.patch_ver.rom_version);
++    fprintf(stderr, "BUILD_VERSION\t : 0x%x\n", rampatch_patch_info.patch_ver.build_version);
++    fprintf(stderr, "PATCH_LENGTH\t : 0x%x\n", rampatch_patch_info.patch_length);
++    fprintf(stderr, "PATCH_CRC\t : 0x%x\n", rampatch_patch_info.patch_crc);
++    fprintf(stderr, "PATCH_CONTROL\t : 0x%x\n", rampatch_patch_info.patch_ctrl);
++    fprintf(stderr, "PATCH_BASE_ADDR\t : 0x%x\n", rampatch_patch_info.patch_base_addr);
++
++}
++
++int rome_edl_set_patch_request(int fd)
++{
++    int size, err;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++
++    /* Frame the HCI CMD to be sent to the Controller */
++    frame_hci_cmd_pkt(cmd, EDL_PATCH_SET_REQ_CMD, 0,
++        -1, PATCH_HDR_LEN + 1);
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND	+ HCI_COMMAND_HDR_SIZE + cmd[PLEN]);
++
++    /* Send HCI Command packet to Controller */
++    err = hci_send_vs_cmd(fd, (unsigned char *)cmd, rsp, size);
++    if ( err != size) {
++        fprintf(stderr, "Failed to set the patch info to the Controller!\n");
++        goto error;
++    }
++
++    err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++    if ( err < 0) {
++        fprintf(stderr, "%s: Failed to set patch info on Controller\n", __FUNCTION__);
++        goto error;
++    }
++    fprintf(stderr, "%s: Successfully set patch info on the Controller\n", __FUNCTION__);
++error:
++    return err;
++}
++
++int rome_edl_patch_download_request(int fd)
++{
++    int no_of_patch_segment;
++    int index = 1, err = 0, size = 0;
++    unsigned int p_base_addr;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++
++    no_of_patch_segment = (rampatch_patch_info.patch_length /
++        MAX_DATA_PER_SEGMENT);
++    fprintf(stderr, "%s: %d patch segments to be d'loaded from patch base addr: 0x%x\n",
++        __FUNCTION__, no_of_patch_segment,
++    rampatch_patch_info.patch_base_addr);
++
++    /* Initialize the patch base address from the one read from bin file */
++    p_base_addr = rampatch_patch_info.patch_base_addr;
++
++    /*
++    * Depending upon size of the patch payload, download the patches in
++    * segments with a max. size of 239 bytes
++    */
++    for (index = 1; index <= no_of_patch_segment; index++) {
++
++        fprintf(stderr, "%s: Downloading patch segment: %d\n", __FUNCTION__, index);
++
++        /* Frame the HCI CMD PKT to be sent to Controller*/
++        frame_hci_cmd_pkt(cmd, EDL_PATCH_DLD_REQ_CMD, p_base_addr,
++        index, MAX_DATA_PER_SEGMENT);
++
++        /* Total length of the packet to be sent to the Controller */
++        size = (HCI_CMD_IND	+ HCI_COMMAND_HDR_SIZE + cmd[PLEN]);
++
++        /* Initialize the RSP packet everytime to 0 */
++        memset(rsp, 0x0, HCI_MAX_EVENT_SIZE);
++
++        /* Send HCI Command packet to Controller */
++        err = hci_send_vs_cmd(fd, (unsigned char *)cmd, rsp, size);
++        if ( err != size) {
++            fprintf(stderr, "Failed to send the patch payload to the Controller!\n");
++            goto error;
++        }
++
++        /* Read Command Complete Event */
++        err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++        if ( err < 0) {
++            fprintf(stderr, "%s: Failed to downlaod patch segment: %d!\n",
++            __FUNCTION__, index);
++            goto error;
++        }
++        fprintf(stderr, "%s: Successfully downloaded patch segment: %d\n",
++        __FUNCTION__, index);
++    }
++
++    /* Check if any pending patch data to be sent */
++    size = (rampatch_patch_info.patch_length < MAX_DATA_PER_SEGMENT) ?
++        rampatch_patch_info.patch_length :
++        (rampatch_patch_info.patch_length  % MAX_DATA_PER_SEGMENT);
++
++    if (size)
++    {
++        /* Frame the HCI CMD PKT to be sent to Controller*/
++        frame_hci_cmd_pkt(cmd, EDL_PATCH_DLD_REQ_CMD, p_base_addr, index, size);
++
++        /* Initialize the RSP packet everytime to 0 */
++        memset(rsp, 0x0, HCI_MAX_EVENT_SIZE);
++
++        /* Total length of the packet to be sent to the Controller */
++        size = (HCI_CMD_IND	+ HCI_COMMAND_HDR_SIZE + cmd[PLEN]);
++
++        /* Send HCI Command packet to Controller */
++        err = hci_send_vs_cmd(fd, (unsigned char *)cmd, rsp, size);
++        if ( err != size) {
++            fprintf(stderr, "Failed to send the patch payload to the Controller!\n");
++            goto error;
++        }
++
++        /* Read Command Complete Event */
++        err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++        if ( err < 0) {
++            fprintf(stderr, "%s: Failed to downlaod patch segment: %d!\n",
++                __FUNCTION__, index);
++            goto error;
++        }
++
++        fprintf(stderr, "%s: Successfully downloaded patch segment: %d\n",
++        __FUNCTION__, index);
++    }
++
++error:
++    return err;
++}
++
++static int rome_download_rampatch(int fd)
++{
++    int c, size, index, ret = -1;
++
++    fprintf(stderr, "%s:\n", __FUNCTION__);
++
++    /* Get handle to the RAMPATCH binary file */
++    fprintf(stderr, "%s: Getting handle to the RAMPATCH binary file from %s\n", __FUNCTION__, ROME_FW_PATH);
++    file = fopen(ROME_FW_PATH, "r");
++    if (file == NULL) {
++        fprintf(stderr, "%s: Failed to get handle to the RAMPATCH bin file!\n",
++        __FUNCTION__);
++        return -ENFILE;
++    }
++
++    /* Allocate memory for the patch headder info */
++    fprintf(stderr, "%s: Allocating memory for the patch header\n", __FUNCTION__);
++    phdr_buffer = (unsigned char *) malloc(PATCH_HDR_LEN + 1);
++    if (phdr_buffer == NULL) {
++        fprintf(stderr, "%s: Failed to allocate memory for patch header\n",
++        __FUNCTION__);
++        goto phdr_alloc_failed;
++    }
++    for (index = 0; index < PATCH_HDR_LEN + 1; index++)
++        phdr_buffer[index] = 0x0;
++
++    /* Read 28 bytes of patch header information */
++    fprintf(stderr, "%s: Reading patch header info\n", __FUNCTION__);
++    index = 0;
++    do {
++        c = fgetc (file);
++        phdr_buffer[index++] = (unsigned char)c;
++    } while (index != PATCH_HDR_LEN);
++
++    /* Save the patch header info into local structure */
++    fprintf(stderr, "%s: Saving patch hdr. info\n", __FUNCTION__);
++    rome_extract_patch_header_info((unsigned char *)phdr_buffer);
++
++    /* Set the patch header info onto the Controller */
++    ret = rome_edl_set_patch_request(fd);
++    if (ret < 0) {
++        fprintf(stderr, "%s: Error setting the patchheader info!\n", __FUNCTION__);
++        goto pdata_alloc_failed;
++    }
++
++    /* Allocate memory for the patch payload */
++    fprintf(stderr, "%s: Allocating memory for patch payload\n", __FUNCTION__);
++    size = rampatch_patch_info.patch_length;
++    pdata_buffer = (unsigned char *) malloc(size+1);
++    if (pdata_buffer == NULL) {
++        fprintf(stderr, "%s: Failed to allocate memory for patch payload\n",
++            __FUNCTION__);
++        goto pdata_alloc_failed;
++    }
++    for (index = 0; index < size+1; index++)
++        pdata_buffer[index] = 0x0;
++
++    /* Read the patch data from Rampatch binary image */
++    fprintf(stderr, "%s: Reading patch payload from RAMPATCH file\n", __FUNCTION__);
++    index = 0;
++    do {
++        c = fgetc (file);
++        pdata_buffer[index++] = (unsigned char)c;
++    } while (c != EOF);
++
++    /* Downloading patches in segments to controller */
++    ret = rome_edl_patch_download_request(fd);
++    if (ret < 0) {
++        fprintf(stderr, "%s: Error downloading patch segments!\n", __FUNCTION__);
++        goto cleanup;
++    }
++cleanup:
++    free(pdata_buffer);
++pdata_alloc_failed:
++    free(phdr_buffer);
++phdr_alloc_failed:
++    fclose(file);
++
++    return ret;
++}
++
++int rome_attach_rampatch(int fd)
++{
++    int size, err;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++
++    /* Frame the HCI CMD to be sent to the Controller */
++    frame_hci_cmd_pkt(cmd, EDL_PATCH_ATCH_REQ_CMD, 0,
++        -1, EDL_PATCH_CMD_LEN);
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND	+ HCI_COMMAND_HDR_SIZE + cmd[PLEN]);
++
++    /* Send HCI Command packet to Controller */
++    err = hci_send_vs_cmd(fd, (unsigned char *)cmd, rsp, size);
++    if ( err != size) {
++        fprintf(stderr, "Failed to attach the patch payload to the Controller!\n");
++        goto error;
++    }
++
++    /* Read Command Complete Event */
++    err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++    if ( err < 0) {
++        fprintf(stderr, "%s: Failed to attach the patch segment(s)\n", __FUNCTION__);
++        goto error;
++    }
++error:
++    return err;
++}
++
++int rome_rampatch_reset(int fd)
++{
++    int size, err = 0;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    struct timespec tm = { 0, 100*1000*1000 }; /* 100 ms */
++
++    /* Frame the HCI CMD to be sent to the Controller */
++    frame_hci_cmd_pkt(cmd, EDL_PATCH_RST_REQ_CMD, 0,
++                                        -1, EDL_PATCH_CMD_LEN);
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND	+ HCI_COMMAND_HDR_SIZE + EDL_PATCH_CMD_LEN);
++
++    /* Send HCI Command packet to Controller */
++    err = write(fd, cmd, size);
++    if (err != size) {
++        fprintf(stderr, "%s: Send failed with ret value: %d\n", __FUNCTION__, err);
++        goto error;
++    }
++
++    /*
++    * Controller doesn't sends any response for the patch reset
++    * command. HOST has to wait for 100ms before proceeding.
++    */
++    nanosleep(&tm, NULL);
++
++error:
++    return err;
++}
++
++int get_value_from_config(char *file_path,char *param)
++{
++    FILE *pfile = NULL;
++    char *line = NULL;
++    char *pch = NULL;
++    char param_str[PARAM_LEN];
++    int bytes_read = 0, position;
++    int ret = -1;
++
++    if (!file_path || !param) {
++        fprintf(stderr,"Invalid arguments\n");
++        return -EINVAL;
++    }
++
++    pfile = fopen(file_path, "r" );
++    if (!pfile) {
++        fprintf(stderr, "Failed to open %s\n", file_path);
++        return ret;
++    }
++
++    while (getline(&line, &bytes_read, pfile) > 0 ) {
++        if (line[0] != '#'  && line[0] != '\n') {
++            pch = memchr(line, '=', strlen(line));
++            if (pch != NULL) {
++                position = pch - line;
++                strlcpy(param_str, line, sizeof(param_str));
++                if (position >= sizeof(param_str))
++                    position = sizeof(param_str) - 1;
++                if (strncmp(param_str, param, position) == 0) {
++                    ret = atoi(pch + 1);
++                    break;
++                }
++            }
++        }
++    }
++    /* getline() will allocate a buffer for storing the line. */
++    free(line);
++    fclose(pfile);
++    return ret;
++}
++
++int rome_get_tlv_file(char *file_path)
++{
++    FILE * pFile;
++    long fileSize;
++    int readSize, nvm_length, nvm_index, i;
++    unsigned short nvm_tag_len;
++    tlv_patch_info *ptlv_header;
++    tlv_nvm_hdr *nvm_ptr;
++    unsigned char data_buf[PRINT_BUF_SIZE]={0,};
++    unsigned char *nvm_byte_ptr;
++    unsigned char bdaddr[6];
++    unsigned short pcm_value, ibs_value;
++
++    fprintf(stderr, "File Open (%s)\n", file_path);
++    pFile = fopen ( file_path , "r" );
++    if (pFile==NULL) {;
++        fprintf(stderr, "%s File Open Fail\n", file_path);
++        return -1;
++    }
++
++    /* Get File Size */
++    fseek (pFile , 0 , SEEK_END);
++
++    if((fileSize = ftell(pFile)) < 0) {
++        fprintf(stderr, "%s: fail to get current file position\n", file_path);
++        fclose(pFile);
++        return -1;
++    }
++
++    if(fileSize == 0) {
++        fprintf(stderr, "%s: no content in the file\n", file_path);
++        fclose(pFile);
++        return -1;
++    }
++
++    rewind (pFile);
++
++    pdata_buffer = (unsigned char*) malloc (sizeof(char)*fileSize);
++    if (pdata_buffer == NULL) {
++        fprintf(stderr, "Allocated Memory failed\n");
++        fclose (pFile);
++        return -1;
++    }
++
++    /* Copy file into allocated buffer */
++    readSize = fread (pdata_buffer,1,fileSize,pFile);
++
++    /* File Close */
++    fclose (pFile);
++
++    if (readSize != fileSize) {
++        fprintf(stderr, "Read file size(%d) not matched with actual file size (%ld bytes)\n",readSize,fileSize);
++        return -1;
++    }
++
++    ptlv_header = (tlv_patch_info *) pdata_buffer;
++
++    /* To handle different event between rampatch and NVM */
++    gTlv_type = ptlv_header->tlv_type;
++    gtlv_dwndcfg = ptlv_header->tlv.patch.dwnd_cfg;
++
++    if(ptlv_header->tlv_type == TLV_TYPE_PATCH){
++        fprintf(stderr, "====================================================\n");
++        fprintf(stderr, "TLV Type\t\t\t : 0x%x\n", ptlv_header->tlv_type);
++        fprintf(stderr, "Length\t\t\t : %d bytes\n", (ptlv_header->tlv_length1) |
++                                                    (ptlv_header->tlv_length2 << 8) |
++                                                    (ptlv_header->tlv_length3 << 16));
++        fprintf(stderr, "Total Length\t\t\t : %d bytes\n", ptlv_header->tlv.patch.tlv_data_len);
++        fprintf(stderr, "Patch Data Length\t\t\t : %d bytes\n",ptlv_header->tlv.patch.tlv_patch_data_len);
++        fprintf(stderr, "Signing Format Version\t : 0x%x\n", ptlv_header->tlv.patch.sign_ver);
++        fprintf(stderr, "Signature Algorithm\t\t : 0x%x\n", ptlv_header->tlv.patch.sign_algorithm);
++        fprintf(stderr, "Event Handling\t\t\t : 0x%x", ptlv_header->tlv.patch.dwnd_cfg);
++        fprintf(stderr, "Reserved\t\t\t : 0x%x\n", ptlv_header->tlv.patch.reserved1);
++        fprintf(stderr, "Product ID\t\t\t : 0x%04x\n", ptlv_header->tlv.patch.prod_id);
++        fprintf(stderr, "Rom Build Version\t\t : 0x%04x\n", ptlv_header->tlv.patch.build_ver);
++        fprintf(stderr, "Patch Version\t\t : 0x%04x\n", ptlv_header->tlv.patch.patch_ver);
++        fprintf(stderr, "Reserved\t\t\t : 0x%x\n", ptlv_header->tlv.patch.reserved2);
++        fprintf(stderr, "Patch Entry Address\t\t : 0x%x\n", (ptlv_header->tlv.patch.patch_entry_addr));
++        fprintf(stderr, "====================================================\n");
++
++    } else if(ptlv_header->tlv_type == TLV_TYPE_NVM) {
++        fprintf(stderr, "====================================================\n");
++        fprintf(stderr, "TLV Type\t\t\t : 0x%x\n", ptlv_header->tlv_type);
++        fprintf(stderr, "Length\t\t\t : %d bytes\n",  nvm_length = (ptlv_header->tlv_length1) |
++                                                    (ptlv_header->tlv_length2 << 8) |
++                                                    (ptlv_header->tlv_length3 << 16));
++
++        if(nvm_length <= 0)
++            return readSize;
++
++       for(nvm_byte_ptr=(unsigned char *)(nvm_ptr = &(ptlv_header->tlv.nvm)), nvm_index=0;
++             nvm_index < nvm_length ; nvm_ptr = (tlv_nvm_hdr *) nvm_byte_ptr)
++       {
++            fprintf(stderr, "TAG ID\t\t\t : %d\n", nvm_ptr->tag_id);
++            fprintf(stderr, "TAG Length\t\t\t : %d\n", nvm_tag_len = nvm_ptr->tag_len);
++            fprintf(stderr, "TAG Pointer\t\t\t : %d\n", nvm_ptr->tag_ptr);
++            fprintf(stderr, "TAG Extended Flag\t\t : %d\n", nvm_ptr->tag_ex_flag);
++
++            /* Increase nvm_index to NVM data */
++            nvm_index+=sizeof(tlv_nvm_hdr);
++            nvm_byte_ptr+=sizeof(tlv_nvm_hdr);
++
++            /* Write BD Address */
++            if(nvm_ptr->tag_id == TAG_NUM_2 && read_bd_address(&bdaddr) == 0) {
++                memcpy(nvm_byte_ptr, bdaddr, 6);
++                fprintf(stderr, "Overriding default BD ADDR with user"
++                  " programmed BD Address: %02x:%02x:%02x:%02x:%02x:%02x\n",
++                    *nvm_byte_ptr, *(nvm_byte_ptr+1), *(nvm_byte_ptr+2),
++                    *(nvm_byte_ptr+3), *(nvm_byte_ptr+4), *(nvm_byte_ptr+5));
++            }
++
++	    if (nvm_ptr->tag_id == TAG_NUM_17) {
++		if ((ibs_value =
++			get_value_from_config(FW_CONFIG_FILE_PATH, "IBS")) >= 0) {
++			if (ibs_value == FWCONF_IBS_DISABLE) {
++				nvm_byte_ptr[FWCONF_IBS_VAL_OFFSET] &=
++					(~(FWCONF_IBS_ENABLE <<
++							FWCONF_IBS_VAL_BIT));
++			} else if (ibs_value == FWCONF_IBS_ENABLE) {
++				nvm_byte_ptr[FWCONF_IBS_VAL_OFFSET] |=
++					(FWCONF_IBS_ENABLE <<
++							FWCONF_IBS_VAL_BIT);
++			}
++		}
++	    }
++            /* Read from file and check what PCM Configuration is required:
++             * Master = 0 /Slave = 1 */
++            /* Override PCM configuration */
++            if (nvm_ptr->tag_id == TAG_NUM_44) {
++                if ((pcm_value =
++                    get_value_from_config(FW_CONFIG_FILE_PATH, "PCM")) >= 0) {
++
++                    if (pcm_value == FWCONF_PCM_SLAVE) {
++                        nvm_byte_ptr[FWCONF_PCM_MS_OFFSET_1] |=
++					(1 << FWCONF_PCM_ROLE_BIT_OFFSET);
++                        nvm_byte_ptr[FWCONF_PCM_MS_OFFSET_2] |=
++					(1 << FWCONF_PCM_ROLE_BIT_OFFSET);
++                    } else if (pcm_value == FWCONF_PCM_MASTER) {
++                        nvm_byte_ptr[FWCONF_PCM_MS_OFFSET_1] &=
++					(~(1 << FWCONF_PCM_ROLE_BIT_OFFSET));
++                        nvm_byte_ptr[FWCONF_PCM_MS_OFFSET_2] &=
++					(~(1 << FWCONF_PCM_ROLE_BIT_OFFSET));
++                    }
++                }
++            }
++
++            for(i =0;(i<nvm_ptr->tag_len && (i*3 + 2) < PRINT_BUF_SIZE);i++)
++                snprintf((char *) data_buf, PRINT_BUF_SIZE, "%s%.02x ",
++                    (char *)data_buf, *(nvm_byte_ptr + i));
++
++            fprintf(stderr, "TAG Data\t\t\t : %s\n", data_buf);
++
++            /* Clear buffer */
++            memset(data_buf, 0x0, PRINT_BUF_SIZE);
++
++            /* increased by tag_len */
++            nvm_index+=nvm_ptr->tag_len;
++            nvm_byte_ptr +=nvm_ptr->tag_len;
++        }
++
++        fprintf(stderr, "====================================================\n");
++
++    } else {
++        fprintf(stderr, "TLV Header type is unknown (%d) \n", ptlv_header->tlv_type);
++    }
++
++    return readSize;
++}
++
++int rome_tlv_dnld_segment(int fd, int index, int seg_size, unsigned char wait_cc_evt)
++{
++    int size=0, err = -1;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++
++    fprintf(stderr, "%s: Downloading TLV Patch segment no.%d, size:%d\n", __FUNCTION__, index, seg_size);
++
++    /* Frame the HCI CMD PKT to be sent to Controller*/
++    frame_hci_cmd_pkt(cmd, EDL_PATCH_TLV_REQ_CMD, 0, index, seg_size);
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND + HCI_COMMAND_HDR_SIZE + cmd[PLEN]);
++
++    /* Initialize the RSP packet everytime to 0 */
++    memset(rsp, 0x0, HCI_MAX_EVENT_SIZE);
++
++    /* Send HCI Command packet to Controller */
++    err = hci_send_vs_cmd(fd, (unsigned char *)cmd, rsp, size);
++    if ( err != size) {
++        fprintf(stderr, "Failed to send the patch payload to the Controller! 0x%x\n", err);
++        return err;
++    }
++
++    if(wait_cc_evt) {
++        err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++        if ( err < 0) {
++            fprintf(stderr, "%s: Failed to downlaod patch segment: %d!\n",  __FUNCTION__, index);
++            return err;
++        }
++    }
++
++    fprintf(stderr, "%s: Successfully downloaded patch segment: %d\n", __FUNCTION__, index);
++    return err;
++}
++
++int rome_tlv_dnld_req(int fd, int tlv_size)
++{
++    int  total_segment, remain_size, i, err = -1;
++    unsigned char wait_cc_evt = FALSE;
++
++    total_segment = tlv_size/MAX_SIZE_PER_TLV_SEGMENT;
++    remain_size = (tlv_size < MAX_SIZE_PER_TLV_SEGMENT)?\
++        tlv_size: (tlv_size%MAX_SIZE_PER_TLV_SEGMENT);
++
++    fprintf(stderr, "%s: TLV size: %d, Total Seg num: %d, remain size: %d\n",
++        __FUNCTION__,tlv_size, total_segment, remain_size);
++
++    if (gTlv_type == TLV_TYPE_PATCH) {
++       /* Prior to Rome version 3.2(including inital few rampatch release of
++        * Rome 3.2), the event handling mechanism is ROME_SKIP_EVT_NONE. After
++        * few release of rampatch for Rome 3.2, the mechamism is changed to
++        * ROME_SKIP_EVT_VSE_CC. Rest of the mechanism is not used for now
++        */
++       switch(gtlv_dwndcfg)
++       {
++           case ROME_SKIP_EVT_NONE:
++              wait_vsc_evt = TRUE;
++              wait_cc_evt = TRUE;
++              fprintf(stderr, "%s: Event handling type: ROME_SKIP_EVT_NONE", __func__);
++              break;
++           case ROME_SKIP_EVT_VSE_CC:
++              wait_vsc_evt = FALSE;
++              wait_cc_evt = FALSE;
++              fprintf(stderr, "%s: Event handling type: ROME_SKIP_EVT_VSE_CC", __func__);
++              break;
++           /* Not handled for now */
++           case ROME_SKIP_EVT_VSE:
++           case ROME_SKIP_EVT_CC:
++           default:
++              fprintf(stderr, "%s: Unsupported Event handling: %d", __func__, gtlv_dwndcfg);
++              break;
++       }
++    } else {
++        wait_vsc_evt = TRUE;
++        wait_cc_evt = TRUE;
++    }
++
++    for(i = 0; i < total_segment; i++) {
++        if((i+1) == total_segment) {
++             if ((rome_ver >= ROME_VER_1_1) && (rome_ver < ROME_VER_3_2) &&
++                 (gTlv_type == TLV_TYPE_PATCH)) {
++               /* If the Rome version is from 1.1 to 3.1
++                * 1. No CCE for the last command segment but all other segment
++                * 2. All the command segments get VSE including the last one
++                */
++                wait_cc_evt = !remain_size ? FALSE: TRUE;
++             } else if ((rome_ver == ROME_VER_3_2) && (gTlv_type == TLV_TYPE_PATCH)) {
++                /* If the Rome version is 3.2
++                 * 1. None of the command segments receive CCE
++                 * 2. No command segments receive VSE except the last one
++                 * 3. If gtlv_dwndcfg is ROME_SKIP_EVT_NONE then the logic is
++                 *    same as Rome 2.1, 2.2, 3.0
++                 */
++                 if (gtlv_dwndcfg == ROME_SKIP_EVT_NONE) {
++                    wait_cc_evt = !remain_size ? FALSE: TRUE;
++                 } else if (gtlv_dwndcfg == ROME_SKIP_EVT_VSE_CC) {
++                    wait_vsc_evt = !remain_size ? TRUE: FALSE;
++                 }
++             }
++        }
++
++        if((err = rome_tlv_dnld_segment(fd, i, MAX_SIZE_PER_TLV_SEGMENT, wait_cc_evt )) < 0)
++            goto error;
++    }
++
++    if ((rome_ver >= ROME_VER_1_1) && (rome_ver < ROME_VER_3_2) && (gTlv_type == TLV_TYPE_PATCH)) {
++       /* If the Rome version is from 1.1 to 3.1
++        * 1. No CCE for the last command segment but all other segment
++        * 2. All the command segments get VSE including the last one
++        */
++        wait_cc_evt = remain_size ? FALSE: TRUE;
++    } else if ((rome_ver == ROME_VER_3_2) && (gTlv_type == TLV_TYPE_PATCH)) {
++        /* If the Rome version is 3.2
++         * 1. None of the command segments receive CCE
++         * 2. No command segments receive VSE except the last one
++         * 3. If gtlv_dwndcfg is ROME_SKIP_EVT_NONE then the logic is
++         *    same as Rome 2.1, 2.2, 3.0
++         */
++        if (gtlv_dwndcfg == ROME_SKIP_EVT_NONE) {
++           wait_cc_evt = remain_size ? FALSE: TRUE;
++        } else if (gtlv_dwndcfg == ROME_SKIP_EVT_VSE_CC) {
++           wait_vsc_evt = remain_size ? TRUE: FALSE;
++        }
++    }
++
++    if(remain_size) err =rome_tlv_dnld_segment(fd, i, remain_size, wait_cc_evt);
++
++error:
++    return err;
++}
++
++int rome_download_tlv_file(int fd)
++{
++    int tlv_size, err = -1;
++
++    /* Rampatch TLV file Downloading */
++    pdata_buffer = NULL;
++
++    if((tlv_size = rome_get_tlv_file(rampatch_file_path)) < 0)
++        goto error;
++
++    if((err =rome_tlv_dnld_req(fd, tlv_size)) <0 )
++        goto error;
++
++    if (pdata_buffer != NULL){
++        free (pdata_buffer);
++        pdata_buffer = NULL;
++    }
++
++    /* NVM TLV file Downloading */
++    if((tlv_size = rome_get_tlv_file(nvm_file_path)) < 0)
++        goto error;
++
++    if((err =rome_tlv_dnld_req(fd, tlv_size)) <0 )
++        goto error;
++
++error:
++    if (pdata_buffer != NULL)
++        free (pdata_buffer);
++
++    return err;
++}
++
++int rome_1_0_nvm_tag_dnld(int fd)
++{
++    int i, size, err = 0;
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++
++#if (NVM_VERSION >= ROME_1_0_100019)
++    unsigned char cmds[MAX_TAG_CMD][HCI_MAX_CMD_SIZE] =
++    {
++        /* Tag 2 */ /* BD Address */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     9,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     2,
++            /* Tag Len */      6,
++            /* Tag Value */   0x77,0x78,0x23,0x01,0x56,0x22
++         },
++        /* Tag 6 */ /* Bluetooth Support Features */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     11,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     6,
++            /* Tag Len */      8,
++            /* Tag Value */   0xFF,0xFE,0x8B,0xFE,0xD8,0x3F,0x5B,0x8B
++         },
++        /* Tag 17 */ /* HCI Transport Layer Setting */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     11,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     17,
++            /* Tag Len */      8,
++            /* Tag Value */   0x82,0x01,0x0E,0x08,0x04,0x32,0x0A,0x00
++         },
++        /* Tag 35 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     58,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     35,
++            /* Tag Len */      55,
++            /* Tag Value */   0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x58, 0x59,
++                                      0x0E, 0x0E, 0x16, 0x16, 0x16, 0x1E, 0x26, 0x5F, 0x2F, 0x5F,
++                                      0x0E, 0x0E, 0x16, 0x16, 0x16, 0x1E, 0x26, 0x5F, 0x2F, 0x5F,
++                                      0x0C, 0x18, 0x14, 0x24, 0x40, 0x4C, 0x70, 0x80, 0x80, 0x80,
++                                      0x0C, 0x18, 0x14, 0x24, 0x40, 0x4C, 0x70, 0x80, 0x80, 0x80,
++                                      0x1B, 0x14, 0x01, 0x04, 0x48
++         },
++        /* Tag 36 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     15,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     36,
++            /* Tag Len */      12,
++            /* Tag Value */   0x0F,0x00,0x03,0x03,0x03,0x03,0x00,0x00,0x03,0x03,0x04,0x00
++         },
++        /* Tag 39 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     7,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     39,
++            /* Tag Len */      4,
++            /* Tag Value */   0x12,0x00,0x00,0x00
++         },
++        /* Tag 41 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     91,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     41,
++            /* Tag Len */      88,
++            /* Tag Value */   0x15, 0x00, 0x00, 0x00, 0xF6, 0x02, 0x00, 0x00, 0x76, 0x00,
++                                      0x1E, 0x00, 0x29, 0x02, 0x1F, 0x00, 0x61, 0x00, 0x1A, 0x00,
++                                      0x76, 0x00, 0x1E, 0x00, 0x7D, 0x00, 0x40, 0x00, 0x91, 0x00,
++                                      0x06, 0x00, 0x92, 0x00, 0x03, 0x00, 0xA6, 0x01, 0x50, 0x00,
++                                      0xAA, 0x01, 0x15, 0x00, 0xAB, 0x01, 0x0A, 0x00, 0xAC, 0x01,
++                                      0x00, 0x00, 0xB0, 0x01, 0xC5, 0x00, 0xB3, 0x01, 0x03, 0x00,
++                                      0xB4, 0x01, 0x13, 0x00, 0xB5, 0x01, 0x0C, 0x00, 0xC5, 0x01,
++                                      0x0D, 0x00, 0xC6, 0x01, 0x10, 0x00, 0xCA, 0x01, 0x2B, 0x00,
++                                      0xCB, 0x01, 0x5F, 0x00, 0xCC, 0x01, 0x48, 0x00
++         },
++        /* Tag 42 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     63,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     42,
++            /* Tag Len */      60,
++            /* Tag Value */   0xD7, 0xC0, 0x00, 0x00, 0x8F, 0x5C, 0x02, 0x00, 0x80, 0x47,
++                                      0x60, 0x0C, 0x70, 0x4C, 0x00, 0x00, 0x00, 0x01, 0x1F, 0x01,
++                                      0x42, 0x01, 0x69, 0x01, 0x95, 0x01, 0xC7, 0x01, 0xFE, 0x01,
++                                      0x3D, 0x02, 0x83, 0x02, 0xD1, 0x02, 0x29, 0x03, 0x00, 0x0A,
++                                      0x10, 0x00, 0x1F, 0x00, 0x3F, 0x00, 0x7F, 0x00, 0xFD, 0x00,
++                                      0xF9, 0x01, 0xF1, 0x03, 0xDE, 0x07, 0x00, 0x00, 0x9A, 0x01
++         },
++        /* Tag 84 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     153,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     84,
++            /* Tag Len */      150,
++            /* Tag Value */   0x7C, 0x6A, 0x59, 0x47, 0x19, 0x36, 0x35, 0x25, 0x25, 0x28,
++                                      0x2C, 0x2B, 0x2B, 0x28, 0x2C, 0x28, 0x29, 0x28, 0x29, 0x28,
++                                      0x29, 0x29, 0x2C, 0x29, 0x2C, 0x29, 0x2C, 0x28, 0x29, 0x28,
++                                      0x29, 0x28, 0x29, 0x2A, 0x00, 0x00, 0x2C, 0x2A, 0x2C, 0x18,
++                                      0x98, 0x98, 0x98, 0x98, 0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x1E,
++                                      0x1E, 0x13, 0x1E, 0x1E, 0x1E, 0x1E, 0x13, 0x13, 0x11, 0x13,
++                                      0x1E, 0x1E, 0x13, 0x12, 0x12, 0x12, 0x11, 0x12, 0x1F, 0x12,
++                                      0x12, 0x12, 0x10, 0x0C, 0x18, 0x0D, 0x01, 0x01, 0x01, 0x01,
++                                      0x01, 0x01, 0x01, 0x0C, 0x01, 0x01, 0x01, 0x01, 0x0D, 0x0D,
++                                      0x0E, 0x0D, 0x01, 0x01, 0x0D, 0x0D, 0x0D, 0x0D, 0x0F, 0x0D,
++                                      0x10, 0x0D, 0x0D, 0x0D, 0x0D, 0x10, 0x05, 0x10, 0x03, 0x00,
++                                      0x7E, 0x7B, 0x7B, 0x72, 0x71, 0x50, 0x50, 0x50, 0x00, 0x40,
++                                      0x60, 0x60, 0x30, 0x08, 0x02, 0x0F, 0x00, 0x01, 0x00, 0x00,
++                                      0x00, 0x00, 0x00, 0x00, 0x08, 0x16, 0x16, 0x08, 0x08, 0x00,
++                                      0x00, 0x00, 0x1E, 0x34, 0x2B, 0x1B, 0x23, 0x2B, 0x15, 0x0D
++         },
++        /* Tag 85 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     119,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     85,
++            /* Tag Len */      116,
++            /* Tag Value */   0x03, 0x00, 0x38, 0x00, 0x45, 0x77, 0x00, 0xE8, 0x00, 0x59,
++                                      0x01, 0xCA, 0x01, 0x3B, 0x02, 0xAC, 0x02, 0x1D, 0x03, 0x8E,
++                                      0x03, 0x00, 0x89, 0x01, 0x0E, 0x02, 0x5C, 0x02, 0xD7, 0x02,
++                                      0xF8, 0x08, 0x01, 0x00, 0x1F, 0x00, 0x0A, 0x02, 0x55, 0x02,
++                                      0x00, 0x35, 0x00, 0x00, 0x00, 0x00, 0x2A, 0xD7, 0x00, 0x00,
++                                      0x00, 0x1E, 0xDE, 0x00, 0x00, 0x00, 0x14, 0x0F, 0x0A, 0x0F,
++                                      0x0A, 0x0C, 0x0C, 0x0C, 0x0C, 0x04, 0x04, 0x04, 0x0C, 0x0C,
++                                      0x0C, 0x0C, 0x06, 0x06, 0x00, 0x02, 0x02, 0x02, 0x02, 0x02,
++                                      0x01, 0x00, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00,
++                                      0x06, 0x0F, 0x14, 0x05, 0x47, 0xCF, 0x77, 0x00, 0x00, 0x00,
++                                      0x00, 0x00, 0x00, 0xAC, 0x7C, 0xFF, 0x40, 0x00, 0x00, 0x00,
++                                      0x12, 0x04, 0x04, 0x01, 0x04, 0x03
++         },
++        {TAG_END}
++    };
++#elif (NVM_VERSION == ROME_1_0_6002)
++    unsigned char cmds[MAX_TAG_CMD][HCI_MAX_CMD_SIZE] =
++    {
++        /* Tag 2 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     9,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     2,
++            /* Tag Len */      6,
++            /* Tag Value */   0x77,0x78,0x23,0x01,0x56,0x22 /* BD Address */
++         },
++        /* Tag 6 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     11,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     6,
++            /* Tag Len */      8,
++            /* Tag Value */   0xFF,0xFE,0x8B,0xFE,0xD8,0x3F,0x5B,0x8B
++         },
++        /* Tag 17 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     11,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     17,
++            /* Tag Len */      8,
++            /* Tag Value */   0x82,0x01,0x0E,0x08,0x04,0x32,0x0A,0x00
++         },
++        /* Tag 36 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     15,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     36,
++            /* Tag Len */      12,
++            /* Tag Value */   0x0F,0x00,0x03,0x03,0x03,0x03,0x00,0x00,0x03,0x03,0x04,0x00
++         },
++
++        /* Tag 39 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     7,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     39,
++            /* Tag Len */      4,
++            /* Tag Value */   0x12,0x00,0x00,0x00
++         },
++
++        /* Tag 41 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     199,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     41,
++            /* Tag Len */      196,
++            /* Tag Value */   0x30,0x00,0x00,0x00,0xD5,0x00,0x0E,0x00,0xD6,0x00,0x0E,0x00,
++                                      0xD7,0x00,0x16,0x00,0xD8,0x00,0x16,0x00,0xD9,0x00,0x16,0x00,
++                                      0xDA,0x00,0x1E,0x00,0xDB,0x00,0x26,0x00,0xDC,0x00,0x5F,0x00,
++                                      0xDD,0x00,0x2F,0x00,0xDE,0x00,0x5F,0x00,0xE0,0x00,0x0E,0x00,
++                                      0xE1,0x00,0x0E,0x00,0xE2,0x00,0x16,0x00,0xE3,0x00,0x16,0x00,
++                                      0xE4,0x00,0x16,0x00,0xE5,0x00,0x1E,0x00,0xE6,0x00,0x26,0x00,
++                                      0xE7,0x00,0x5F,0x00,0xE8,0x00,0x2F,0x00,0xE9,0x00,0x5F,0x00,
++                                      0xEC,0x00,0x0C,0x00,0xED,0x00,0x08,0x00,0xEE,0x00,0x14,0x00,
++                                      0xEF,0x00,0x24,0x00,0xF0,0x00,0x40,0x00,0xF1,0x00,0x4C,0x00,
++                                      0xF2,0x00,0x70,0x00,0xF3,0x00,0x80,0x00,0xF4,0x00,0x80,0x00,
++                                      0xF5,0x00,0x80,0x00,0xF8,0x00,0x0C,0x00,0xF9,0x00,0x18,0x00,
++                                      0xFA,0x00,0x14,0x00,0xFB,0x00,0x24,0x00,0xFC,0x00,0x40,0x00,
++                                      0xFD,0x00,0x4C,0x00,0xFE,0x00,0x70,0x00,0xFF,0x00,0x80,0x00,
++                                      0x00,0x01,0x80,0x00,0x01,0x01,0x80,0x00,0x04,0x01,0x1B,0x00,
++                                      0x05,0x01,0x14,0x00,0x06,0x01,0x01,0x00,0x07,0x01,0x04,0x00,
++                                      0x08,0x01,0x00,0x00,0x09,0x01,0x00,0x00,0x0A,0x01,0x03,0x00,
++                                      0x0B,0x01,0x03,0x00
++         },
++
++        /* Tag 44 */
++        {  /* Packet Type */HCI_COMMAND_PKT,
++            /* Opcode */       0x0b,0xfc,
++            /* Total Len */     44,
++            /* NVM CMD */    NVM_ACCESS_SET,
++            /* Tag Num */     44,
++            /* Tag Len */      41,
++            /* Tag Value */   0x6F,0x0A,0x00,0x00,0x00,0x00,0x00,0x50,0xFF,0x10,0x02,0x02,
++                                      0x01,0x00,0x14,0x01,0x06,0x28,0xA0,0x62,0x03,0x64,0x01,0x01,
++                                      0x0A,0x00,0x00,0x00,0x00,0x00,0x00,0xA0,0xFF,0x10,0x02,0x01,
++                                      0x00,0x14,0x01,0x02,0x03
++         },
++        {TAG_END}
++    };
++#endif
++
++    fprintf(stderr, "%s: Start sending NVM Tags (ver: 0x%x)\n", __FUNCTION__, (unsigned int) NVM_VERSION);
++
++    for (i=0; (i < MAX_TAG_CMD) && (cmds[i][0] != TAG_END); i++)
++    {
++        /* Write BD Address */
++        if(cmds[i][TAG_NUM_OFFSET] == TAG_NUM_2){
++            memcpy(&cmds[i][TAG_BDADDR_OFFSET], vnd_local_bd_addr, 6);
++            fprintf(stderr, "BD Address: %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
++                cmds[i][TAG_BDADDR_OFFSET ], cmds[i][TAG_BDADDR_OFFSET + 1],
++                cmds[i][TAG_BDADDR_OFFSET + 2], cmds[i][TAG_BDADDR_OFFSET + 3],
++                cmds[i][TAG_BDADDR_OFFSET + 4], cmds[i][TAG_BDADDR_OFFSET + 5]);
++        }
++        size = cmds[i][3] + HCI_COMMAND_HDR_SIZE + 1;
++        /* Send HCI Command packet to Controller */
++        err = hci_send_vs_cmd(fd, (unsigned char *)&cmds[i][0], rsp, size);
++        if ( err != size) {
++            fprintf(stderr, "Failed to attach the patch payload to the Controller!\n");
++            goto error;
++        }
++
++        /* Read Command Complete Event - This is extra routine for ROME 1.0. From ROM 2.0, it should be removed. */
++        err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++        if ( err < 0) {
++            fprintf(stderr, "%s: Failed to get patch version(s)\n", __FUNCTION__);
++            goto error;
++        }
++    }
++
++error:
++    return err;
++}
++
++
++
++int rome_patch_ver_req(int fd)
++{
++    int size, err = 0;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++
++    /* Frame the HCI CMD to be sent to the Controller */
++    frame_hci_cmd_pkt(cmd, EDL_PATCH_VER_REQ_CMD, 0,
++    -1, EDL_PATCH_CMD_LEN);
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND + HCI_COMMAND_HDR_SIZE + EDL_PATCH_CMD_LEN);
++
++    /* Send HCI Command packet to Controller */
++    err = hci_send_vs_cmd(fd, (unsigned char *)cmd, rsp, size);
++    if ( err != size) {
++        fprintf(stderr, "Failed to attach the patch payload to the Controller!\n");
++        goto error;
++    }
++
++    /* Read Command Complete Event - This is extra routine for ROME 1.0. From ROM 2.0, it should be removed. */
++    err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++    if ( err < 0) {
++        fprintf(stderr, "%s: Failed to get patch version(s)\n", __FUNCTION__);
++        goto error;
++    }
++error:
++    return err;
++
++}
++
++static void flow_control(int fd, int opt)
++{
++    struct termios c_opt;
++
++    ioctl(fd, TIOCMGET, &c_opt);
++    c_opt.c_cc[VTIME] = 0; /* inter-character timer unused */
++    c_opt.c_cc[VMIN] = 0; /* blocking read until 8 chars received */
++    c_opt.c_cflag &= ~CSIZE;
++    c_opt.c_cflag |= (CS8 | CLOCAL | CREAD);
++    if (opt == MSM_ENABLE_FLOW_CTRL)
++        c_opt.c_cflag |= CRTSCTS;
++    else if (opt == MSM_DISABLE_FLOW_CTRL)
++        c_opt.c_cflag &= ~CRTSCTS;
++    else {
++        fprintf(stderr, "%s: Incorrect option passed for TIOCMSET\n", __func__);
++        return;
++    }
++    c_opt.c_iflag = IGNPAR;
++    c_opt.c_oflag = 0;
++    c_opt.c_lflag = 0;
++    ioctl(fd, TIOCMSET, &c_opt);
++}
++
++
++int rome_set_baudrate_req(int fd)
++{
++   int size, err = 0;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++    hci_command_hdr *cmd_hdr;
++    int flags;
++
++    memset(cmd, 0x0, HCI_MAX_CMD_SIZE);
++
++    cmd_hdr = (void *) (cmd + 1);
++    cmd[0]  = HCI_COMMAND_PKT;
++    cmd_hdr->opcode = cmd_opcode_pack(HCI_VENDOR_CMD_OGF, EDL_SET_BAUDRATE_CMD_OCF);
++    cmd_hdr->plen     = VSC_SET_BAUDRATE_REQ_LEN;
++    cmd[4]  = BAUDRATE_3000000;
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND + HCI_COMMAND_HDR_SIZE + VSC_SET_BAUDRATE_REQ_LEN);
++
++    /* Flow off during baudrate change */
++    flow_control(fd, MSM_DISABLE_FLOW_CTRL);
++
++    /* Send the HCI command packet to UART for transmission */
++    fprintf(stderr, "%s: HCI CMD: 0x%x 0x%x 0x%x 0x%x 0x%x\n", __FUNCTION__, cmd[0], cmd[1], cmd[2], cmd[3],cmd[4]) ;
++    err = write(fd, cmd, size);
++    if (err != size) {
++        fprintf(stderr, "%s: Send failed with ret value: %d\n", __FUNCTION__, err);
++        goto error;
++    }
++    /* Change Local UART baudrate to high speed UART */
++    userial_vendor_set_baud(USERIAL_BAUD_3M);
++
++    /* Flow on after changing local uart baudrate */
++    flow_control(fd, MSM_ENABLE_FLOW_CTRL);
++
++    /* Check for response from the Controller */
++    if ((err =read_vs_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE)) < 0) {
++            fprintf(stderr, "%s: Failed to get HCI-VS Event from SOC\n", __FUNCTION__);
++            goto error;
++    }
++
++    fprintf(stderr, "%s: Received HCI-Vendor Specific Event from SOC\n", __FUNCTION__);
++
++    /* Wait for command complete event */
++    err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++    if ( err < 0) {
++        fprintf(stderr, "%s: Failed to set patch info on Controller\n", __FUNCTION__);
++        goto error;
++    }
++        fprintf(stderr, "%s\n", __FUNCTION__);
++error:
++    return err;
++
++}
++
++
++int rome_hci_reset_req(int fd)
++{
++    int size, err = 0;
++    unsigned char cmd[HCI_MAX_CMD_SIZE];
++    unsigned char rsp[HCI_MAX_EVENT_SIZE];
++    hci_command_hdr *cmd_hdr;
++    int flags;
++
++    fprintf(stderr, "%s: HCI RESET \n", __FUNCTION__);
++
++    memset(cmd, 0x0, HCI_MAX_CMD_SIZE);
++
++    cmd_hdr = (void *) (cmd + 1);
++    cmd[0]  = HCI_COMMAND_PKT;
++    cmd_hdr->opcode = HCI_RESET;
++    cmd_hdr->plen   = 0;
++
++    /* Total length of the packet to be sent to the Controller */
++    size = (HCI_CMD_IND + HCI_COMMAND_HDR_SIZE);
++
++    /* Flow off during baudrate change */
++    flow_control(fd, MSM_DISABLE_FLOW_CTRL);
++
++    /* Send the HCI command packet to UART for transmission */
++    fprintf(stderr, "%s: HCI CMD: 0x%x 0x%x 0x%x 0x%x\n", __FUNCTION__, cmd[0], cmd[1], cmd[2], cmd[3]);
++    err = write(fd, cmd, size);
++    if (err != size) {
++        fprintf(stderr, "%s: Send failed with ret value: %d\n", __FUNCTION__, err);
++        goto error;
++    }
++
++    /* Change Local UART baudrate to high speed UART */
++     userial_vendor_set_baud(USERIAL_BAUD_3M);
++
++    /* Flow on after changing local uart baudrate */
++    flow_control(fd, MSM_ENABLE_FLOW_CTRL);
++
++    /* Wait for command complete event */
++    err = read_hci_event(fd, rsp, HCI_MAX_EVENT_SIZE);
++    if ( err < 0) {
++        fprintf(stderr, "%s: Failed to set patch info on Controller\n", __FUNCTION__);
++        goto error;
++    }
++
++error:
++    return err;
++
++}
++
++int read_bd_address(unsigned char *bdaddr)
++{
++  int fd = -1;
++  int readPtr = 0;
++  unsigned char data[BD_ADDR_LEN];
++
++  /* Open the persist file for reading device address*/
++  fd = open("/etc/bluetooth/.bt_nv.bin", O_RDONLY);
++  if(fd < 0)
++  {
++    fprintf(stderr, "%s: Open failed: Programming default BD ADDR\n", __func__);
++    return -1;
++  }
++
++  /* Read the NVM Header : fp will be advanced by readPtr number of bytes */
++  readPtr = read(fd, data, PERSIST_HEADER_LEN);
++  if (readPtr > 0)
++    fprintf(stderr, "%s: Persist header data: %02x \t %02x \t %02x\n", __func__,
++      data[NVITEM], data[RDWR_PROT], data[NVITEM_SIZE]);
++  else {
++    fprintf(stderr, "%s: Read from persist memory failed : Programming default"
++      " BD ADDR\n");
++    close(fd);
++    return -1;
++  }
++
++  /* Check for BD ADDR length before programming */
++  if(data[NVITEM_SIZE] != BD_ADDR_LEN) {
++    fprintf(stderr, "Invalid BD ADDR: Programming default BD ADDR!\n");
++    close(fd);
++    return -1;
++  }
++
++  /* Read the BD ADDR info */
++  readPtr = read(fd, data, BD_ADDR_LEN);
++  if (readPtr > 0)
++    fprintf(stderr, "BD-ADDR: ==> %02x:%02x:%02x:%02x:%02x:%02x\n", data[0],
++      data[1], data[2], data[3], data[4], data[5]);
++  else {
++    fprintf(stderr, "%s: Read from persist memory failed : Programming default"
++      " BD ADDR\n");
++    close(fd);
++    return -1;
++  }
++  memcpy(bdaddr, data, BD_ADDR_LEN);
++  close(fd);
++  return 0;
++}
++
++int qca_soc_init(int fd, char *bdaddr)
++{
++    int err = -1;
++    int size;
++
++    vnd_userial.fd = fd;
++
++#ifdef _PLATFORM_MDM_
++    /* Vote for UART CLK prior to FW download */
++    err = ioctl(fd, USERIAL_OP_CLK_ON);
++    if (err < 0) {
++        fprintf(stderr, "%s: Failed to vote UART CLK ON\n", __func__);
++        return -1;
++    }
++#endif
++    /* Get Rome version information */
++    if((err = rome_patch_ver_req(fd)) <0){
++        fprintf(stderr, "%s: Fail to get Rome Version (0x%x)\n", __FUNCTION__, err);
++        goto error;
++    }
++
++    fprintf(stderr, "%s: Rome Version (0x%08x)\n", __FUNCTION__, rome_ver);
++
++    switch (rome_ver){
++        case ROME_VER_1_0:
++            {
++                /* Set and Download the RAMPATCH */
++                fprintf(stderr, "%s: Setting Patch Header & Downloading Patches\n", __FUNCTION__);
++                err = rome_download_rampatch(fd);
++                if (err < 0) {
++                    fprintf(stderr, "%s: DOWNLOAD RAMPATCH failed!\n", __FUNCTION__);
++                    goto error;
++                }
++                fprintf(stderr, "%s: DOWNLOAD RAMPTACH complete\n", __FUNCTION__);
++
++                /* Attach the RAMPATCH */
++                fprintf(stderr, "%s: Attaching the patches\n", __FUNCTION__);
++                err = rome_attach_rampatch(fd);
++                if (err < 0) {
++                    fprintf(stderr, "%s: ATTACH RAMPATCH failed!\n", __FUNCTION__);
++                    goto error;
++                }
++                fprintf(stderr, "%s: ATTACH RAMPTACH complete\n", __FUNCTION__);
++
++                /* Send Reset */
++                size = (HCI_CMD_IND + HCI_COMMAND_HDR_SIZE + EDL_PATCH_CMD_LEN);
++                err = rome_rampatch_reset(fd);
++                if ( err < 0 ) {
++                    fprintf(stderr, "Failed to RESET after RAMPATCH upgrade!\n");
++                    goto error;
++                }
++
++                /* NVM download */
++                fprintf(stderr, "%s: Downloading NVM\n", __FUNCTION__);
++                err = rome_1_0_nvm_tag_dnld(fd);
++                if ( err <0 ) {
++                    fprintf(stderr, "Downloading NVM Failed !!\n");
++                    goto error;
++                }
++
++                /* Change baud rate 115.2 kbps to 3Mbps*/
++                err = rome_hci_reset_req(fd);
++                if ( err <0 ) {
++                    fprintf(stderr, "HCI Reset Failed !!\n");
++                    goto error;
++                }
++
++                fprintf(stderr, "HCI Reset is done\n");
++            }
++            break;
++        case ROME_VER_1_1:
++            rampatch_file_path = ROME_RAMPATCH_TLV_PATH;
++            nvm_file_path = ROME_NVM_TLV_PATH;
++            goto download;
++        case ROME_VER_1_3:
++            rampatch_file_path = ROME_RAMPATCH_TLV_1_0_3_PATH;
++            nvm_file_path = ROME_NVM_TLV_1_0_3_PATH;
++            goto download;
++        case ROME_VER_2_1:
++            rampatch_file_path = ROME_RAMPATCH_TLV_2_0_1_PATH;
++            nvm_file_path = ROME_NVM_TLV_2_0_1_PATH;
++            goto download;
++        case ROME_VER_3_0:
++            rampatch_file_path = ROME_RAMPATCH_TLV_3_0_0_PATH;
++            nvm_file_path = ROME_NVM_TLV_3_0_0_PATH;
++            goto download;
++        case ROME_VER_3_2:
++            rampatch_file_path = ROME_RAMPATCH_TLV_3_0_2_PATH;
++            nvm_file_path = ROME_NVM_TLV_3_0_2_PATH;
++            goto download;
++        case TUFELLO_VER_1_0:
++            rampatch_file_path = TF_RAMPATCH_TLV_1_0_0_PATH;
++            nvm_file_path = TF_NVM_TLV_1_0_0_PATH;
++
++download:
++            /* Change baud rate 115.2 kbps to 3Mbps*/
++            err = rome_set_baudrate_req(fd);
++            if (err < 0) {
++                fprintf(stderr, "%s: Baud rate change failed!\n", __FUNCTION__);
++                goto error;
++            }
++            fprintf(stderr, "%s: Baud rate changed successfully \n", __FUNCTION__);
++
++            /* Donwload TLV files (rampatch, NVM) */
++            err = rome_download_tlv_file(fd);
++            if (err < 0) {
++                fprintf(stderr, "%s: Download TLV file failed!\n", __FUNCTION__);
++                goto error;
++            }
++            fprintf(stderr, "%s: Download TLV file successfully \n", __FUNCTION__);
++
++            /* Perform HCI reset here*/
++            err = rome_hci_reset_req(fd);
++            if ( err <0 ) {
++                fprintf(stderr, "HCI Reset Failed !!!\n");
++                goto error;
++            }
++	    fprintf(stderr, "HCI Reset is done\n");
++
++            break;
++        case ROME_VER_UNKNOWN:
++        default:
++            fprintf(stderr, "%s: Detected unknown ROME version\n", __FUNCTION__);
++            err = -1;
++            break;
++    }
++
++error:
++#ifdef _PLATFORM_MDM_
++    /* Vote UART CLK OFF post to FW download */
++    err = ioctl(fd, USERIAL_OP_CLK_OFF);
++    if (err < 0)
++        fprintf(stderr, "%s: Failed to vote UART CLK OFF!!!\n", __func__);
++#endif
++
++    return err;
++}
+diff --git a/tools/hciattach_rome.h b/tools/hciattach_rome.h
+new file mode 100644
+index 0000000..9770d0b
+--- /dev/null
++++ b/tools/hciattach_rome.h
+@@ -0,0 +1,371 @@
++/*
++ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
++ * Not a Contribution.
++ * Copyright 2012 The Android Open Source Project
++ *
++ *  Licensed under the Apache License, Version 2.0 (the "License");
++ *  you may not use this file except in compliance with the License.
++ * You may obtain a copy of the License at
++ *
++ *  http://www.apache.org/licenses/LICENSE-2.0
++ *
++ *  Unless required by applicable law or agreed to in writing, software
++ *  distributed under the License is distributed on an "AS IS" BASIS,
++ *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
++ *  See the License for the specific language governing permissions and
++ *  limitations under the License.
++ */
++#ifndef HW_ROME_H
++#define HW_ROME_H
++
++/******************************************************************************
++**  Constants & Macros
++******************************************************************************/
++#define HCI_MAX_CMD_SIZE        260
++#define HCI_MAX_EVENT_SIZE     260
++#define PRINT_BUF_SIZE              ((HCI_MAX_CMD_SIZE * 3) + 2)
++/* HCI Command/Event Opcode */
++#define HCI_RESET                       0x0C03
++#define EVT_CMD_COMPLETE       0x0E
++/* HCI Packet types */
++#define HCI_COMMAND_PKT     0x01
++#define HCI_ACLDATA_PKT      0x02
++#define HCI_SCODATA_PKT     0x03
++#define HCI_EVENT_PKT           0x04
++#define HCI_VENDOR_PKT        0xff
++#define cmd_opcode_pack(ogf, ocf) (unsigned short)((ocf & 0x03ff)|(ogf << 10))
++
++#define NVITEM              0
++#define RDWR_PROT           1
++#define NVITEM_SIZE         2
++#define PERSIST_HEADER_LEN  3
++#define BD_ADDR_LEN         6
++#define MSM_DISABLE_FLOW_CTRL  0
++#define MSM_ENABLE_FLOW_CTRL   1
++
++#ifdef _PLATFORM_MDM_
++#define USERIAL_OP_CLK_ON      0x5441
++#define USERIAL_OP_CLK_OFF     0x5442
++#endif
++
++unsigned char vnd_local_bd_addr[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
++typedef enum {
++    USERIAL_OP_FLOW_ON,
++    USERIAL_OP_FLOW_OFF,
++    USERIAL_OP_NOP,
++} userial_vendor_ioctl_op_t;
++
++
++/* vendor serial control block */
++typedef struct
++{
++    int fd;                     /* fd to Bluetooth device */
++    struct termios termios;     /* serial terminal of BT port */
++    char port_name[256];
++} vnd_userial_cb_t;
++
++/**** baud rates ****/
++#define USERIAL_BAUD_300        0
++#define USERIAL_BAUD_600        1
++#define USERIAL_BAUD_1200       2
++#define USERIAL_BAUD_2400       3
++#define USERIAL_BAUD_9600       4
++#define USERIAL_BAUD_19200      5
++#define USERIAL_BAUD_57600      6
++#define USERIAL_BAUD_115200     7
++#define USERIAL_BAUD_230400     8
++#define USERIAL_BAUD_460800     9
++#define USERIAL_BAUD_921600     10
++#define USERIAL_BAUD_1M         11
++#define USERIAL_BAUD_1_5M       12
++#define USERIAL_BAUD_2M         13
++#define USERIAL_BAUD_3M         14
++#define USERIAL_BAUD_4M         15
++#define USERIAL_BAUD_AUTO       16
++
++#ifndef FALSE
++#define FALSE  0
++#endif
++
++#ifndef TRUE
++#define TRUE   (!FALSE)
++#endif
++
++#define HCI_CHG_BAUD_CMD_OCF        0x0C
++#define HCI_VENDOR_CMD_OGF             0x3F
++#define WRITE_BDADDR_CMD_LEN        14
++#define WRITE_BAUD_CMD_LEN             6
++#define MAX_CMD_LEN                    WRITE_BDADDR_CMD_LEN
++#define GET_VERSION_OCF            0x1E
++
++#define PS_HDR_LEN                         4
++#define HCI_VENDOR_CMD_OGF      0x3F
++#define HCI_PS_CMD_OCF                0x0B
++
++#define HCI_COMMAND_HDR_SIZE        3
++#define EVT_CMD_COMPLETE_SIZE       3
++#define EVT_CMD_STATUS                     0x0F
++#define EVT_CMD_STATUS_SIZE           4
++#define HCI_EVENT_HDR_SIZE              2
++#define HCI_EV_SUCCESS                      0x00
++/* HCI Socket options */
++#define HCI_DATA_DIR            1
++#define HCI_FILTER                  2
++#define HCI_TIME_STAMP        3
++
++#define P_ID_OFFSET                                     (0)
++#define HCI_CMD_IND                                   (1)
++#define EVENTCODE_OFFSET                      (1)
++#define EVT_PLEN                                             (2)
++#define PLEN                                                       (3)
++#define CMD_RSP_OFFSET                             (3)
++#define RSP_TYPE_OFFSET                            (4)
++#define BAUDRATE_RSP_STATUS_OFFSET    (4)
++#define CMD_STATUS_OFFSET                      (5)
++#define P_ROME_VER_OFFSET                       (4)
++#define P_BUILD_VER_OFFSET                      (6)
++#define P_BASE_ADDR_OFFSET                     (8)
++#define P_ENTRY_ADDR_OFFSET                   (12)
++#define P_LEN_OFFSET                                   (16)
++#define P_CRC_OFFSET                                  (20)
++#define P_CONTROL_OFFSET                          (24)
++#define PATCH_HDR_LEN                               (28)
++#define MAX_DATA_PER_SEGMENT                (239)
++#define VSEVENT_CODE                                 (0xFF)
++#define HC_VS_MAX_CMD_EVENT                 (0xFF)
++#define PATCH_PROD_ID_OFFSET                (5)
++#define PATCH_PATCH_VER_OFFSET            (9)
++#define PATCH_ROM_BUILD_VER_OFFSET       (11)
++#define PATCH_SOC_VER_OFFSET             (13)
++#define MAX_SIZE_PER_TLV_SEGMENT        (243)
++
++/* VS Opcode */
++#define HCI_PATCH_CMD_OCF                       (0)
++#define EDL_SET_BAUDRATE_CMD_OCF        (0x48)
++
++/* VS Commands */
++#define VSC_SET_BAUDRATE_REQ_LEN        (1)
++#define EDL_PATCH_CMD_LEN	                       (1)
++#define EDL_PATCH_CMD_REQ_LEN               (1)
++#define EDL_PATCH_DLD_REQ_CMD               (0x01)
++#define EDL_PATCH_RST_REQ_CMD               (0x05)
++#define EDL_PATCH_SET_REQ_CMD               (0x16)
++#define EDL_PATCH_ATCH_REQ_CMD              (0x17)
++#define EDL_PATCH_VER_REQ_CMD               (0x19)
++#define EDL_PATCH_TLV_REQ_CMD               (0x1E)
++#define VSC_DISABLE_IBS_LEN                 (0x04)
++
++/* VS Event */
++#define EDL_CMD_REQ_RES_EVT                 (0x00)
++#define EDL_CMD_EXE_STATUS_EVT           (0x00)
++#define EDL_SET_BAUDRATE_RSP_EVT       (0x92)
++#define EDL_PATCH_VER_RES_EVT             (0x19)
++#define EDL_TVL_DNLD_RES_EVT                (0x04)
++#define EDL_APP_VER_RES_EVT                  (0x02)
++
++
++/* Status Codes of HCI CMD execution*/
++#define HCI_CMD_SUCCESS                     (0x0)
++#define PATCH_LEN_ERROR                       (0x1)
++#define PATCH_VER_ERROR                       (0x2)
++#define PATCH_CRC_ERROR                     (0x3)
++#define PATCH_NOT_FOUND                      (0x4)
++#define TLV_TYPE_ERROR                         (0x10)
++#define NVM_ACCESS_CODE                     (0x0B)
++#define BAUDRATE_CHANGE_SUCCESS   (1)
++
++/* TLV_TYPE */
++#define TLV_TYPE_PATCH                  (1)
++#define TLV_TYPE_NVM                      (2)
++
++/* NVM */
++#define MAX_TAG_CMD                 30
++#define TAG_END                           0xFF
++#define NVM_ACCESS_SET            0x01
++#define TAG_NUM_OFFSET             5
++#define TAG_NUM_2			2
++#define TAG_NUM_17			(17)
++#define TAG_NUM_44			44
++#define TAG_BDADDR_OFFSET     7
++
++/* FW PCM Configuration */
++#define FWCONF_PCM_MS_OFFSET_1		9
++#define FWCONF_PCM_MS_OFFSET_2		33
++#define FWCONF_PCM_SLAVE		1
++#define FWCONF_PCM_MASTER		0
++#define FWCONF_PCM_ROLE_BIT_OFFSET	4
++
++/* FW IBS Configuration */
++#define FWCONF_IBS_DISABLE		(0)
++#define FWCONF_IBS_ENABLE		(1)
++#define FWCONF_IBS_VAL_BIT		(7)
++#define FWCONF_IBS_VAL_OFFSET		(0)
++
++#define MAX_RETRY_CNT  1
++#define SELECT_TIMEOUT 3
++
++#define PARAM_LEN      20
++
++/* NVM Tags specifically used for ROME 1.0 */
++#define ROME_1_0_100022_1       0x101000221
++#define ROME_1_0_100019           0x101000190
++#define ROME_1_0_6002               0x100600200
++
++/* Default NVM Version setting for ROME 1.0 */
++#define NVM_VERSION                  ROME_1_0_100022_1
++
++
++#define LSH(val, n)     ((unsigned int)(val) << (n))
++#define EXTRACT_BYTE(val, pos)      (char) (((val) >> (8 * (pos))) & 0xFF)
++#define CALC_SEG_SIZE(len, max)   ((plen) % (max))?((plen/max)+1) : ((plen) / (max))
++
++#define ROME_FW_PATH        "/lib/firmware/rampatch.img"
++#define ROME_RAMPATCH_TLV_PATH      "/lib/firmware/rampatch_tlv.img"
++#define ROME_NVM_TLV_PATH         "/lib/firmware/nvm_tlv.bin"
++#define ROME_RAMPATCH_TLV_1_0_3_PATH    "/lib/firmware/rampatch_tlv_1.3.tlv"
++#define ROME_NVM_TLV_1_0_3_PATH         "/lib/firmware/nvm_tlv_1.3.bin"
++#define ROME_RAMPATCH_TLV_2_0_1_PATH    "/lib/firmware/rampatch_tlv_2.1.tlv"
++#define ROME_NVM_TLV_2_0_1_PATH         "/lib/firmware/nvm_tlv_2.1.bin"
++#define ROME_RAMPATCH_TLV_3_0_0_PATH    "/lib/firmware/rampatch_tlv_3.0.tlv"
++#define ROME_NVM_TLV_3_0_0_PATH         "/lib/firmware/nvm_tlv_3.0.bin"
++#define ROME_RAMPATCH_TLV_3_0_2_PATH    "/lib/firmware/rampatch_tlv_3.2.tlv"
++#define ROME_NVM_TLV_3_0_2_PATH         "/lib/firmware/nvm_tlv_3.2.bin"
++#define TF_RAMPATCH_TLV_1_0_0_PATH    "/lib/firmware/rampatch_tlv_tf_1.0.tlv"
++#define TF_NVM_TLV_1_0_0_PATH         "/lib/firmware/nvm_tlv_tf_1.0.bin"
++
++/* This header value in rampatch file decides event handling mechanism in the HOST */
++#define ROME_SKIP_EVT_NONE     0x00
++#define ROME_SKIP_EVT_VSE      0x01
++#define ROME_SKIP_EVT_CC       0x02
++#define ROME_SKIP_EVT_VSE_CC   0x03
++
++#define FW_CONFIG_FILE_PATH        "/etc/bluetooth/firmware.conf"
++/******************************************************************************
++**  Local type definitions
++******************************************************************************/
++
++typedef struct {
++    unsigned char     ncmd;
++    unsigned short    opcode;
++} __attribute__ ((packed)) evt_cmd_complete;
++
++typedef struct {
++    unsigned char     status;
++    unsigned char     ncmd;
++    unsigned short    opcode;
++} __attribute__ ((packed)) evt_cmd_status;
++
++typedef struct {
++    unsigned short    opcode;
++    unsigned char     plen;
++} __attribute__ ((packed))  hci_command_hdr;
++
++typedef struct {
++    unsigned char     evt;
++    unsigned char     plen;
++} __attribute__ ((packed))  hci_event_hdr;
++typedef struct {
++    unsigned short rom_version;
++    unsigned short build_version;
++} __attribute__ ((packed)) patch_version;
++
++typedef struct {
++    unsigned int patch_id;
++    patch_version patch_ver;
++    unsigned int patch_base_addr;
++    unsigned int patch_entry_addr;
++    unsigned short patch_length;
++    int patch_crc;
++    unsigned short patch_ctrl;
++} __attribute__ ((packed)) patch_info;
++
++typedef struct {
++    unsigned int  tlv_data_len;
++    unsigned int  tlv_patch_data_len;
++    unsigned char sign_ver;
++    unsigned char sign_algorithm;
++    unsigned char dwnd_cfg;
++    unsigned char reserved1;
++    unsigned short prod_id;
++    unsigned short build_ver;
++    unsigned short patch_ver;
++    unsigned short reserved2;
++    unsigned int patch_entry_addr;
++} __attribute__ ((packed)) tlv_patch_hdr;
++
++typedef struct {
++    unsigned short tag_id;
++    unsigned short tag_len;
++    unsigned int tag_ptr;
++    unsigned int tag_ex_flag;
++} __attribute__ ((packed)) tlv_nvm_hdr;
++
++typedef struct {
++    unsigned char tlv_type;
++    unsigned char tlv_length1;
++    unsigned char tlv_length2;
++    unsigned char tlv_length3;
++
++    union{
++        tlv_patch_hdr patch;
++        tlv_nvm_hdr nvm;
++    }tlv;
++} __attribute__ ((packed)) tlv_patch_info;
++
++enum{
++    BAUDRATE_115200     = 0x00,
++    BAUDRATE_57600       = 0x01,
++    BAUDRATE_38400       = 0x02,
++    BAUDRATE_19200       = 0x03,
++    BAUDRATE_9600         = 0x04,
++    BAUDRATE_230400     = 0x05,
++    BAUDRATE_250000     = 0x06,
++    BAUDRATE_460800     = 0x07,
++    BAUDRATE_500000     = 0x08,
++    BAUDRATE_720000     = 0x09,
++    BAUDRATE_921600     = 0x0A,
++    BAUDRATE_1000000   = 0x0B,
++    BAUDRATE_1250000   = 0x0C,
++    BAUDRATE_2000000   = 0x0D,
++    BAUDRATE_3000000   = 0x0E,
++    BAUDRATE_4000000   = 0x0F,
++    BAUDRATE_1600000   = 0x10,
++    BAUDRATE_3200000   = 0x11,
++    BAUDRATE_3500000   = 0x12,
++    BAUDRATE_AUTO        = 0xFE,
++    BAUDRATE_Reserved  = 0xFF
++};
++
++enum{
++    ROME_PATCH_VER_0100 = 0x0100,
++    ROME_PATCH_VER_0101 = 0x0101,
++    ROME_PATCH_VER_0200 = 0x0200,
++    ROME_PATCH_VER_0300 = 0x0300,
++    ROME_PATCH_VER_0302 = 0x0302
++ };
++
++enum{
++    ROME_SOC_ID_00 = 0x00000000,
++    ROME_SOC_ID_11 = 0x00000011,
++    ROME_SOC_ID_13 = 0x00000013,
++    ROME_SOC_ID_22 = 0x00000022,
++    ROME_SOC_ID_44 = 0x00000044
++};
++
++enum{
++    ROME_VER_UNKNOWN = 0,
++    ROME_VER_1_0 = ((ROME_PATCH_VER_0100 << 16 ) | ROME_SOC_ID_00 ),
++    ROME_VER_1_1 = ((ROME_PATCH_VER_0101 << 16 ) | ROME_SOC_ID_00 ),
++    ROME_VER_1_3 = ((ROME_PATCH_VER_0200 << 16 ) | ROME_SOC_ID_00 ),
++    ROME_VER_2_1 = ((ROME_PATCH_VER_0200 << 16 ) | ROME_SOC_ID_11 ),
++    ROME_VER_3_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_22 ),
++    ROME_VER_3_2 = ((ROME_PATCH_VER_0302 << 16 ) | ROME_SOC_ID_44 ),
++    TUFELLO_VER_1_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_13 )
++};
++
++#ifdef USE_GLIB
++#include <glib.h>
++#define strlcpy g_strlcpy
++#endif
++
++#endif /* HW_ROME_H */
+-- 
+1.9.1
+
diff --git a/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch b/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch
new file mode 100644
index 0000000..a9ce17d
--- /dev/null
+++ b/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch
@@ -0,0 +1,32 @@
+From 3648d3c33b1dd0e11707328d87101d8044d23302 Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Tue, 29 Aug 2017 10:21:09 +0800
+Subject: [PATCH 2/5] hciattach: set flag to enable HCI reset on init
+
+On some qca devices, correct setup of BT+WLAN co-existance requires
+HCI reset being set at the start of power on sequence. Sending HCI
+resets has no side effect.
+
+Change-Id: I71cb367d10d4d19d82b41af6a4a0b8b2f770f691
+Signed-off-by: Rupesh Tatiya <rtatiya@codeaurora.org>
+---
+ tools/hciattach.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/tools/hciattach.c b/tools/hciattach.c
+index 200f734..d03ed46 100644
+--- a/tools/hciattach.c
++++ b/tools/hciattach.c
+@@ -1158,6 +1158,9 @@ static int init_uart(char *dev, struct uart_t *u, int send_break, int raw)
+ 	if (u->flags & AMP_DEV)
+ 		flags |= 1 << HCI_UART_CREATE_AMP;
+ 
++	if (!strncmp(u->type, "qca", 3))
++		flags |= 1 << HCI_UART_RESET_ON_INIT;
++
+ 	fd = open(dev, O_RDWR | O_NOCTTY);
+ 	if (fd < 0) {
+ 		perror("Can't open serial port");
+-- 
+1.9.1
+
diff --git a/recipes-connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch b/recipes-connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch
new file mode 100644
index 0000000..8ad2b32
--- /dev/null
+++ b/recipes-connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch
@@ -0,0 +1,35 @@
+From 5877685b10560c40f1c4af375e30adf2a631fefc Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Tue, 29 Aug 2017 14:54:44 +0800
+Subject: [PATCH 3/5] hciattach: instead of strlcpy with strncpy to avoid rome
+ build error
+
+Instead of strlcpy with strncpy to avoid rome build error.
+
+igned-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ tools/hciattach_rome.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/tools/hciattach_rome.c b/tools/hciattach_rome.c
+index 242a49f..c3e9fde 100644
+--- a/tools/hciattach_rome.c
++++ b/tools/hciattach_rome.c
+@@ -893,12 +893,12 @@ int get_value_from_config(char *file_path,char *param)
+         return ret;
+     }
+ 
+-    while (getline(&line, &bytes_read, pfile) > 0 ) {
++    while (getline(&line, (size_t *)&bytes_read, pfile) > 0 ) {
+         if (line[0] != '#'  && line[0] != '\n') {
+             pch = memchr(line, '=', strlen(line));
+             if (pch != NULL) {
+                 position = pch - line;
+-                strlcpy(param_str, line, sizeof(param_str));
++                strncpy(param_str, line, sizeof(param_str));
+                 if (position >= sizeof(param_str))
+                     position = sizeof(param_str) - 1;
+                 if (strncmp(param_str, param, position) == 0) {
+-- 
+1.9.1
+
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* [PATCH 52/52] bluez5: Add patches to support Tufello 1.1 SoC
  2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
                   ` (20 preceding siblings ...)
  2018-07-30 19:44 ` [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3 Tom Hochstein
@ 2018-07-30 19:44 ` Tom Hochstein
  21 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-07-30 19:44 UTC (permalink / raw)
  To: meta-freescale

Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-connectivity/bluez5/bluez5_5.%.bbappend    |  15 +-
 .../0004-Add-support-for-Tufello-1.1-SOC.patch     | 120 ++++++++
 ...bluetooth-Add-support-for-multi-baud-rate.patch | 335 +++++++++++++++++++++
 3 files changed, 460 insertions(+), 10 deletions(-)
 create mode 100644 recipes-connectivity/bluez5/files/0004-Add-support-for-Tufello-1.1-SOC.patch
 create mode 100644 recipes-connectivity/bluez5/files/0005-bluetooth-Add-support-for-multi-baud-rate.patch

diff --git a/recipes-connectivity/bluez5/bluez5_5.%.bbappend b/recipes-connectivity/bluez5/bluez5_5.%.bbappend
index 00eb248..d4eaf74 100644
--- a/recipes-connectivity/bluez5/bluez5_5.%.bbappend
+++ b/recipes-connectivity/bluez5/bluez5_5.%.bbappend
@@ -1,14 +1,9 @@
 FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
 
-# Do not start the service during system boot up
-INITSCRIPT_PARAMS_${PN} = "stop 20 0 1 6 ."
-
-# Add patch for module bcm43xx
-# Add patches for QCA modules with Qca6174 and Qca9377-3 chips
 SRC_URI += " \
-            file://0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch \
-            file://0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch \
-            file://0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch \
-            file://0004-Add-support-for-Tufello-1.1-SOC.patch \
-            file://0005-bluetooth-Add-support-for-multi-baud-rate.patch \
+    file://0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch \
+    file://0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch \
+    file://0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch \
+    file://0004-Add-support-for-Tufello-1.1-SOC.patch \
+    file://0005-bluetooth-Add-support-for-multi-baud-rate.patch \
 "
diff --git a/recipes-connectivity/bluez5/files/0004-Add-support-for-Tufello-1.1-SOC.patch b/recipes-connectivity/bluez5/files/0004-Add-support-for-Tufello-1.1-SOC.patch
new file mode 100644
index 0000000..0760703
--- /dev/null
+++ b/recipes-connectivity/bluez5/files/0004-Add-support-for-Tufello-1.1-SOC.patch
@@ -0,0 +1,120 @@
+From beceec239b241e4b091e26bdb53e53b3ffba5a8b Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Mon, 4 Sep 2017 19:01:19 +0800
+Subject: [PATCH 4/5] Add support for Tufello 1.1 SOC
+
+Enable mechanism to download firmware for Tufello 1.1 SOC.
+Also, use correct firmware file path for Tufello 1.0.
+
+Change-Id: I915e48023e45de9e2550336a3de9a07f2b788189
+Signed-off-by: Rupesh Tatiya <rtatiya@codeaurora.org>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+
+(merge the patch into NXP bluez v5.41)
+---
+ tools/hciattach_rome.c | 14 ++++++++++----
+ tools/hciattach_rome.h | 17 ++++++++++++++---
+ 2 files changed, 24 insertions(+), 7 deletions(-)
+
+diff --git a/tools/hciattach_rome.c b/tools/hciattach_rome.c
+index c3e9fde..188bcc1 100644
+--- a/tools/hciattach_rome.c
++++ b/tools/hciattach_rome.c
+@@ -1123,6 +1123,7 @@ int rome_tlv_dnld_req(int fd, int tlv_size)
+ {
+     int  total_segment, remain_size, i, err = -1;
+     unsigned char wait_cc_evt = FALSE;
++    unsigned int rom = rome_ver >> 16;
+ 
+     total_segment = tlv_size/MAX_SIZE_PER_TLV_SEGMENT;
+     remain_size = (tlv_size < MAX_SIZE_PER_TLV_SEGMENT)?\
+@@ -1163,14 +1164,15 @@ int rome_tlv_dnld_req(int fd, int tlv_size)
+ 
+     for(i = 0; i < total_segment; i++) {
+         if((i+1) == total_segment) {
+-             if ((rome_ver >= ROME_VER_1_1) && (rome_ver < ROME_VER_3_2) &&
++             if ((rom >= ROME_PATCH_VER_0100) && (rom < ROME_PATCH_VER_0302) &&
+                  (gTlv_type == TLV_TYPE_PATCH)) {
+                /* If the Rome version is from 1.1 to 3.1
+                 * 1. No CCE for the last command segment but all other segment
+                 * 2. All the command segments get VSE including the last one
+                 */
+                 wait_cc_evt = !remain_size ? FALSE: TRUE;
+-             } else if ((rome_ver == ROME_VER_3_2) && (gTlv_type == TLV_TYPE_PATCH)) {
++             } else if ((rom == ROME_PATCH_VER_0302) &&
++                             (gTlv_type == TLV_TYPE_PATCH)) {
+                 /* If the Rome version is 3.2
+                  * 1. None of the command segments receive CCE
+                  * 2. No command segments receive VSE except the last one
+@@ -1189,13 +1191,14 @@ int rome_tlv_dnld_req(int fd, int tlv_size)
+             goto error;
+     }
+ 
+-    if ((rome_ver >= ROME_VER_1_1) && (rome_ver < ROME_VER_3_2) && (gTlv_type == TLV_TYPE_PATCH)) {
++    if ((rom >= ROME_PATCH_VER_0100) && (rom < ROME_PATCH_VER_0302) &&
++                                               (gTlv_type == TLV_TYPE_PATCH)) {
+        /* If the Rome version is from 1.1 to 3.1
+         * 1. No CCE for the last command segment but all other segment
+         * 2. All the command segments get VSE including the last one
+         */
+         wait_cc_evt = remain_size ? FALSE: TRUE;
+-    } else if ((rome_ver == ROME_VER_3_2) && (gTlv_type == TLV_TYPE_PATCH)) {
++    } else if ((rom == ROME_PATCH_VER_0302) && (gTlv_type == TLV_TYPE_PATCH)) {
+         /* If the Rome version is 3.2
+          * 1. None of the command segments receive CCE
+          * 2. No command segments receive VSE except the last one
+@@ -1818,6 +1821,9 @@ int qca_soc_init(int fd, char *bdaddr)
+         case TUFELLO_VER_1_0:
+             rampatch_file_path = TF_RAMPATCH_TLV_1_0_0_PATH;
+             nvm_file_path = TF_NVM_TLV_1_0_0_PATH;
++        case TUFELLO_VER_1_1:
++            rampatch_file_path = TF_RAMPATCH_TLV_1_0_1_PATH;
++            nvm_file_path = TF_NVM_TLV_1_0_1_PATH;
+ 
+ download:
+             /* Change baud rate 115.2 kbps to 3Mbps*/
+diff --git a/tools/hciattach_rome.h b/tools/hciattach_rome.h
+index 9770d0b..917af55 100644
+--- a/tools/hciattach_rome.h
++++ b/tools/hciattach_rome.h
+@@ -230,8 +230,17 @@ typedef struct
+ #define ROME_NVM_TLV_3_0_0_PATH         "/lib/firmware/nvm_tlv_3.0.bin"
+ #define ROME_RAMPATCH_TLV_3_0_2_PATH    "/lib/firmware/rampatch_tlv_3.2.tlv"
+ #define ROME_NVM_TLV_3_0_2_PATH         "/lib/firmware/nvm_tlv_3.2.bin"
+-#define TF_RAMPATCH_TLV_1_0_0_PATH    "/lib/firmware/rampatch_tlv_tf_1.0.tlv"
+-#define TF_NVM_TLV_1_0_0_PATH         "/lib/firmware/nvm_tlv_tf_1.0.bin"
++#ifdef _PLATFORM_MDM_
++#define TF_RAMPATCH_TLV_1_0_0_PATH      "/lib/firmware/rampatch_tlv_tf_1.0.tlv"
++#define TF_NVM_TLV_1_0_0_PATH           "/lib/firmware/nvm_tlv_tf_1.0.bin"
++#define TF_RAMPATCH_TLV_1_0_1_PATH      "/lib/firmware/tfbtfw11.tlv"
++#define TF_NVM_TLV_1_0_1_PATH           "/lib/firmware/tfbtnv11.bin"
++#else
++#define TF_RAMPATCH_TLV_1_0_0_PATH      "/lib/firmware/qca/rampatch_tlv_tf_1.0.tlv"
++#define TF_NVM_TLV_1_0_0_PATH           "/lib/firmware/qca/nvm_tlv_tf_1.0.bin"
++#define TF_RAMPATCH_TLV_1_0_1_PATH      "/lib/firmware/qca/tfbtfw11.tlv"
++#define TF_NVM_TLV_1_0_1_PATH           "/lib/firmware/qca/tfbtnv11.bin"
++#endif
+ 
+ /* This header value in rampatch file decides event handling mechanism in the HOST */
+ #define ROME_SKIP_EVT_NONE     0x00
+@@ -349,6 +358,7 @@ enum{
+     ROME_SOC_ID_11 = 0x00000011,
+     ROME_SOC_ID_13 = 0x00000013,
+     ROME_SOC_ID_22 = 0x00000022,
++    ROME_SOC_ID_23 = 0x00000023,
+     ROME_SOC_ID_44 = 0x00000044
+ };
+ 
+@@ -360,7 +370,8 @@ enum{
+     ROME_VER_2_1 = ((ROME_PATCH_VER_0200 << 16 ) | ROME_SOC_ID_11 ),
+     ROME_VER_3_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_22 ),
+     ROME_VER_3_2 = ((ROME_PATCH_VER_0302 << 16 ) | ROME_SOC_ID_44 ),
+-    TUFELLO_VER_1_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_13 )
++    TUFELLO_VER_1_0 = ((ROME_PATCH_VER_0300 << 16 ) | ROME_SOC_ID_13 ),
++    TUFELLO_VER_1_1 = ((ROME_PATCH_VER_0302 << 16 ) | ROME_SOC_ID_23 ),
+ };
+ 
+ #ifdef USE_GLIB
+-- 
+1.9.1
+
diff --git a/recipes-connectivity/bluez5/files/0005-bluetooth-Add-support-for-multi-baud-rate.patch b/recipes-connectivity/bluez5/files/0005-bluetooth-Add-support-for-multi-baud-rate.patch
new file mode 100644
index 0000000..c635cd3
--- /dev/null
+++ b/recipes-connectivity/bluez5/files/0005-bluetooth-Add-support-for-multi-baud-rate.patch
@@ -0,0 +1,335 @@
+From 82348c8235b9935d0d3b0715908ec66db0ef7a75 Mon Sep 17 00:00:00 2001
+From: "aifeng.wang" <aifeng.wang@murata.com>
+Date: Tue, 5 Sep 2017 17:22:48 +0800
+Subject: [PATCH 5/5] bluetooth: Add support for multi baud rate
+
+Currently BT operates only at 3M baud rate. Provide option
+to configure the pre-defined baud rate values as supported by the
+target platform.
+(based on CAF commit:f7a564dd593b1ba29a3395e1078ac180e4a02ed3)
+---
+ tools/hciattach.c      |  58 +++++++++++++++++++++++++-
+ tools/hciattach.h      |   2 +-
+ tools/hciattach_rome.c | 109 ++++++++++++++++++++++++++++++++++++++++++-------
+ tools/hciattach_rome.h |  23 +++++++++++
+ 4 files changed, 176 insertions(+), 16 deletions(-)
+
+diff --git a/tools/hciattach.c b/tools/hciattach.c
+old mode 100644
+new mode 100755
+index d03ed46..d64601e
+--- a/tools/hciattach.c
++++ b/tools/hciattach.c
+@@ -88,6 +88,62 @@ static void sig_alarm(int sig)
+ 	exit(1);
+ }
+ 
++int uart_speed(int s)
++{
++	switch (s) {
++	case 9600:
++		return B9600;
++	case 19200:
++		return B19200;
++	case 38400:
++		return B38400;
++	case 57600:
++		return B57600;
++	case 115200:
++		return B115200;
++	case 230400:
++		return B230400;
++	case 460800:
++		return B460800;
++	case 500000:
++		return B500000;
++	case 576000:
++		return B576000;
++	case 921600:
++		return B921600;
++	case 1000000:
++		return B1000000;
++	case 1152000:
++		return B1152000;
++	case 1500000:
++		return B1500000;
++	case 2000000:
++		return B2000000;
++#ifdef B2500000
++	case 2500000:
++		return B2500000;
++#endif
++#ifdef B3000000
++	case 3000000:
++		return B3000000;
++#endif
++#ifdef B3500000
++	case 3500000:
++		return B3500000;
++#endif
++#ifdef B3710000
++	case 3710000
++		return B3710000;
++#endif
++#ifdef B4000000
++	case 4000000:
++		return B4000000;
++#endif
++	default:
++		return B57600;
++	}
++}
++
+ int set_speed(int fd, struct termios *ti, int speed)
+ {
+ 	if (cfsetospeed(ti, tty_get_speed(speed)) < 0)
+@@ -268,7 +324,7 @@ static int ath3k_pm(int fd, struct uart_t *u, struct termios *ti)
+ static int qca(int fd, struct uart_t *u, struct termios *ti)
+ {
+         fprintf(stderr,"qca\n");
+-        return qca_soc_init(fd, u->bdaddr);
++        return qca_soc_init(fd, u->speed, u->bdaddr);
+ }
+ 
+ static int qualcomm(int fd, struct uart_t *u, struct termios *ti)
+diff --git a/tools/hciattach.h b/tools/hciattach.h
+old mode 100644
+new mode 100755
+index 59efa31..626e2a0
+--- a/tools/hciattach.h
++++ b/tools/hciattach.h
+@@ -66,7 +66,7 @@ int bgb2xx_init(int dd, bdaddr_t *bdaddr);
+ int ath3k_init(int fd, int speed, int init_speed, char *bdaddr,
+ 						struct termios *ti);
+ int ath3k_post(int fd, int pm);
+-int qca_soc_init(int fd, char *bdaddr);
++int qca_soc_init(int fd, int speed, char *bdaddr);
+ int qualcomm_init(int fd, int speed, struct termios *ti, const char *bdaddr);
+ int intel_init(int fd, int init_speed, int *speed, struct termios *ti);
+ int bcm43xx_init(int fd, int def_speed, int speed, struct termios *ti,
+diff --git a/tools/hciattach_rome.c b/tools/hciattach_rome.c
+old mode 100644
+new mode 100755
+index 188bcc1..fc843f6
+--- a/tools/hciattach_rome.c
++++ b/tools/hciattach_rome.c
+@@ -1574,7 +1574,7 @@ static void flow_control(int fd, int opt)
+ }
+ 
+ 
+-int rome_set_baudrate_req(int fd)
++int rome_set_baudrate_req(int fd, int local_baud_rate, int controller_baud_rate)
+ {
+    int size, err = 0;
+     unsigned char cmd[HCI_MAX_CMD_SIZE];
+@@ -1588,7 +1588,7 @@ int rome_set_baudrate_req(int fd)
+     cmd[0]  = HCI_COMMAND_PKT;
+     cmd_hdr->opcode = cmd_opcode_pack(HCI_VENDOR_CMD_OGF, EDL_SET_BAUDRATE_CMD_OCF);
+     cmd_hdr->plen     = VSC_SET_BAUDRATE_REQ_LEN;
+-    cmd[4]  = BAUDRATE_3000000;
++    cmd[4]  = controller_baud_rate;
+ 
+     /* Total length of the packet to be sent to the Controller */
+     size = (HCI_CMD_IND + HCI_COMMAND_HDR_SIZE + VSC_SET_BAUDRATE_REQ_LEN);
+@@ -1604,7 +1604,7 @@ int rome_set_baudrate_req(int fd)
+         goto error;
+     }
+     /* Change Local UART baudrate to high speed UART */
+-    userial_vendor_set_baud(USERIAL_BAUD_3M);
++    userial_vendor_set_baud(local_baud_rate);
+ 
+     /* Flow on after changing local uart baudrate */
+     flow_control(fd, MSM_ENABLE_FLOW_CTRL);
+@@ -1630,7 +1630,7 @@ error:
+ }
+ 
+ 
+-int rome_hci_reset_req(int fd)
++int rome_hci_reset_req(int fd, char baud)
+ {
+     int size, err = 0;
+     unsigned char cmd[HCI_MAX_CMD_SIZE];
+@@ -1662,7 +1662,7 @@ int rome_hci_reset_req(int fd)
+     }
+ 
+     /* Change Local UART baudrate to high speed UART */
+-     userial_vendor_set_baud(USERIAL_BAUD_3M);
++     userial_vendor_set_baud(baud);
+ 
+     /* Flow on after changing local uart baudrate */
+     flow_control(fd, MSM_ENABLE_FLOW_CTRL);
+@@ -1728,10 +1728,69 @@ int read_bd_address(unsigned char *bdaddr)
+   return 0;
+ }
+ 
+-int qca_soc_init(int fd, char *bdaddr)
++int isSpeedValid(int speed, int *local_baud_rate, int *controller_baud_rate)
++{
++    switch(speed) {
++    case 9600:
++        *local_baud_rate = USERIAL_BAUD_9600;
++        *controller_baud_rate = BAUDRATE_9600;
++        break;
++    case 19200:
++        *local_baud_rate = USERIAL_BAUD_19200;
++        *controller_baud_rate = BAUDRATE_19200;
++        break;
++    case 57600:
++        *local_baud_rate = USERIAL_BAUD_57600;
++        *controller_baud_rate = BAUDRATE_57600;
++        break;
++    case 115200:
++        *local_baud_rate = USERIAL_BAUD_115200;
++        *controller_baud_rate = BAUDRATE_115200;
++        break;
++    case 230400:
++        *local_baud_rate = USERIAL_BAUD_230400;
++        *controller_baud_rate = BAUDRATE_230400;
++        break;
++    case 460800:
++        *local_baud_rate = USERIAL_BAUD_460800;
++        *controller_baud_rate = BAUDRATE_460800;
++        break;
++    case 921600:
++        *local_baud_rate = USERIAL_BAUD_921600;
++        *controller_baud_rate = BAUDRATE_921600;
++        break;
++    case 1000000:
++        *local_baud_rate = USERIAL_BAUD_1M;
++        *controller_baud_rate = BAUDRATE_1000000;
++        break;
++    case 2000000:
++        *local_baud_rate = USERIAL_BAUD_2M;
++        *controller_baud_rate = BAUDRATE_2000000;
++        break;
++    case 3000000:
++        *local_baud_rate = USERIAL_BAUD_3M;
++        *controller_baud_rate = BAUDRATE_3000000;
++        break;
++    case 4000000:
++        *local_baud_rate = USERIAL_BAUD_4M;
++        *controller_baud_rate = BAUDRATE_4000000;
++        break;
++    case 300:
++    case 600:
++    case 1200:
++    case 2400:
++    default:
++        fprintf(stderr, "Invalid baud rate passed!\n");
++        *local_baud_rate = *controller_baud_rate = -1;
++        break;
++    }
++    return -1;
++}
++
++int qca_soc_init(int fd, int speed, char *bdaddr)
+ {
+     int err = -1;
+-    int size;
++    int size, local_baud_rate = 0, controller_baud_rate = 0;
+ 
+     vnd_userial.fd = fd;
+ 
+@@ -1789,7 +1848,7 @@ int qca_soc_init(int fd, char *bdaddr)
+                 }
+ 
+                 /* Change baud rate 115.2 kbps to 3Mbps*/
+-                err = rome_hci_reset_req(fd);
++                err = rome_hci_reset_req(fd, local_baud_rate);
+                 if ( err <0 ) {
+                     fprintf(stderr, "HCI Reset Failed !!\n");
+                     goto error;
+@@ -1821,17 +1880,30 @@ int qca_soc_init(int fd, char *bdaddr)
+         case TUFELLO_VER_1_0:
+             rampatch_file_path = TF_RAMPATCH_TLV_1_0_0_PATH;
+             nvm_file_path = TF_NVM_TLV_1_0_0_PATH;
++            goto download;
+         case TUFELLO_VER_1_1:
+             rampatch_file_path = TF_RAMPATCH_TLV_1_0_1_PATH;
+             nvm_file_path = TF_NVM_TLV_1_0_1_PATH;
+ 
+ download:
+-            /* Change baud rate 115.2 kbps to 3Mbps*/
+-            err = rome_set_baudrate_req(fd);
+-            if (err < 0) {
+-                fprintf(stderr, "%s: Baud rate change failed!\n", __FUNCTION__);
+-                goto error;
++            /* Check if user requested for 115200 kbps */
++            if (speed == 115200) {
++                local_baud_rate = USERIAL_BAUD_115200;
++                controller_baud_rate = BAUDRATE_115200;
+             }
++            else {
++                /* Change only if baud rate requested is valid or not */
++                isSpeedValid(speed, &local_baud_rate, &controller_baud_rate);
++                if (local_baud_rate < 0 || controller_baud_rate < 0) {
++                    err = -1;
++                    goto error;
++                }
++                err = rome_set_baudrate_req(fd, local_baud_rate, controller_baud_rate);
++                if (err < 0) {
++                    fprintf(stderr, "%s: Baud rate change failed!\n", __FUNCTION__);
++                   goto error;
++                }
++             }
+             fprintf(stderr, "%s: Baud rate changed successfully \n", __FUNCTION__);
+ 
+             /* Donwload TLV files (rampatch, NVM) */
+@@ -1842,8 +1914,17 @@ download:
+             }
+             fprintf(stderr, "%s: Download TLV file successfully \n", __FUNCTION__);
+ 
++            /*
++             * Overriding the baud rate value in NVM file with the user
++             * requested baud rate, since default baud rate in NVM file is 3M.
++             */
++            err = rome_set_baudrate_req(fd, local_baud_rate, controller_baud_rate);
++            if (err < 0) {
++                fprintf(stderr, "%s: Baud rate change failed!\n", __FUNCTION__);
++                goto error;
++            }
+             /* Perform HCI reset here*/
+-            err = rome_hci_reset_req(fd);
++            err = rome_hci_reset_req(fd, local_baud_rate);
+             if ( err <0 ) {
+                 fprintf(stderr, "HCI Reset Failed !!!\n");
+                 goto error;
+diff --git a/tools/hciattach_rome.h b/tools/hciattach_rome.h
+old mode 100644
+new mode 100755
+index 917af55..62f2ac0
+--- a/tools/hciattach_rome.h
++++ b/tools/hciattach_rome.h
+@@ -83,6 +83,29 @@ typedef struct
+ #define USERIAL_BAUD_4M         15
+ #define USERIAL_BAUD_AUTO       16
+ 
++/* Vendor specific baud rate values */
++#define UART_Baud_Rate_Baud_9600        4
++#define UART_Baud_Rate_Baud_19200       3
++#define UART_Baud_Rate_Baud_57600       1
++#define UART_Baud_Rate_Baud_115200      0
++#define UART_Baud_Rate_Baud_230400      5
++#define UART_Baud_Rate_Baud_460800      7
++#define UART_Baud_Rate_Baud_921600      10
++#define UART_Baud_Rate_Baud_1000000     11
++#define UART_Baud_Rate_Baud_2000000     13
++#define UART_Baud_Rate_Baud_3000000     14
++#define UART_Baud_Rate_Baud_4000000     15
++
++#define UART_Baud_Rate_Baud_250000      6
++#define UART_Baud_Rate_Baud_500000      8
++#define UART_Baud_Rate_Baud_720000      9
++#define UART_Baud_Rate_Baud_125000      12
++#define UART_Baud_Rate_Baud_1600000     16
++#define UART_Baud_Rate_Baud_3200000     17
++#define UART_Baud_Rate_Baud_3500000     18
++
++
++
+ #ifndef FALSE
+ #define FALSE  0
+ #endif
+-- 
+1.9.1
+
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* Re: [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0
  2018-07-30 19:44 ` [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0 Tom Hochstein
@ 2018-07-31  6:53   ` Gary Bisson
  2018-07-31 19:44     ` Tom Hochstein
  0 siblings, 1 reply; 30+ messages in thread
From: Gary Bisson @ 2018-07-31  6:53 UTC (permalink / raw)
  To: Tom Hochstein; +Cc: meta-freescale

Hi Tom,

On Mon, Jul 30, 2018 at 02:44:09PM -0500, Tom Hochstein wrote:

Can you provide a changelog for this version bump?

> Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
> ---
>  ...Fix-ion.h-header-inclusion-to-be-standard.patch | 37 ++++++++++------------
>  recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb | 33 -------------------
>  recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb | 35 ++++++++++++++++++++
>  3 files changed, 52 insertions(+), 53 deletions(-)
>  rename recipes-bsp/imx-vpu-hantro/{imx-vpu-hantro-1.6.0 => imx-vpu-hantro}/0001-Fix-ion.h-header-inclusion-to-be-standard.patch (71%)

Thanks for porting the patch over. Any chance to get it in the upstream
repo in the future?

Regards,
Gary


^ permalink raw reply	[flat|nested] 30+ messages in thread

* Re: [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0
  2018-07-31  6:53   ` Gary Bisson
@ 2018-07-31 19:44     ` Tom Hochstein
  2018-08-24 19:45       ` Tom Hochstein
  0 siblings, 1 reply; 30+ messages in thread
From: Tom Hochstein @ 2018-07-31 19:44 UTC (permalink / raw)
  To: Gary Bisson; +Cc: meta-freescale



> -----Original Message-----
> From: Gary Bisson [mailto:gary.bisson@boundarydevices.com]
> Sent: Tuesday, July 31, 2018 1:54 AM
> To: Tom Hochstein <tom.hochstein@nxp.com>
> Cc: meta-freescale@yoctoproject.org
> Subject: Re: [meta-freescale] [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0
> 
> Hi Tom,
> 
> On Mon, Jul 30, 2018 at 02:44:09PM -0500, Tom Hochstein wrote:
> 
> Can you provide a changelog for this version bump?

Will do.

> 
> > Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
> > ---
> >  ...Fix-ion.h-header-inclusion-to-be-standard.patch | 37
> > ++++++++++------------
> > recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.6.0.bb | 33
> > -------------------
> > recipes-bsp/imx-vpu-hantro/imx-vpu-hantro_1.7.0.bb | 35
> > ++++++++++++++++++++
> >  3 files changed, 52 insertions(+), 53 deletions(-)  rename
> > recipes-bsp/imx-vpu-hantro/{imx-vpu-hantro-1.6.0 =>
> > imx-vpu-hantro}/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
> > (71%)
> 
> Thanks for porting the patch over. Any chance to get it in the upstream repo in
> the future?

Thanks for pointing this out. I will get the process started now.

> 
> Regards,
> Gary


^ permalink raw reply	[flat|nested] 30+ messages in thread

* Re: [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3
  2018-07-30 19:44 ` [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3 Tom Hochstein
@ 2018-08-01 14:24   ` Max Krummenacher
  2018-08-01 19:03     ` Tom Hochstein
  0 siblings, 1 reply; 30+ messages in thread
From: Max Krummenacher @ 2018-08-01 14:24 UTC (permalink / raw)
  To: Tom Hochstein, meta-freescale

Resent, due to wrong sender address. Also cut out unneeded quote lines.

Hi

Does this really belong into meta-freescale?
It looks like it is needed because some NXP boards use these chips.
However they are not specific to NXP SoCs.

And see inline comments below, I start them with 'MAX:':

Regards
Max Krummenacher

Am Montag, den 30.07.2018, 14:44 -0500 schrieb Tom Hochstein:
> Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
---
 recipes-
> connectivity/bluez5/bluez5_5.%.bbappend    |   14 +
 ...th-Add-bluetooth-support-for-QCA6174-
> chip.patch | 2404 ++++++++++++++++++++
 ...tach-set-flag-to-enable-HCI-reset-on-init.patch |   32 +
 ...nstead-of-strlcpy-with-strncpy-to-avoid-r.patch |   35 +
 4 files changed, 2485 insertions(+)
 c
> reate mode 100644 recipes-connectivity/bluez5/bluez5_5.%.bbappend
 create mode 100644 recipes-
> connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-
QCA6174-chip.patch
 create mode
> 100644 recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-
on-init.patch
 create mode 100644 recipes-connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-
strnc
> py-to-avoid-r.patch

diff --git a/recipes-connectivity/bluez5/bluez5_5.%.bbappend b/recipes-
connectivity/bluez5/bluez5_5.%.bbappend
new file mode 100644
index 0000000..00eb248
--- /dev/null
+++ b/recipes-connectivity/bluez5/bluez5_5.%.bbappend
@@ -0,0 +1,14 @@
+FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
+
+# Do not start the service during system boot up
+INITSCRIPT_PARAMS_${PN} = "stop 20 0 1 6 ."

Max:
That one would merit some text in the commit log. This changes behavior for all
users of bluez5. But it looks that the line gets removed in the follow up patch
so probably it can be deleted for good?

> +
+# Add patch for module bcm43xx
+# Add patches for QCA modules with Qca6174 and Qca9377-3 chips
+SR
> C_URI += " \
+            file://0001-bluetooth-Add-bluetooth-support-for-QCA6174-chip.patch \
+    
>         file://0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch \
+            file://0003
> -hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch \
+            file://0004-Add-support-
> for-Tufello-1.1-SOC.patch \
+            file://0005-bluetooth-Add-support-for-multi-baud-
> rate.patch \

Max:
Patch 0004 and 0005 are only added with a follow up patch. IMHO one could squash the QCAxxxx and
Tufello patches, if that is not desired then only add 0004 and 0005 to SRC_URI in the patch which
actually does also add the corresponding files.

> +"
diff --git a/recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-
chip.patch b/recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-
ch
> ip.patch
new file mode 100644
index 0000000..5ae3c98
--- /dev/null
+++ b/recipes-
> connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-QCA6174-
chip.patch
@@ -0,0
> +1,2404 @@
+From d509b84f237c11874087d7ea527e5ba2f460ed2c Mon Sep 17 00:00:00 2001
+From: Fugang
> Duan <fugang.duan@nxp.com>
+Date: Tue, 29 Aug 2017 10:12:57 +0800
+Subject: [PATCH 1/5] bluetooth :
> Add bluetooth support for QCA6174 chip.
+
+Register the QCA6174 initialization routine with
> hciattach for
+downloading firmware patches to the bluetooth controller.
+Add optional support 'f'
> to control installation of line
+discipline driver. Invoke hciattach from command line and
+download
> the firmware patches:
+        hciattach /dev/ttyHS0 qca 3000000 -t120 flow -f0
+
+cherry-pick and
> merged from:
+	https://source.codeaurora.org/quic/la/platform/external/bluetooth/bluez
+	branch: LNX.LE.5.3
+	commit: commit bb96f3b759e0b99db70014302ca12929fb42f554
Max:
I think a proper Upstream-Status: (with upstream meaning bluez.org) is missing.

> +
+Change-Id: I87f2927d7096904071a02d73d3afef0dc34db414
+Signed-off-by: Rupesh Tatiya <rtatiya@codea
> urora.org>
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ Makefile.tools         |    3 +-
+
> tools/hciattach.c      |   26 +-
+ tools/hciattach.h      |    2 +
+ tools/hciattach_rome.c | 1864
> ++++++++++++++++++++++++++++++++++++++++++++++++
+ tools/hciattach_rome.h |  371 ++++++++++
+ 5
> files changed, 2264 insertions(+), 2 deletions(-)
+

diff --git a/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-
init.patch b/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-
init.patch
new file mode 100644
index 0000000..a9ce17d
--- /dev/null
+++ b/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch
@@ -0,0 +1,32 @@
+From 3648d3c33b1dd0e11707328d87101d8044d23302 Mon Sep 17 00:00:00 2001
+From: Fugang Duan <fugang.duan@nxp.com>
+Date: Tue, 29 Aug 2017 10:21:09 +0800
+Subject: [PATCH 2/5] hciattach: set flag to enable HCI reset on init
+
+On some qca devices, correct setup of BT+WLAN co-existance requires
+HCI reset being set at the start of power on sequence. Sending HCI
+resets has no side effect.
+

Max: 
Upstream-Status is missing.

> +Change-Id: I71cb367d10d4d19d82b41af6a4a0b8b2f770f691
+Signed-off-by: Rupesh Tatiya <rtatiya@codeau
> rora.org>
+---

> connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-strncpy-to-avoid-
r.patch
@@ -0,0
> +1,35 @@
+From 5877685b10560c40f1c4af375e30adf2a631fefc Mon Sep 17 00:00:00 2001
+From: Fugang Duan
> <fugang.duan@nxp.com>
+Date: Tue, 29 Aug 2017 14:54:44 +0800
+Subject: [PATCH 3/5] hciattach:
> instead of strlcpy with strncpy to avoid rome
+ build error
+
+Instead of strlcpy with strncpy to
> avoid rome build error.
+
+igned-off-by: Fugang Duan <fugang.duan@nxp.com>

Max: 
Typo, missing 'S'
Upstream-Status is missing.

> +---
+ tools/hciattach_rome.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git 
> a/tools/hciattach_rome.c b/tools/hciattach_rome.c
+index 242a49f..c3e9fde 100644



^ permalink raw reply related	[flat|nested] 30+ messages in thread

* Re: [PATCH 46/52] formfactor: Add machconfig for 6ULL and 7ULP
  2018-07-30 19:44 ` [PATCH 46/52] formfactor: Add machconfig for 6ULL and 7ULP Tom Hochstein
@ 2018-08-01 15:58   ` Max Krummenacher
  0 siblings, 0 replies; 30+ messages in thread
From: Max Krummenacher @ 2018-08-01 15:58 UTC (permalink / raw)
  To: Tom Hochstein, meta-freescale

Hi

The commit message says 6ULL, but the actual machconfig got added for
override mx6sll.
I guess one of the two is wrong.

Max

Am Montag, den 30.07.2018, 14:44 -0500 schrieb Tom Hochstein:
> Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
> ---
>  recipes-bsp/formfactor/formfactor/mx6sll/machconfig | 11 +++++++++++
>  recipes-bsp/formfactor/formfactor/mx7ulp/machconfig | 11 +++++++++++
>  recipes-bsp/formfactor/formfactor_%.bbappend        |  2 +-
>  3 files changed, 23 insertions(+), 1 deletion(-)
>  create mode 100644 recipes-bsp/formfactor/formfactor/mx6sll/machconfig
>  create mode 100644 recipes-bsp/formfactor/formfactor/mx7ulp/machconfig
> 
> diff --git a/recipes-bsp/formfactor/formfactor/mx6sll/machconfig b/recipes-
> bsp/formfactor/formfactor/mx6sll/machconfig
> new file mode 100644
> index 0000000..e3b99b7
> --- /dev/null
> +++ b/recipes-bsp/formfactor/formfactor/mx6sll/machconfig
> @@ -0,0 +1,11 @@
> +# Display options
> +HAVE_TOUCHSCREEN=1
> +HAVE_KEYBOARD=0
> +
> +#DISPLAY_CAN_ROTATE=0
> +#DISPLAY_ORIENTATION=0
> +#DISPLAY_WIDTH_PIXELS=1024
> +#DISPLAY_HEIGHT_PIXELS=720
> +#DISPLAY_BPP=16
> +#DISPLAY_DPI=150
> +#DISPLAY_SUBPIXEL_ORDER=vrgb
> diff --git a/recipes-bsp/formfactor/formfactor/mx7ulp/machconfig b/recipes-
> bsp/formfactor/formfactor/mx7ulp/machconfig
> new file mode 100644
> index 0000000..25b18f2
> --- /dev/null
> +++ b/recipes-bsp/formfactor/formfactor/mx7ulp/machconfig
> @@ -0,0 +1,11 @@
> +# Display options
> +HAVE_TOUCHSCREEN=0
> +HAVE_KEYBOARD=0
> +
> +#DISPLAY_CAN_ROTATE=0
> +#DISPLAY_ORIENTATION=0
> +#DISPLAY_WIDTH_PIXELS=1024
> +#DISPLAY_HEIGHT_PIXELS=720
> +#DISPLAY_BPP=16
> +#DISPLAY_DPI=150
> +#DISPLAY_SUBPIXEL_ORDER=vrgb
> diff --git a/recipes-bsp/formfactor/formfactor_%.bbappend b/recipes-
> bsp/formfactor/formfactor_%.bbappend
> index 8c77b8d..96551f3 100644
> --- a/recipes-bsp/formfactor/formfactor_%.bbappend
> +++ b/recipes-bsp/formfactor/formfactor_%.bbappend
> @@ -1,2 +1,2 @@
> -# Append path for freescale to include costom matchconfig
> +# Append path for i.MX custom machconfig
>  FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
> -- 
> 2.7.4
> 


^ permalink raw reply	[flat|nested] 30+ messages in thread

* Re: [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3
  2018-08-01 14:24   ` Max Krummenacher
@ 2018-08-01 19:03     ` Tom Hochstein
  0 siblings, 0 replies; 30+ messages in thread
From: Tom Hochstein @ 2018-08-01 19:03 UTC (permalink / raw)
  To: Max Krummenacher, meta-freescale

Thanks, Max. It does look like these patches don't belong on meta-freescale. I will remove this patch. Thanks for the suggestions on the content as well.

Tom

> -----Original Message-----
> From: Max Krummenacher [mailto:max.oss.09@gmail.com]
> Sent: Wednesday, August 1, 2018 9:24 AM
> To: Tom Hochstein <tom.hochstein@nxp.com>; meta-
> freescale@yoctoproject.org
> Subject: Re: [meta-freescale] [PATCH 51/52] bluez5: Apply patches for
> QCA6174 and QCA9377-3
> 
> Resent, due to wrong sender address. Also cut out unneeded quote lines.
> 
> Hi
> 
> Does this really belong into meta-freescale?
> It looks like it is needed because some NXP boards use these chips.
> However they are not specific to NXP SoCs.
> 
> And see inline comments below, I start them with 'MAX:':
> 
> Regards
> Max Krummenacher
> 
> Am Montag, den 30.07.2018, 14:44 -0500 schrieb Tom Hochstein:
> > Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
> ---
>  recipes-
> > connectivity/bluez5/bluez5_5.%.bbappend    |   14 +
>  ...th-Add-bluetooth-support-for-QCA6174-
> > chip.patch | 2404 ++++++++++++++++++++
>  ...tach-set-flag-to-enable-HCI-reset-on-init.patch |   32 +
>  ...nstead-of-strlcpy-with-strncpy-to-avoid-r.patch |   35 +
>  4 files changed, 2485 insertions(+)
>  c
> > reate mode 100644 recipes-connectivity/bluez5/bluez5_5.%.bbappend
>  create mode 100644 recipes-
> > connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-
> QCA6174-chip.patch
>  create mode
> > 100644 recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-
> enable-HCI-reset-
> on-init.patch
>  create mode 100644 recipes-connectivity/bluez5/files/0003-hciattach-
> instead-of-strlcpy-with-
> strnc
> > py-to-avoid-r.patch
> 
> diff --git a/recipes-connectivity/bluez5/bluez5_5.%.bbappend b/recipes-
> connectivity/bluez5/bluez5_5.%.bbappend
> new file mode 100644
> index 0000000..00eb248
> --- /dev/null
> +++ b/recipes-connectivity/bluez5/bluez5_5.%.bbappend
> @@ -0,0 +1,14 @@
> +FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
> +
> +# Do not start the service during system boot up
> +INITSCRIPT_PARAMS_${PN} = "stop 20 0 1 6 ."
> 
> Max:
> That one would merit some text in the commit log. This changes behavior for
> all
> users of bluez5. But it looks that the line gets removed in the follow up patch
> so probably it can be deleted for good?
> 
> > +
> +# Add patch for module bcm43xx
> +# Add patches for QCA modules with Qca6174 and Qca9377-3 chips
> +SR
> > C_URI += " \
> +            file://0001-bluetooth-Add-bluetooth-support-for-QCA6174-
> chip.patch \
> +
> >         file://0002-hciattach-set-flag-to-enable-HCI-reset-on-init.patch \
> +            file://0003
> > -hciattach-instead-of-strlcpy-with-strncpy-to-avoid-r.patch \
> +            file://0004-Add-support-
> > for-Tufello-1.1-SOC.patch \
> +            file://0005-bluetooth-Add-support-for-multi-baud-
> > rate.patch \
> 
> Max:
> Patch 0004 and 0005 are only added with a follow up patch. IMHO one could
> squash the QCAxxxx and
> Tufello patches, if that is not desired then only add 0004 and 0005 to SRC_URI
> in the patch which
> actually does also add the corresponding files.
> 
> > +"
> diff --git a/recipes-connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-
> support-for-QCA6174-
> chip.patch b/recipes-connectivity/bluez5/files/0001-bluetooth-Add-
> bluetooth-support-for-QCA6174-
> ch
> > ip.patch
> new file mode 100644
> index 0000000..5ae3c98
> --- /dev/null
> +++ b/recipes-
> > connectivity/bluez5/files/0001-bluetooth-Add-bluetooth-support-for-
> QCA6174-
> chip.patch
> @@ -0,0
> > +1,2404 @@
> +From d509b84f237c11874087d7ea527e5ba2f460ed2c Mon Sep 17 00:00:00
> 2001
> +From: Fugang
> > Duan <fugang.duan@nxp.com>
> +Date: Tue, 29 Aug 2017 10:12:57 +0800
> +Subject: [PATCH 1/5] bluetooth :
> > Add bluetooth support for QCA6174 chip.
> +
> +Register the QCA6174 initialization routine with
> > hciattach for
> +downloading firmware patches to the bluetooth controller.
> +Add optional support 'f'
> > to control installation of line
> +discipline driver. Invoke hciattach from command line and
> +download
> > the firmware patches:
> +        hciattach /dev/ttyHS0 qca 3000000 -t120 flow -f0
> +
> +cherry-pick and
> > merged from:
> +
> 	https://emea01.safelinks.protection.outlook.com/?url=https%3A%2
> F%2Fsource.codeaurora.org%2Fquic%2Fla%2Fplatform%2Fexternal%2Fbluet
> ooth%2Fbluez&amp;data=02%7C01%7Ctom.hochstein%40nxp.com%7C1702c
> 4de42e64b5ecefc08d5f7ba7830%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C
> 0%7C0%7C636687302609941480&amp;sdata=lcDl91WPxuWAYgIiDk9sl7xyM3i
> CEeifi0I8a9EnZpk%3D&amp;reserved=0
> +	branch: LNX.LE.5.3
> +	commit: commit bb96f3b759e0b99db70014302ca12929fb42f554
> Max:
> I think a proper Upstream-Status: (with upstream meaning bluez.org) is
> missing.
> 
> > +
> +Change-Id: I87f2927d7096904071a02d73d3afef0dc34db414
> +Signed-off-by: Rupesh Tatiya <rtatiya@codea
> > urora.org>
> +Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
> +---
> + Makefile.tools         |    3 +-
> +
> > tools/hciattach.c      |   26 +-
> + tools/hciattach.h      |    2 +
> + tools/hciattach_rome.c | 1864
> > ++++++++++++++++++++++++++++++++++++++++++++++++
> + tools/hciattach_rome.h |  371 ++++++++++
> + 5
> > files changed, 2264 insertions(+), 2 deletions(-)
> +
> 
> diff --git a/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-
> enable-HCI-reset-on-
> init.patch b/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-
> enable-HCI-reset-on-
> init.patch
> new file mode 100644
> index 0000000..a9ce17d
> --- /dev/null
> +++ b/recipes-connectivity/bluez5/files/0002-hciattach-set-flag-to-enable-
> HCI-reset-on-init.patch
> @@ -0,0 +1,32 @@
> +From 3648d3c33b1dd0e11707328d87101d8044d23302 Mon Sep 17 00:00:00
> 2001
> +From: Fugang Duan <fugang.duan@nxp.com>
> +Date: Tue, 29 Aug 2017 10:21:09 +0800
> +Subject: [PATCH 2/5] hciattach: set flag to enable HCI reset on init
> +
> +On some qca devices, correct setup of BT+WLAN co-existance requires
> +HCI reset being set at the start of power on sequence. Sending HCI
> +resets has no side effect.
> +
> 
> Max:
> Upstream-Status is missing.
> 
> > +Change-Id: I71cb367d10d4d19d82b41af6a4a0b8b2f770f691
> +Signed-off-by: Rupesh Tatiya <rtatiya@codeau
> > rora.org>
> +---
> 
> > connectivity/bluez5/files/0003-hciattach-instead-of-strlcpy-with-strncpy-
> to-avoid-
> r.patch
> @@ -0,0
> > +1,35 @@
> +From 5877685b10560c40f1c4af375e30adf2a631fefc Mon Sep 17 00:00:00
> 2001
> +From: Fugang Duan
> > <fugang.duan@nxp.com>
> +Date: Tue, 29 Aug 2017 14:54:44 +0800
> +Subject: [PATCH 3/5] hciattach:
> > instead of strlcpy with strncpy to avoid rome
> + build error
> +
> +Instead of strlcpy with strncpy to
> > avoid rome build error.
> +
> +igned-off-by: Fugang Duan <fugang.duan@nxp.com>
> 
> Max:
> Typo, missing 'S'
> Upstream-Status is missing.
> 
> > +---
> + tools/hciattach_rome.c | 4 ++--
> + 1 file changed, 2 insertions(+), 2 deletions(-)
> +
> +diff --git
> > a/tools/hciattach_rome.c b/tools/hciattach_rome.c
> +index 242a49f..c3e9fde 100644


^ permalink raw reply	[flat|nested] 30+ messages in thread

* Re: [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0
  2018-07-31 19:44     ` Tom Hochstein
@ 2018-08-24 19:45       ` Tom Hochstein
  2018-08-27 11:55         ` Gary Bisson
  0 siblings, 1 reply; 30+ messages in thread
From: Tom Hochstein @ 2018-08-24 19:45 UTC (permalink / raw)
  To: Gary Bisson; +Cc: meta-freescale



> -----Original Message-----
> From: Tom Hochstein
> Sent: Tuesday, July 31, 2018 2:44 PM


> > -----Original Message-----
> > From: Gary Bisson [mailto:gary.bisson@boundarydevices.com]
> > Sent: Tuesday, July 31, 2018 1:54 AM


> > > recipes-bsp/imx-vpu-hantro/{imx-vpu-hantro-1.6.0 =>
> > > imx-vpu-hantro}/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
> > > (71%)
> >
> > Thanks for porting the patch over. Any chance to get it in the
> > upstream repo in the future?
> 
> Thanks for pointing this out. I will get the process started now.

I have misgivings about this patch. The problem is we have packages that use ion.h that are applicable to both Android and Linux. Having ion.h live in two different locations means we have to complicate the packages.

Isn't it better to just adopt the Android model and install /usr/include/linux/ion.h in our linux-imx kernel?

Tom


^ permalink raw reply	[flat|nested] 30+ messages in thread

* Re: [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0
  2018-08-24 19:45       ` Tom Hochstein
@ 2018-08-27 11:55         ` Gary Bisson
  0 siblings, 0 replies; 30+ messages in thread
From: Gary Bisson @ 2018-08-27 11:55 UTC (permalink / raw)
  To: Tom Hochstein; +Cc: meta-freescale

[-- Attachment #1: Type: text/plain, Size: 1511 bytes --]

Hi Tom,

On Fri, Aug 24, 2018 at 9:45 PM, Tom Hochstein <tom.hochstein@nxp.com>
wrote:

>
>
> > -----Original Message-----
> > From: Tom Hochstein
> > Sent: Tuesday, July 31, 2018 2:44 PM
>
>
> > > -----Original Message-----
> > > From: Gary Bisson [mailto:gary.bisson@boundarydevices.com]
> > > Sent: Tuesday, July 31, 2018 1:54 AM
>
>
> > > > recipes-bsp/imx-vpu-hantro/{imx-vpu-hantro-1.6.0 =>
> > > > imx-vpu-hantro}/0001-Fix-ion.h-header-inclusion-to-be-standard.patch
> > > > (71%)
> > >
> > > Thanks for porting the patch over. Any chance to get it in the
> > > upstream repo in the future?
> >
> > Thanks for pointing this out. I will get the process started now.
>
> I have misgivings about this patch. The problem is we have packages that
> use ion.h that are applicable to both Android and Linux. Having ion.h live
> in two different locations means we have to complicate the packages.
>
> Isn't it better to just adopt the Android model and install
> /usr/include/linux/ion.h in our linux-imx kernel?
>

Android doesn't actually use ion.h from the kernel but relies on the one
present in the AOSP already (original kernel-headers or bionic libc).

If you want we can have something like:
#ifdef ANDROID
#include <linux/ion.h>
#include <linux/mxc_ion.h>
else
#include <uapi/ion.h>
#endif

That would cover both cases but I understand what you are saying. I just
wish the staging headers would be installed normally in the first place.

Regards,
Gary

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^ permalink raw reply	[flat|nested] 30+ messages in thread

end of thread, other threads:[~2018-08-27 11:55 UTC | newest]

Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-30 19:43 [PATCH 30/52] imx-sc-firmware: Add new package System Controller Firmware Tom Hochstein
2018-07-30 19:43 ` [PATCH 31/52] imx-boot: Add recipes for i.MX 8 boot partition packages Tom Hochstein
2018-07-30 19:43 ` [PATCH 32/52] alsa-state: Fix buffer size issue Tom Hochstein
2018-07-30 19:43 ` [PATCH 33/52] alsa-state: Add support for splitting ESAI device Tom Hochstein
2018-07-30 19:43 ` [PATCH 34/52] alsa-state: Fix channel swap issues Tom Hochstein
2018-07-30 19:43 ` [PATCH 35/52] alsa-state: Fix HDMI for i.MX 8M Tom Hochstein
2018-07-30 19:43 ` [PATCH 36/52] alsa-state: Add new codecs " Tom Hochstein
2018-07-30 19:43 ` [PATCH 37/52] alsa-state: Add i.MX 8 series support Tom Hochstein
2018-07-30 19:43 ` [PATCH 38/52] firmware-imx: Update to 7.6 Tom Hochstein
2018-07-30 19:43 ` [PATCH 39/52] firmware-imx: Add support for BCM4356 and BCM89359 Tom Hochstein
2018-07-30 19:43 ` [PATCH 40/52] firmware-imx: Add i.MX 8 support Tom Hochstein
2018-07-30 19:44 ` [PATCH 41/52] firmware-qca9377: Add support for QCA9377 on i.MX 7ULP Tom Hochstein
2018-07-30 19:44 ` [PATCH 42/52] firmware-qca6174: Add support for QCA6174 on i.MX 8 Series Tom Hochstein
2018-07-30 19:44 ` [PATCH 43/52] qca-tools: Add fcc_tools Tom Hochstein
2018-07-30 19:44 ` [PATCH 44/52] kernel-module-qca9377: Add support for QCA9377 on i.MX 7ULP Tom Hochstein
2018-07-30 19:44 ` [PATCH 45/52] kernel-module-qca6174: Add support for QCA6174 on i.MX 8 Series Tom Hochstein
2018-07-30 19:44 ` [PATCH 46/52] formfactor: Add machconfig for 6ULL and 7ULP Tom Hochstein
2018-08-01 15:58   ` Max Krummenacher
2018-07-30 19:44 ` [PATCH 47/52] imx-kobs: Add i.MX 8 support Tom Hochstein
2018-07-30 19:44 ` [PATCH 48/52] imx-test: " Tom Hochstein
2018-07-30 19:44 ` [PATCH 49/52] imx-vpu: Clarify compatibility for Chips&Media VPU Tom Hochstein
2018-07-30 19:44 ` [PATCH 50/52] imx-vpu-hantro: Update to 1.7.0 Tom Hochstein
2018-07-31  6:53   ` Gary Bisson
2018-07-31 19:44     ` Tom Hochstein
2018-08-24 19:45       ` Tom Hochstein
2018-08-27 11:55         ` Gary Bisson
2018-07-30 19:44 ` [PATCH 51/52] bluez5: Apply patches for QCA6174 and QCA9377-3 Tom Hochstein
2018-08-01 14:24   ` Max Krummenacher
2018-08-01 19:03     ` Tom Hochstein
2018-07-30 19:44 ` [PATCH 52/52] bluez5: Add patches to support Tufello 1.1 SoC Tom Hochstein

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