From: Aapo Vienamo <avienamo@nvidia.com> To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Ulf Hansson <ulf.hansson@linaro.org>, Adrian Hunter <adrian.hunter@intel.com>, Mikko Perttunen <mperttunen@nvidia.com>, Stefan Agner <stefan@agner.ch> Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, Aapo Vienamo <avienamo@nvidia.com> Subject: [PATCH 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Date: Wed, 1 Aug 2018 19:31:53 +0300 [thread overview] Message-ID: <1533141150-10511-4-git-send-email-avienamo@nvidia.com> (raw) In-Reply-To: <1533141150-10511-1-git-send-email-avienamo@nvidia.com> Add bindings documentation for pad pull up and pull down offset values to be programmed before executing automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> --- .../bindings/mmc/nvidia,tegra20-sdhci.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt index 90c214d..2e973b5 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt @@ -24,6 +24,7 @@ Required properties: Optional properties: - power-gpios : Specify GPIOs for power control +Optional properties for Tegra210 and Tegra186: Example: sdhci@c8000200 { @@ -45,6 +46,37 @@ Optional properties for Tegra210 and Tegra186: for controllers supporting multiple voltage levels. The order of names should correspond to the pin configuration states in pinctrl-0 and pinctrl-1. +- nvidia,only-1-8-v : The presence of this property indicates that the + controller operates at a 1.8 V fixed I/O voltage. +- nvidia,pad-autocal-pull-up-offset-3v3, + nvidia,pad-autocal-pull-down-offset-3v3 : Specify drive strength + calibration offsets for 3.3 V signaling modes. +- nvidia,pad-autocal-pull-up-offset-1v8, + nvidia,pad-autocal-pull-down-offset-1v8 : Specify drive strength + calibration offsets for 1.8 V signaling modes. +- nvidia,pad-autocal-pull-up-offset-3v3-timeout, + nvidia,pad-autocal-pull-down-offset-3v3-timeout : Specify drive + strength used as a fallback in case the automatic calibration times + out on a 3.3 V signaling mode. +- nvidia,pad-autocal-pull-up-offset-1v8-timeout, + nvidia,pad-autocal-pull-down-offset-1v8-timeout : Specify drive + strength used as a fallback in case the automatic calibration times + out on a 1.8 V signaling mode. +- nvidia,pad-autocal-pull-up-offset-sdr104, + nvidia,pad-autocal-pull-down-offset-sdr104 : Specify drive strength + calibration offsets for SDR104 mode. +- nvidia,pad-autocal-pull-up-offset-hs400, + nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength + calibration offsets for HS400 mode. + + Notes on the pad calibration pull up and pulldown offset values: + - The property values are drive codes which are programmed into the + PD_OFFSET and PU_OFFSET sections of the + SDHCI_TEGRA_AUTO_CAL_CONFIG register. + - A higher value corresponds to higher drive strength. Please refer + to the reference manual of the SoC for correct values. + - The SDR104 and HS400 timing specific values are used in + corresponding modes if specified. Example: sdhci@700b0000 { @@ -58,5 +90,9 @@ sdhci@700b0000 { pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; pinctrl-0 = <&sdmmc1_3v3>; pinctrl-1 = <&sdmmc1_1v8>; + nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; + nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; + nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; + nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; status = "disabled"; }; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Aapo Vienamo <avienamo@nvidia.com> To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Ulf Hansson <ulf.hansson@linaro.org>, Adrian Hunter <adrian.hunter@intel.com>, Mikko Perttunen <mperttunen@nvidia.com>, "Stefan Agner" <stefan@agner.ch> Cc: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>, Aapo Vienamo <avienamo@nvidia.com> Subject: [PATCH 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Date: Wed, 1 Aug 2018 19:31:53 +0300 [thread overview] Message-ID: <1533141150-10511-4-git-send-email-avienamo@nvidia.com> (raw) In-Reply-To: <1533141150-10511-1-git-send-email-avienamo@nvidia.com> Add bindings documentation for pad pull up and pull down offset values to be programmed before executing automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> --- .../bindings/mmc/nvidia,tegra20-sdhci.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt index 90c214d..2e973b5 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt @@ -24,6 +24,7 @@ Required properties: Optional properties: - power-gpios : Specify GPIOs for power control +Optional properties for Tegra210 and Tegra186: Example: sdhci@c8000200 { @@ -45,6 +46,37 @@ Optional properties for Tegra210 and Tegra186: for controllers supporting multiple voltage levels. The order of names should correspond to the pin configuration states in pinctrl-0 and pinctrl-1. +- nvidia,only-1-8-v : The presence of this property indicates that the + controller operates at a 1.8 V fixed I/O voltage. +- nvidia,pad-autocal-pull-up-offset-3v3, + nvidia,pad-autocal-pull-down-offset-3v3 : Specify drive strength + calibration offsets for 3.3 V signaling modes. +- nvidia,pad-autocal-pull-up-offset-1v8, + nvidia,pad-autocal-pull-down-offset-1v8 : Specify drive strength + calibration offsets for 1.8 V signaling modes. +- nvidia,pad-autocal-pull-up-offset-3v3-timeout, + nvidia,pad-autocal-pull-down-offset-3v3-timeout : Specify drive + strength used as a fallback in case the automatic calibration times + out on a 3.3 V signaling mode. +- nvidia,pad-autocal-pull-up-offset-1v8-timeout, + nvidia,pad-autocal-pull-down-offset-1v8-timeout : Specify drive + strength used as a fallback in case the automatic calibration times + out on a 1.8 V signaling mode. +- nvidia,pad-autocal-pull-up-offset-sdr104, + nvidia,pad-autocal-pull-down-offset-sdr104 : Specify drive strength + calibration offsets for SDR104 mode. +- nvidia,pad-autocal-pull-up-offset-hs400, + nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength + calibration offsets for HS400 mode. + + Notes on the pad calibration pull up and pulldown offset values: + - The property values are drive codes which are programmed into the + PD_OFFSET and PU_OFFSET sections of the + SDHCI_TEGRA_AUTO_CAL_CONFIG register. + - A higher value corresponds to higher drive strength. Please refer + to the reference manual of the SoC for correct values. + - The SDR104 and HS400 timing specific values are used in + corresponding modes if specified. Example: sdhci@700b0000 { @@ -58,5 +90,9 @@ sdhci@700b0000 { pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; pinctrl-0 = <&sdmmc1_3v3>; pinctrl-1 = <&sdmmc1_1v8>; + nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>; + nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>; + nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>; + nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; status = "disabled"; }; -- 2.7.4
next prev parent reply other threads:[~2018-08-01 16:31 UTC|newest] Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-08-01 16:31 [PATCH 00/40] Tegra SDHCI add support for HS200 and UHS signaling Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-01 16:31 ` [PATCH 01/40] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-09 12:13 ` Thierry Reding 2018-08-09 16:24 ` Aapo Vienamo 2018-08-09 16:24 ` Aapo Vienamo 2018-08-01 16:31 ` [PATCH 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-09 12:15 ` Thierry Reding 2018-08-09 16:36 ` Aapo Vienamo 2018-08-09 16:36 ` Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo [this message] 2018-08-01 16:31 ` [PATCH 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Aapo Vienamo 2018-08-09 12:18 ` Thierry Reding 2018-08-01 16:31 ` [PATCH 04/40] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-01 16:31 ` [PATCH 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-09 12:20 ` Thierry Reding 2018-08-01 16:31 ` [PATCH 06/40] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-01 16:31 ` [PATCH 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-09 12:22 ` Thierry Reding 2018-08-01 16:31 ` [PATCH 08/40] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-01 16:31 ` [PATCH 09/40] soc/tegra: pmc: Remove public pad voltage APIs Aapo Vienamo 2018-08-01 16:31 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-09 12:27 ` Thierry Reding 2018-08-09 12:44 ` Aapo Vienamo 2018-08-09 12:44 ` Aapo Vienamo 2018-08-09 13:12 ` Thierry Reding 2018-08-01 16:32 ` [PATCH 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-09 12:43 ` Thierry Reding 2018-08-09 12:52 ` Aapo Vienamo 2018-08-09 12:52 ` Aapo Vienamo 2018-08-09 13:14 ` Thierry Reding 2018-08-01 16:32 ` [PATCH 13/40] mmc: tegra: Poll for calibration completion Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-09 12:46 ` Thierry Reding 2018-08-09 12:56 ` Aapo Vienamo 2018-08-09 12:56 ` Aapo Vienamo 2018-08-09 13:44 ` Thierry Reding 2018-08-01 16:32 ` [PATCH 14/40] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 15/40] mmc: tegra: Power on the calibration pad Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-09 12:52 ` Thierry Reding 2018-08-01 16:32 ` [PATCH 16/40] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-09 12:54 ` Thierry Reding 2018-08-01 16:32 ` [PATCH 17/40] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 18/40] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 19/40] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 20/40] mmc: tegra: Add a workaround for tap value change glitch Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-09 12:58 ` Thierry Reding 2018-08-01 16:32 ` [PATCH 21/40] mmc: tegra: Parse default trim and tap from dt Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 22/40] mmc: tegra: Configure default tap values Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 23/40] mmc: tegra: Configure default trim value on reset Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 24/40] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 27/40] mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 29/40] mmc: tegra: Enable UHS and HS200 modes for Tegra186 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 30/40] arm64: dts: Add Tegra210 sdmmc pinctrl voltage states Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 31/40] arm64: dts: Add Tegra186 " Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 32/40] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 33/40] arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 34/40] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 35/40] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 36/40] arm64: dts: tegra210: " Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 37/40] arm64: dts: tegra210: Add SDHCI tap and trim values Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 38/40] arm64: dts: tegra186: " Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 39/40] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo 2018-08-01 16:32 ` [PATCH 40/40] arm64: dts: tegra210: " Aapo Vienamo 2018-08-01 16:32 ` Aapo Vienamo
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