[U-Boot] [PATCH v3 1/2] armv8: layerscape: Enable EHCI access for LS1012A

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* [U-Boot] [PATCH v3 1/2] armv8: layerscape: Enable EHCI access for LS1012A
@ 2018-08-03  7:55 Ran Wang
  2018-08-03  7:55 ` [U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file Ran Wang
  0 siblings, 1 reply; 4+ messages in thread
From: Ran Wang @ 2018-08-03  7:55 UTC (permalink / raw)
  To: u-boot

Program Central Security Unit (CSU) to grant access
permission for USB 2.0 controller, otherwiase EHCI funciton will down.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
Change in v3:
	- None

Change in v2:
    - Add EL checking code to make sure related programming only happen
      in EL3

 arch/arm/cpu/armv8/fsl-layerscape/soc.c              | 9 +++++++++
 arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 6a56269..d8c3083 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -14,6 +14,7 @@
 #include <asm/io.h>
 #include <asm/global_data.h>
 #include <asm/arch-fsl-layerscape/config.h>
+#include <asm/arch-fsl-layerscape/ns_access.h>
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
 #include <fsl_csu.h>
 #endif
@@ -668,6 +669,14 @@ void fsl_lsch2_early_init_f(void)
 			 CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
 	}
 
+	/*
+	 * Program Central Security Unit (CSU) to grant access
+	 * permission for USB 2.0 controller
+	 */
+#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
+	if (current_el() == 3)
+		set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW);
+#endif
 	/* Erratum */
 	erratum_a008850_early(); /* part 1 of 2 */
 	erratum_a009929();
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index fe97a93..d1b8efa 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -40,6 +40,7 @@ enum csu_cslx_ind {
 	CSU_CSLX_ESDHC,
 	CSU_CSLX_IFC = 45,
 	CSU_CSLX_I2C1,
+	CSU_CSLX_USB_2,
 	CSU_CSLX_I2C3 = 48,
 	CSU_CSLX_I2C2,
 	CSU_CSLX_DUART2 = 50,
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file.
  2018-08-03  7:55 [U-Boot] [PATCH v3 1/2] armv8: layerscape: Enable EHCI access for LS1012A Ran Wang
@ 2018-08-03  7:55 ` Ran Wang
  2018-08-09 19:45   ` York Sun
  0 siblings, 1 reply; 4+ messages in thread
From: Ran Wang @ 2018-08-03  7:55 UTC (permalink / raw)
  To: u-boot

Since more c files will include ns_access.h, this move will fix some
compiling warnings and make it sense.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
Change in v3:
	- New file

 .../include/asm/arch-fsl-layerscape/ns_access.h    | 80 ----------------------
 board/freescale/common/ns_access.c                 | 80 ++++++++++++++++++++++
 2 files changed, 80 insertions(+), 80 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index d1b8efa..2e33d53 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -89,84 +89,4 @@ enum csu_cslx_ind {
 	CSU_CSLX_DSCR = 121,
 };
 
-static struct csu_ns_dev ns_dev[] = {
-	 {CSU_CSLX_PCIE2_IO, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE1_IO, CSU_ALL_RW},
-	 {CSU_CSLX_MG2TPR_IP, CSU_ALL_RW},
-	 {CSU_CSLX_IFC_MEM, CSU_ALL_RW},
-	 {CSU_CSLX_OCRAM, CSU_ALL_RW},
-	 {CSU_CSLX_GIC, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE1, CSU_ALL_RW},
-	 {CSU_CSLX_OCRAM2, CSU_ALL_RW},
-	 {CSU_CSLX_QSPI_MEM, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE2, CSU_ALL_RW},
-	 {CSU_CSLX_SATA, CSU_ALL_RW},
-	 {CSU_CSLX_USB1, CSU_ALL_RW},
-	 {CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE3, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
-	 {CSU_CSLX_USB3, CSU_ALL_RW},
-	 {CSU_CSLX_USB2, CSU_ALL_RW},
-	 {CSU_CSLX_PFE, CSU_ALL_RW},
-	 {CSU_CSLX_SERDES, CSU_ALL_RW},
-	 {CSU_CSLX_QDMA, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART2, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART1, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART4, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART3, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART6, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART5, CSU_ALL_RW},
-	 {CSU_CSLX_DSPI1, CSU_ALL_RW},
-	 {CSU_CSLX_QSPI, CSU_ALL_RW},
-	 {CSU_CSLX_ESDHC, CSU_ALL_RW},
-	 {CSU_CSLX_IFC, CSU_ALL_RW},
-	 {CSU_CSLX_I2C1, CSU_ALL_RW},
-	 {CSU_CSLX_I2C3, CSU_ALL_RW},
-	 {CSU_CSLX_I2C2, CSU_ALL_RW},
-	 {CSU_CSLX_DUART2, CSU_ALL_RW},
-	 {CSU_CSLX_DUART1, CSU_ALL_RW},
-	 {CSU_CSLX_WDT2, CSU_ALL_RW},
-	 {CSU_CSLX_WDT1, CSU_ALL_RW},
-	 {CSU_CSLX_EDMA, CSU_ALL_RW},
-	 {CSU_CSLX_SYS_CNT, CSU_ALL_RW},
-	 {CSU_CSLX_DMA_MUX2, CSU_ALL_RW},
-	 {CSU_CSLX_DMA_MUX1, CSU_ALL_RW},
-	 {CSU_CSLX_DDR, CSU_ALL_RW},
-	 {CSU_CSLX_QUICC, CSU_ALL_RW},
-	 {CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW},
-	 {CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW},
-	 {CSU_CSLX_SFP, CSU_ALL_RW},
-	 {CSU_CSLX_TMU, CSU_ALL_RW},
-	 {CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW},
-	 {CSU_CSLX_SCFG, CSU_ALL_RW},
-	 {CSU_CSLX_FM, CSU_ALL_RW},
-	 {CSU_CSLX_SEC5_5, CSU_ALL_RW},
-	 {CSU_CSLX_BM, CSU_ALL_RW},
-	 {CSU_CSLX_QM, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO2, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO1, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO4, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO3, CSU_ALL_RW},
-	 {CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW},
-	 {CSU_CSLX_CSU, CSU_ALL_RW},
-	 {CSU_CSLX_IIC4, CSU_ALL_RW},
-	 {CSU_CSLX_WDT4, CSU_ALL_RW},
-	 {CSU_CSLX_WDT3, CSU_ALL_RW},
-	 {CSU_CSLX_ESDHC2, CSU_ALL_RW},
-	 {CSU_CSLX_WDT5, CSU_ALL_RW},
-	 {CSU_CSLX_SAI2, CSU_ALL_RW},
-	 {CSU_CSLX_SAI1, CSU_ALL_RW},
-	 {CSU_CSLX_SAI4, CSU_ALL_RW},
-	 {CSU_CSLX_SAI3, CSU_ALL_RW},
-	 {CSU_CSLX_FTM2, CSU_ALL_RW},
-	 {CSU_CSLX_FTM1, CSU_ALL_RW},
-	 {CSU_CSLX_FTM4, CSU_ALL_RW},
-	 {CSU_CSLX_FTM3, CSU_ALL_RW},
-	 {CSU_CSLX_FTM6, CSU_ALL_RW},
-	 {CSU_CSLX_FTM5, CSU_ALL_RW},
-	 {CSU_CSLX_FTM8, CSU_ALL_RW},
-	 {CSU_CSLX_FTM7, CSU_ALL_RW},
-	 {CSU_CSLX_DSCR, CSU_ALL_RW},
-};
-
 #endif
diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c
index 0c3a54c..a7c16e7 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -10,6 +10,86 @@
 #include <asm/arch/ns_access.h>
 #include <asm/arch/fsl_serdes.h>
 
+static struct csu_ns_dev ns_dev[] = {
+	 {CSU_CSLX_PCIE2_IO, CSU_ALL_RW},
+	 {CSU_CSLX_PCIE1_IO, CSU_ALL_RW},
+	 {CSU_CSLX_MG2TPR_IP, CSU_ALL_RW},
+	 {CSU_CSLX_IFC_MEM, CSU_ALL_RW},
+	 {CSU_CSLX_OCRAM, CSU_ALL_RW},
+	 {CSU_CSLX_GIC, CSU_ALL_RW},
+	 {CSU_CSLX_PCIE1, CSU_ALL_RW},
+	 {CSU_CSLX_OCRAM2, CSU_ALL_RW},
+	 {CSU_CSLX_QSPI_MEM, CSU_ALL_RW},
+	 {CSU_CSLX_PCIE2, CSU_ALL_RW},
+	 {CSU_CSLX_SATA, CSU_ALL_RW},
+	 {CSU_CSLX_USB1, CSU_ALL_RW},
+	 {CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW},
+	 {CSU_CSLX_PCIE3, CSU_ALL_RW},
+	 {CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
+	 {CSU_CSLX_USB3, CSU_ALL_RW},
+	 {CSU_CSLX_USB2, CSU_ALL_RW},
+	 {CSU_CSLX_PFE, CSU_ALL_RW},
+	 {CSU_CSLX_SERDES, CSU_ALL_RW},
+	 {CSU_CSLX_QDMA, CSU_ALL_RW},
+	 {CSU_CSLX_LPUART2, CSU_ALL_RW},
+	 {CSU_CSLX_LPUART1, CSU_ALL_RW},
+	 {CSU_CSLX_LPUART4, CSU_ALL_RW},
+	 {CSU_CSLX_LPUART3, CSU_ALL_RW},
+	 {CSU_CSLX_LPUART6, CSU_ALL_RW},
+	 {CSU_CSLX_LPUART5, CSU_ALL_RW},
+	 {CSU_CSLX_DSPI1, CSU_ALL_RW},
+	 {CSU_CSLX_QSPI, CSU_ALL_RW},
+	 {CSU_CSLX_ESDHC, CSU_ALL_RW},
+	 {CSU_CSLX_IFC, CSU_ALL_RW},
+	 {CSU_CSLX_I2C1, CSU_ALL_RW},
+	 {CSU_CSLX_I2C3, CSU_ALL_RW},
+	 {CSU_CSLX_I2C2, CSU_ALL_RW},
+	 {CSU_CSLX_DUART2, CSU_ALL_RW},
+	 {CSU_CSLX_DUART1, CSU_ALL_RW},
+	 {CSU_CSLX_WDT2, CSU_ALL_RW},
+	 {CSU_CSLX_WDT1, CSU_ALL_RW},
+	 {CSU_CSLX_EDMA, CSU_ALL_RW},
+	 {CSU_CSLX_SYS_CNT, CSU_ALL_RW},
+	 {CSU_CSLX_DMA_MUX2, CSU_ALL_RW},
+	 {CSU_CSLX_DMA_MUX1, CSU_ALL_RW},
+	 {CSU_CSLX_DDR, CSU_ALL_RW},
+	 {CSU_CSLX_QUICC, CSU_ALL_RW},
+	 {CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW},
+	 {CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW},
+	 {CSU_CSLX_SFP, CSU_ALL_RW},
+	 {CSU_CSLX_TMU, CSU_ALL_RW},
+	 {CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW},
+	 {CSU_CSLX_SCFG, CSU_ALL_RW},
+	 {CSU_CSLX_FM, CSU_ALL_RW},
+	 {CSU_CSLX_SEC5_5, CSU_ALL_RW},
+	 {CSU_CSLX_BM, CSU_ALL_RW},
+	 {CSU_CSLX_QM, CSU_ALL_RW},
+	 {CSU_CSLX_GPIO2, CSU_ALL_RW},
+	 {CSU_CSLX_GPIO1, CSU_ALL_RW},
+	 {CSU_CSLX_GPIO4, CSU_ALL_RW},
+	 {CSU_CSLX_GPIO3, CSU_ALL_RW},
+	 {CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW},
+	 {CSU_CSLX_CSU, CSU_ALL_RW},
+	 {CSU_CSLX_IIC4, CSU_ALL_RW},
+	 {CSU_CSLX_WDT4, CSU_ALL_RW},
+	 {CSU_CSLX_WDT3, CSU_ALL_RW},
+	 {CSU_CSLX_ESDHC2, CSU_ALL_RW},
+	 {CSU_CSLX_WDT5, CSU_ALL_RW},
+	 {CSU_CSLX_SAI2, CSU_ALL_RW},
+	 {CSU_CSLX_SAI1, CSU_ALL_RW},
+	 {CSU_CSLX_SAI4, CSU_ALL_RW},
+	 {CSU_CSLX_SAI3, CSU_ALL_RW},
+	 {CSU_CSLX_FTM2, CSU_ALL_RW},
+	 {CSU_CSLX_FTM1, CSU_ALL_RW},
+	 {CSU_CSLX_FTM4, CSU_ALL_RW},
+	 {CSU_CSLX_FTM3, CSU_ALL_RW},
+	 {CSU_CSLX_FTM6, CSU_ALL_RW},
+	 {CSU_CSLX_FTM5, CSU_ALL_RW},
+	 {CSU_CSLX_FTM8, CSU_ALL_RW},
+	 {CSU_CSLX_FTM7, CSU_ALL_RW},
+	 {CSU_CSLX_DSCR, CSU_ALL_RW},
+};
+
 void set_devices_ns_access(unsigned long index, u16 val)
 {
 	u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file.
  2018-08-03  7:55 ` [U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file Ran Wang
@ 2018-08-09 19:45   ` York Sun
  2018-08-10  3:10     ` Ran Wang
  0 siblings, 1 reply; 4+ messages in thread
From: York Sun @ 2018-08-09 19:45 UTC (permalink / raw)
  To: u-boot

On 08/03/2018 12:56 AM, Ran Wang wrote:
> Since more c files will include ns_access.h, this move will fix some
> compiling warnings and make it sense.
> 
> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> ---
> Change in v3:
> 	- New file
> 
>  .../include/asm/arch-fsl-layerscape/ns_access.h    | 80 ----------------------
>  board/freescale/common/ns_access.c                 | 80 ++++++++++++++++++++++
>  2 files changed, 80 insertions(+), 80 deletions(-)
> 

Two issues with this patch. First this patch should be in front of your
patch #1. Otherwise you patch #1 has this compiling warning

warning: ?ns_dev? defined but not used [-Wunused-variable]

Second issue is for ls1021a. You will see compiling failure.

York

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file.
  2018-08-09 19:45   ` York Sun
@ 2018-08-10  3:10     ` Ran Wang
  0 siblings, 0 replies; 4+ messages in thread
From: Ran Wang @ 2018-08-10  3:10 UTC (permalink / raw)
  To: u-boot

Hi York,

> -----Original Message-----
> From: York Sun
> Sent: Friday, August 10, 2018 03:46
> To: Ran Wang <ran.wang_1@nxp.com>
> Cc: u-boot at lists.denx.de
> Subject: Re: [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h
> to c file.
> 
> On 08/03/2018 12:56 AM, Ran Wang wrote:
> > Since more c files will include ns_access.h, this move will fix some
> > compiling warnings and make it sense.
> >
> > Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> > ---
> > Change in v3:
> > 	- New file
> >
> >  .../include/asm/arch-fsl-layerscape/ns_access.h    | 80 ----------------------
> >  board/freescale/common/ns_access.c                 | 80
> ++++++++++++++++++++++
> >  2 files changed, 80 insertions(+), 80 deletions(-)
> >
> 
> Two issues with this patch. First this patch should be in front of your patch
> #1. Otherwise you patch #1 has this compiling warning
> 
> warning: ?ns_dev? defined but not used [-Wunused-variable]
 
OK, will change the patch order

> Second issue is for ls1021a. You will see compiling failure.

Yes, I just located the issue, will fix it in next version, thanks for point out

Ran
> 
> York

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-08-10  3:10 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-03  7:55 [U-Boot] [PATCH v3 1/2] armv8: layerscape: Enable EHCI access for LS1012A Ran Wang
2018-08-03  7:55 ` [U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file Ran Wang
2018-08-09 19:45   ` York Sun
2018-08-10  3:10     ` Ran Wang

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