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From: Atish Patra <atish.patra@wdc.com>
To: palmer@sifive.com, linux-riscv@lists.infradead.org
Cc: mark.rutland@arm.com, hch@infradead.org, anup@brainfault.org,
	atish.patra@wdc.com, tglx@linutronix.de,
	linux-kernel@vger.kernel.org, Damien.LeMoal@wdc.com,
	marc.zyngier@arm.com, jeremy.linton@arm.com,
	gregkh@linuxfoundation.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, dmitriy@oss-tech.org,
	ard.biesheuvel@linaro.org
Subject: [PATCH v4 04/12] RISC-V: Comment on the TLB flush in smp_callin()
Date: Tue, 11 Sep 2018 13:05:31 -0700	[thread overview]
Message-ID: <1536696339-15204-5-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1536696339-15204-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

This isn't readily apparent from reading the code.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/kernel/smpboot.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 56abab6a..712e9ca8 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -106,6 +106,10 @@ asmlinkage void __init smp_callin(void)
 	trap_init();
 	notify_cpu_starting(smp_processor_id());
 	set_cpu_online(smp_processor_id(), 1);
+	/*
+	 * Remote TLB flushes are ignored while the CPU is offline, so emit
+	 * a local TLB flush right now just in case.
+	 */
 	local_flush_tlb_all();
 	local_irq_enable();
 	preempt_disable();
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: atish.patra@wdc.com (Atish Patra)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v4 04/12] RISC-V: Comment on the TLB flush in smp_callin()
Date: Tue, 11 Sep 2018 13:05:31 -0700	[thread overview]
Message-ID: <1536696339-15204-5-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1536696339-15204-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

This isn't readily apparent from reading the code.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/kernel/smpboot.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 56abab6a..712e9ca8 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -106,6 +106,10 @@ asmlinkage void __init smp_callin(void)
 	trap_init();
 	notify_cpu_starting(smp_processor_id());
 	set_cpu_online(smp_processor_id(), 1);
+	/*
+	 * Remote TLB flushes are ignored while the CPU is offline, so emit
+	 * a local TLB flush right now just in case.
+	 */
 	local_flush_tlb_all();
 	local_irq_enable();
 	preempt_disable();
-- 
2.7.4

  parent reply	other threads:[~2018-09-11 20:06 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-11 20:05 [PATCH v4 00/12] SMP cleanup and new features Atish Patra
2018-09-11 20:05 ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 01/12] RISC-V: No need to pass scause as arg to do_IRQ() Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 02/12] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Atish Patra
2018-09-11 20:05   ` [PATCH v4 02/12] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes} Atish Patra
2018-09-11 20:05 ` [PATCH v4 03/12] RISC-V: Filter ISA and MMU values in cpuinfo Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` Atish Patra [this message]
2018-09-11 20:05   ` [PATCH v4 04/12] RISC-V: Comment on the TLB flush in smp_callin() Atish Patra
2018-09-11 20:05 ` [PATCH v4 05/12] RISC-V: Disable preemption before enabling interrupts Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 06/12] RISC-V: Provide a cleaner raw_smp_processor_id() Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 07/12] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 08/12] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 09/12] RISC-V: Use mmgrab() Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 10/12] RISC-V: User WRITE_ONCE instead of direct access Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:32   ` Andreas Schwab
2018-09-11 20:32     ` Andreas Schwab
2018-09-13 18:21     ` Atish Patra
2018-09-13 18:21       ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 11/12] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-09-11 20:05   ` Atish Patra
2018-09-11 20:05 ` [PATCH v4 12/12] RISC-V: Use Linux logical cpu number instead of hartid Atish Patra
2018-09-11 20:05   ` Atish Patra

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