From: Stephen Boyd <swboyd@chromium.org>
To: Mark Brown <broonie@kernel.org>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>,
Doug Anderson <dianders@chromium.org>,
linux-arm-msm@vger.kernel.org,
Girish Mahadevan <girishm@codeaurora.org>,
Ryan Case <ryandcase@chromium.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation
Date: Fri, 21 Sep 2018 10:30:57 -0700 [thread overview]
Message-ID: <153755105782.119890.8484594239463905156@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180920224055.164856-1-ryandcase@chromium.org>
Quoting Ryan Case (2018-09-20 15:40:54)
> diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt
> new file mode 100644
> index 000000000000..ecfb1e2bd520
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt
> @@ -0,0 +1,36 @@
> +Qualcomm Quad Serial Peripheral Interface (QSPI)
> +
> +The QSPI controller allows SPI protocol communication in single, dual, or quad
> +wire transmission modes for read/write access to slaves such as NOR flash.
> +
> +Required properties:
> +- compatible: Should contain:
> + "qcom,sdm845-qspi"
Does someone have a more generic compatible string that can be added
here to indicate the type of quad SPI controller this is? I really doubt
this is a one-off hardware block for the specific SDM845 SoC.
> +- reg: Should contain the base register location and length.
> +- interrupts: Interrupt number used by the controller.
> +- clocks: Should contain the core and AHB clock.
> +- clock-names: Should be "core" for core clock and "iface" for AHB clock.
> +
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <swboyd@chromium.org>
To: Mark Brown <broonie@kernel.org>, Ryan Case <ryandcase@chromium.org>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>,
Doug Anderson <dianders@chromium.org>,
linux-arm-msm@vger.kernel.org,
Girish Mahadevan <girishm@codeaurora.org>,
Ryan Case <ryandcase@chromium.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation
Date: Fri, 21 Sep 2018 10:30:57 -0700 [thread overview]
Message-ID: <153755105782.119890.8484594239463905156@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180920224055.164856-1-ryandcase@chromium.org>
Quoting Ryan Case (2018-09-20 15:40:54)
> diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt
> new file mode 100644
> index 000000000000..ecfb1e2bd520
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt
> @@ -0,0 +1,36 @@
> +Qualcomm Quad Serial Peripheral Interface (QSPI)
> +
> +The QSPI controller allows SPI protocol communication in single, dual, or quad
> +wire transmission modes for read/write access to slaves such as NOR flash.
> +
> +Required properties:
> +- compatible: Should contain:
> + "qcom,sdm845-qspi"
Does someone have a more generic compatible string that can be added
here to indicate the type of quad SPI controller this is? I really doubt
this is a one-off hardware block for the specific SDM845 SoC.
> +- reg: Should contain the base register location and length.
> +- interrupts: Interrupt number used by the controller.
> +- clocks: Should contain the core and AHB clock.
> +- clock-names: Should be "core" for core clock and "iface" for AHB clock.
> +
next prev parent reply other threads:[~2018-09-21 17:30 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-20 22:40 [PATCH v2 1/2] dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation Ryan Case
2018-09-20 22:40 ` [PATCH v2 2/2] spi: Introduce new driver for Qualcomm QuadSPI controller Ryan Case
2018-09-20 22:46 ` Randy Dunlap
2018-09-20 23:47 ` Ryan Case
2018-09-21 16:31 ` Mark Brown
2018-09-21 17:30 ` Stephen Boyd [this message]
2018-09-21 17:30 ` [PATCH v2 1/2] dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation Stephen Boyd
2018-09-21 17:39 ` Mark Brown
2018-09-21 18:33 ` Trent Piepho
2018-09-21 17:40 ` Doug Anderson
2018-09-21 18:40 ` Stephen Boyd
2018-09-21 18:48 ` Doug Anderson
2018-09-21 18:51 ` Mark Brown
2018-09-23 3:45 ` Stephen Boyd
2018-09-24 17:13 ` Doug Anderson
2018-09-24 18:23 ` Trent Piepho
2018-09-25 16:02 ` Doug Anderson
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