[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Laurent Pinchart]

Hello,

This patch set fixes conversion from a GPIO number to an IRQ number in the
sh-pfc driver in the device tree case.

Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix in
patch 06/10. As explained in patch 06/10 commit message, on non-DT platforms
IRQ controllers associated with the GPIOs have a fixed IRQ base value known at
compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a
hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values
are dynamic in that case.

The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
resources, populated automatically from the device tree. When IRQ resources
are specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0, R8A73A4
and R9A7740 SoCs. The only missing platform here is SH7372 due to its very
uncomplete DT support. All other Renesas ARM platforms use a standaline GPIO
driver and are thus not affected.

Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
allowing the whole patch set to the tested.

The sh-pfc changes need to be merged first. Linus, could you please provide a
stable branch with the first 6 patches when you will apply them to your tree ?

Laurent Pinchart (10):
  sh-pfc: Turn unsigned indices into unsigned int
  sh-pfc: Terminate gpios array by -1
  sh-pfc: sh73a0: Add missing IRQ15
  sh-pfc: sh73a0: Sort IRQ entries by IRQ number
  sh-pfc: Rename sh_pfc window field to windows
  sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
  ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
  ARM: shmobile: r8a7740: Specify PFC interrupts in DT
  ARM: shmobile: sh73a0: Specify PFC interrupts in DT
  ARM: shmobile: armadillo: dts: Add gpio-keys device

 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 ++++
 arch/arm/boot/dts/r8a73a4.dtsi                     | 16 +++++
 .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 +++++++++
 arch/arm/boot/dts/r8a7740.dtsi                     |  9 +++
 arch/arm/boot/dts/sh73a0.dtsi                      |  9 +++
 drivers/pinctrl/sh-pfc/core.c                      | 76 ++++++++++++++++------
 drivers/pinctrl/sh-pfc/core.h                      |  4 +-
 drivers/pinctrl/sh-pfc/gpio.c                      | 24 +++++--
 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c               |  4 +-
 drivers/pinctrl/sh-pfc/pfc-r8a7740.c               |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh7372.c                |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c                | 54 +++++++--------
 drivers/pinctrl/sh-pfc/sh_pfc.h                    |  4 +-
 13 files changed, 188 insertions(+), 59 deletions(-)

-- 
Regards,

Laurent Pinchart

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Laurent Pinchart]

Hello,

This patch set fixes conversion from a GPIO number to an IRQ number in the
sh-pfc driver in the device tree case.

Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix in
patch 06/10. As explained in patch 06/10 commit message, on non-DT platforms
IRQ controllers associated with the GPIOs have a fixed IRQ base value known at
compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a
hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values
are dynamic in that case.

The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
resources, populated automatically from the device tree. When IRQ resources
are specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0, R8A73A4
and R9A7740 SoCs. The only missing platform here is SH7372 due to its very
uncomplete DT support. All other Renesas ARM platforms use a standaline GPIO
driver and are thus not affected.

Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
allowing the whole patch set to the tested.

The sh-pfc changes need to be merged first. Linus, could you please provide a
stable branch with the first 6 patches when you will apply them to your tree ?

Laurent Pinchart (10):
  sh-pfc: Turn unsigned indices into unsigned int
  sh-pfc: Terminate gpios array by -1
  sh-pfc: sh73a0: Add missing IRQ15
  sh-pfc: sh73a0: Sort IRQ entries by IRQ number
  sh-pfc: Rename sh_pfc window field to windows
  sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
  ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
  ARM: shmobile: r8a7740: Specify PFC interrupts in DT
  ARM: shmobile: sh73a0: Specify PFC interrupts in DT
  ARM: shmobile: armadillo: dts: Add gpio-keys device

 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 ++++
 arch/arm/boot/dts/r8a73a4.dtsi                     | 16 +++++
 .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 +++++++++
 arch/arm/boot/dts/r8a7740.dtsi                     |  9 +++
 arch/arm/boot/dts/sh73a0.dtsi                      |  9 +++
 drivers/pinctrl/sh-pfc/core.c                      | 76 ++++++++++++++++------
 drivers/pinctrl/sh-pfc/core.h                      |  4 +-
 drivers/pinctrl/sh-pfc/gpio.c                      | 24 +++++--
 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c               |  4 +-
 drivers/pinctrl/sh-pfc/pfc-r8a7740.c               |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh7372.c                |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c                | 54 +++++++--------
 drivers/pinctrl/sh-pfc/sh_pfc.h                    |  4 +-
 13 files changed, 188 insertions(+), 59 deletions(-)

-- 
Regards,

Laurent Pinchart

[PATCH 01/10] sh-pfc: Turn unsigned indices into unsigned int

[Laurent Pinchart]

Some indices take positive values only, make them unsigned.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/core.c | 8 ++++----
 drivers/pinctrl/sh-pfc/gpio.c | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index d77ece5..06e648b 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -29,7 +29,7 @@
 static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
 {
 	struct resource *res;
-	int k;
+	unsigned int k;
 
 	if (pdev->num_resources = 0)
 		return -EINVAL;
@@ -147,7 +147,7 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
 				     unsigned long *maskp,
 				     unsigned long *posp)
 {
-	int k;
+	unsigned int k;
 
 	*mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
 
@@ -196,7 +196,7 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,
 {
 	const struct pinmux_cfg_reg *config_reg;
 	unsigned long r_width, f_width, curr_width, ncomb;
-	int k, m, n, pos, bit_pos;
+	unsigned int k, m, n, pos, bit_pos;
 
 	k = 0;
 	while (1) {
@@ -238,7 +238,7 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,
 			      u16 *enum_idp)
 {
 	const u16 *data = pfc->info->gpio_data;
-	int k;
+	unsigned int k;
 
 	if (pos) {
 		*enum_idp = data[pos + 1];
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 04bf52b..3d30e6e 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -204,7 +204,7 @@ static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 {
 	struct sh_pfc *pfc = gpio_to_pfc(gc);
-	int i, k;
+	unsigned int i, k;
 
 	for (i = 0; i < pfc->info->gpio_irq_size; i++) {
 		unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
-- 
1.8.3.2

[PATCH 01/10] sh-pfc: Turn unsigned indices into unsigned int

[Laurent Pinchart]

Some indices take positive values only, make them unsigned.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/core.c | 8 ++++----
 drivers/pinctrl/sh-pfc/gpio.c | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index d77ece5..06e648b 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -29,7 +29,7 @@
 static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
 {
 	struct resource *res;
-	int k;
+	unsigned int k;
 
 	if (pdev->num_resources == 0)
 		return -EINVAL;
@@ -147,7 +147,7 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
 				     unsigned long *maskp,
 				     unsigned long *posp)
 {
-	int k;
+	unsigned int k;
 
 	*mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
 
@@ -196,7 +196,7 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,
 {
 	const struct pinmux_cfg_reg *config_reg;
 	unsigned long r_width, f_width, curr_width, ncomb;
-	int k, m, n, pos, bit_pos;
+	unsigned int k, m, n, pos, bit_pos;
 
 	k = 0;
 	while (1) {
@@ -238,7 +238,7 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,
 			      u16 *enum_idp)
 {
 	const u16 *data = pfc->info->gpio_data;
-	int k;
+	unsigned int k;
 
 	if (pos) {
 		*enum_idp = data[pos + 1];
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 04bf52b..3d30e6e 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -204,7 +204,7 @@ static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 {
 	struct sh_pfc *pfc = gpio_to_pfc(gc);
-	int i, k;
+	unsigned int i, k;
 
 	for (i = 0; i < pfc->info->gpio_irq_size; i++) {
 		unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
-- 
1.8.3.2

Re: [PATCH 01/10] sh-pfc: Turn unsigned indices into unsigned int

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> Some indices take positive values only, make them unsigned.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 01/10] sh-pfc: Turn unsigned indices into unsigned int

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> Some indices take positive values only, make them unsigned.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 02/10] sh-pfc: Terminate gpios array by -1

[Laurent Pinchart]

0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ
lists.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/gpio.c   | 4 ++--
 drivers/pinctrl/sh-pfc/sh_pfc.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 3d30e6e..c24be81 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -207,9 +207,9 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 	unsigned int i, k;
 
 	for (i = 0; i < pfc->info->gpio_irq_size; i++) {
-		unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
+		short *gpios = pfc->info->gpio_irq[i].gpios;
 
-		for (k = 0; gpios[k]; k++) {
+		for (k = 0; gpios[k] >= 0; k++) {
 			if (gpios[k] = offset)
 				return pfc->info->gpio_irq[i].irq;
 		}
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 11bd0d9..cd040e0 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -94,11 +94,11 @@ struct pinmux_data_reg {
 
 struct pinmux_irq {
 	int irq;
-	unsigned short *gpios;
+	short *gpios;
 };
 
 #define PINMUX_IRQ(irq_nr, ids...)			   \
-	{ .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } }	\
+	{ .irq = irq_nr, .gpios = (short []) { ids, -1 } }
 
 struct pinmux_range {
 	u16 begin;
-- 
1.8.3.2

[PATCH 02/10] sh-pfc: Terminate gpios array by -1

[Laurent Pinchart]

0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ
lists.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/gpio.c   | 4 ++--
 drivers/pinctrl/sh-pfc/sh_pfc.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 3d30e6e..c24be81 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -207,9 +207,9 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 	unsigned int i, k;
 
 	for (i = 0; i < pfc->info->gpio_irq_size; i++) {
-		unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
+		short *gpios = pfc->info->gpio_irq[i].gpios;
 
-		for (k = 0; gpios[k]; k++) {
+		for (k = 0; gpios[k] >= 0; k++) {
 			if (gpios[k] == offset)
 				return pfc->info->gpio_irq[i].irq;
 		}
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 11bd0d9..cd040e0 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -94,11 +94,11 @@ struct pinmux_data_reg {
 
 struct pinmux_irq {
 	int irq;
-	unsigned short *gpios;
+	short *gpios;
 };
 
 #define PINMUX_IRQ(irq_nr, ids...)			   \
-	{ .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } }	\
+	{ .irq = irq_nr, .gpios = (short []) { ids, -1 } }
 
 struct pinmux_range {
 	u16 begin;
-- 
1.8.3.2

Re: [PATCH 02/10] sh-pfc: Terminate gpios array by -1

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> 0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ
> lists.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Another solution to the same problem: terminate with
USHRT_MAX and for (k = 0; gpios[k] != USHRT_MAX; k++) {}
but this works too...

Yours,
Linus Walleij

[PATCH 02/10] sh-pfc: Terminate gpios array by -1

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> 0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ
> lists.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Another solution to the same problem: terminate with
USHRT_MAX and for (k = 0; gpios[k] != USHRT_MAX; k++) {}
but this works too...

Yours,
Linus Walleij

[PATCH 03/10] sh-pfc: sh73a0: Add missing IRQ15

[Laurent Pinchart]

The external IRQ15 input multiplexed on GPIO 0 is missing. Add it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 7e278a9..f47df12 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3661,6 +3661,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
 };
 
 static const struct pinmux_irq pinmux_irqs[] = {
+	PINMUX_IRQ(irq_pin(15), 0),
 	PINMUX_IRQ(irq_pin(19), 9),
 	PINMUX_IRQ(irq_pin(1), 10),
 	PINMUX_IRQ(irq_pin(0), 11),
-- 
1.8.3.2

[PATCH 03/10] sh-pfc: sh73a0: Add missing IRQ15

[Laurent Pinchart]

The external IRQ15 input multiplexed on GPIO 0 is missing. Add it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 7e278a9..f47df12 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3661,6 +3661,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
 };
 
 static const struct pinmux_irq pinmux_irqs[] = {
+	PINMUX_IRQ(irq_pin(15), 0),
 	PINMUX_IRQ(irq_pin(19), 9),
 	PINMUX_IRQ(irq_pin(1), 10),
 	PINMUX_IRQ(irq_pin(0), 11),
-- 
1.8.3.2

Re: [PATCH 03/10] sh-pfc: sh73a0: Add missing IRQ15

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> The external IRQ15 input multiplexed on GPIO 0 is missing. Add it.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 03/10] sh-pfc: sh73a0: Add missing IRQ15

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> The external IRQ15 input multiplexed on GPIO 0 is missing. Add it.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 04/10] sh-pfc: sh73a0: Sort IRQ entries by IRQ number

[Laurent Pinchart]

This makes catching duplicate entries easier. Merge the two IRQ9 entries
found after sorting.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 47 ++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 24 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index f47df12..d6c57dd 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3661,39 +3661,38 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
 };
 
 static const struct pinmux_irq pinmux_irqs[] = {
-	PINMUX_IRQ(irq_pin(15), 0),
-	PINMUX_IRQ(irq_pin(19), 9),
-	PINMUX_IRQ(irq_pin(1), 10),
 	PINMUX_IRQ(irq_pin(0), 11),
+	PINMUX_IRQ(irq_pin(1), 10),
+	PINMUX_IRQ(irq_pin(2), 149),
+	PINMUX_IRQ(irq_pin(3), 224),
+	PINMUX_IRQ(irq_pin(4), 159),
+	PINMUX_IRQ(irq_pin(5), 227),
+	PINMUX_IRQ(irq_pin(6), 147),
+	PINMUX_IRQ(irq_pin(7), 150),
+	PINMUX_IRQ(irq_pin(8), 223),
+	PINMUX_IRQ(irq_pin(9), 56, 308),
+	PINMUX_IRQ(irq_pin(10), 54),
+	PINMUX_IRQ(irq_pin(11), 238),
+	PINMUX_IRQ(irq_pin(12), 156),
+	PINMUX_IRQ(irq_pin(13), 239),
+	PINMUX_IRQ(irq_pin(14), 251),
+	PINMUX_IRQ(irq_pin(15), 0),
+	PINMUX_IRQ(irq_pin(16), 249),
+	PINMUX_IRQ(irq_pin(17), 234),
 	PINMUX_IRQ(irq_pin(18), 13),
+	PINMUX_IRQ(irq_pin(19), 9),
 	PINMUX_IRQ(irq_pin(20), 14),
 	PINMUX_IRQ(irq_pin(21), 15),
-	PINMUX_IRQ(irq_pin(31), 26),
-	PINMUX_IRQ(irq_pin(30), 27),
-	PINMUX_IRQ(irq_pin(29), 28),
 	PINMUX_IRQ(irq_pin(22), 40),
 	PINMUX_IRQ(irq_pin(23), 53),
-	PINMUX_IRQ(irq_pin(10), 54),
-	PINMUX_IRQ(irq_pin(9), 56),
+	PINMUX_IRQ(irq_pin(24), 118),
+	PINMUX_IRQ(irq_pin(25), 164),
 	PINMUX_IRQ(irq_pin(26), 115),
 	PINMUX_IRQ(irq_pin(27), 116),
 	PINMUX_IRQ(irq_pin(28), 117),
-	PINMUX_IRQ(irq_pin(24), 118),
-	PINMUX_IRQ(irq_pin(6), 147),
-	PINMUX_IRQ(irq_pin(2), 149),
-	PINMUX_IRQ(irq_pin(7), 150),
-	PINMUX_IRQ(irq_pin(12), 156),
-	PINMUX_IRQ(irq_pin(4), 159),
-	PINMUX_IRQ(irq_pin(25), 164),
-	PINMUX_IRQ(irq_pin(8), 223),
-	PINMUX_IRQ(irq_pin(3), 224),
-	PINMUX_IRQ(irq_pin(5), 227),
-	PINMUX_IRQ(irq_pin(17), 234),
-	PINMUX_IRQ(irq_pin(11), 238),
-	PINMUX_IRQ(irq_pin(13), 239),
-	PINMUX_IRQ(irq_pin(16), 249),
-	PINMUX_IRQ(irq_pin(14), 251),
-	PINMUX_IRQ(irq_pin(9), 308),
+	PINMUX_IRQ(irq_pin(29), 28),
+	PINMUX_IRQ(irq_pin(30), 27),
+	PINMUX_IRQ(irq_pin(31), 26),
 };
 
 /* -----------------------------------------------------------------------------
-- 
1.8.3.2

[PATCH 04/10] sh-pfc: sh73a0: Sort IRQ entries by IRQ number

[Laurent Pinchart]

This makes catching duplicate entries easier. Merge the two IRQ9 entries
found after sorting.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 47 ++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 24 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index f47df12..d6c57dd 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3661,39 +3661,38 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
 };
 
 static const struct pinmux_irq pinmux_irqs[] = {
-	PINMUX_IRQ(irq_pin(15), 0),
-	PINMUX_IRQ(irq_pin(19), 9),
-	PINMUX_IRQ(irq_pin(1), 10),
 	PINMUX_IRQ(irq_pin(0), 11),
+	PINMUX_IRQ(irq_pin(1), 10),
+	PINMUX_IRQ(irq_pin(2), 149),
+	PINMUX_IRQ(irq_pin(3), 224),
+	PINMUX_IRQ(irq_pin(4), 159),
+	PINMUX_IRQ(irq_pin(5), 227),
+	PINMUX_IRQ(irq_pin(6), 147),
+	PINMUX_IRQ(irq_pin(7), 150),
+	PINMUX_IRQ(irq_pin(8), 223),
+	PINMUX_IRQ(irq_pin(9), 56, 308),
+	PINMUX_IRQ(irq_pin(10), 54),
+	PINMUX_IRQ(irq_pin(11), 238),
+	PINMUX_IRQ(irq_pin(12), 156),
+	PINMUX_IRQ(irq_pin(13), 239),
+	PINMUX_IRQ(irq_pin(14), 251),
+	PINMUX_IRQ(irq_pin(15), 0),
+	PINMUX_IRQ(irq_pin(16), 249),
+	PINMUX_IRQ(irq_pin(17), 234),
 	PINMUX_IRQ(irq_pin(18), 13),
+	PINMUX_IRQ(irq_pin(19), 9),
 	PINMUX_IRQ(irq_pin(20), 14),
 	PINMUX_IRQ(irq_pin(21), 15),
-	PINMUX_IRQ(irq_pin(31), 26),
-	PINMUX_IRQ(irq_pin(30), 27),
-	PINMUX_IRQ(irq_pin(29), 28),
 	PINMUX_IRQ(irq_pin(22), 40),
 	PINMUX_IRQ(irq_pin(23), 53),
-	PINMUX_IRQ(irq_pin(10), 54),
-	PINMUX_IRQ(irq_pin(9), 56),
+	PINMUX_IRQ(irq_pin(24), 118),
+	PINMUX_IRQ(irq_pin(25), 164),
 	PINMUX_IRQ(irq_pin(26), 115),
 	PINMUX_IRQ(irq_pin(27), 116),
 	PINMUX_IRQ(irq_pin(28), 117),
-	PINMUX_IRQ(irq_pin(24), 118),
-	PINMUX_IRQ(irq_pin(6), 147),
-	PINMUX_IRQ(irq_pin(2), 149),
-	PINMUX_IRQ(irq_pin(7), 150),
-	PINMUX_IRQ(irq_pin(12), 156),
-	PINMUX_IRQ(irq_pin(4), 159),
-	PINMUX_IRQ(irq_pin(25), 164),
-	PINMUX_IRQ(irq_pin(8), 223),
-	PINMUX_IRQ(irq_pin(3), 224),
-	PINMUX_IRQ(irq_pin(5), 227),
-	PINMUX_IRQ(irq_pin(17), 234),
-	PINMUX_IRQ(irq_pin(11), 238),
-	PINMUX_IRQ(irq_pin(13), 239),
-	PINMUX_IRQ(irq_pin(16), 249),
-	PINMUX_IRQ(irq_pin(14), 251),
-	PINMUX_IRQ(irq_pin(9), 308),
+	PINMUX_IRQ(irq_pin(29), 28),
+	PINMUX_IRQ(irq_pin(30), 27),
+	PINMUX_IRQ(irq_pin(31), 26),
 };
 
 /* -----------------------------------------------------------------------------
-- 
1.8.3.2

Re: [PATCH 04/10] sh-pfc: sh73a0: Sort IRQ entries by IRQ number

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> This makes catching duplicate entries easier. Merge the two IRQ9 entries
> found after sorting.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 04/10] sh-pfc: sh73a0: Sort IRQ entries by IRQ number

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> This makes catching duplicate entries easier. Merge the two IRQ9 entries
> found after sorting.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 05/10] sh-pfc: Rename sh_pfc window field to windows

[Laurent Pinchart]

There's more than one window, name the field windows.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/core.c        | 19 ++++++++++---------
 drivers/pinctrl/sh-pfc/core.h        |  2 +-
 drivers/pinctrl/sh-pfc/gpio.c        |  4 ++--
 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c |  4 ++--
 drivers/pinctrl/sh-pfc/pfc-r8a7740.c |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh7372.c  |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c  |  8 ++++----
 7 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 06e648b..7831f07 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -34,20 +34,21 @@ static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
 	if (pdev->num_resources = 0)
 		return -EINVAL;
 
-	pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
-				   sizeof(*pfc->window), GFP_NOWAIT);
-	if (!pfc->window)
+	pfc->windows = devm_kzalloc(pfc->dev, pdev->num_resources *
+				    sizeof(*pfc->windows), GFP_NOWAIT);
+	if (!pfc->windows)
 		return -ENOMEM;
 
 	pfc->num_windows = pdev->num_resources;
 
 	for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
 		WARN_ON(resource_type(res) != IORESOURCE_MEM);
-		pfc->window[k].phys = res->start;
-		pfc->window[k].size = resource_size(res);
-		pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
-							   resource_size(res));
-		if (!pfc->window[k].virt)
+		pfc->windows[k].phys = res->start;
+		pfc->windows[k].size = resource_size(res);
+		pfc->windows[k].virt +			devm_ioremap_nocache(pfc->dev, res->start,
+					     resource_size(res));
+		if (!pfc->windows[k].virt)
 			return -ENOMEM;
 	}
 
@@ -62,7 +63,7 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
 
 	/* scan through physical windows and convert address */
 	for (i = 0; i < pfc->num_windows; i++) {
-		window = pfc->window + i;
+		window = pfc->windows + i;
 
 		if (address < window->phys)
 			continue;
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index 11ea872..a83b747 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -37,7 +37,7 @@ struct sh_pfc {
 	spinlock_t lock;
 
 	unsigned int num_windows;
-	struct sh_pfc_window *window;
+	struct sh_pfc_window *windows;
 
 	struct sh_pfc_pin_range *ranges;
 	unsigned int nr_ranges;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index c24be81..6a21349 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -347,7 +347,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 	 * GPIOs.
 	 */
 	for (i = 0; i < pfc->num_windows; ++i) {
-		struct sh_pfc_window *window = &pfc->window[i];
+		struct sh_pfc_window *window = &pfc->windows[i];
 
 		if (pfc->info->data_regs[0].reg >= window->phys &&
 		    pfc->info->data_regs[0].reg < window->phys + window->size)
@@ -358,7 +358,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 		return 0;
 
 	/* Register the real GPIOs chip. */
-	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->window[i]);
+	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
 	if (IS_ERR(chip))
 		return PTR_ERR(chip);
 
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
index d25fd4e..5401cd7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
@@ -2691,7 +2691,7 @@ static unsigned int r8a73a4_pinmux_get_bias(struct sh_pfc *pfc,
 {
 	void __iomem *addr;
 
-	addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
+	addr = pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
 
 	switch (ioread8(addr) & PORTCR_PULMD_MASK) {
 	case PORTCR_PULMD_UP:
@@ -2710,7 +2710,7 @@ static void r8a73a4_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
 	void __iomem *addr;
 	u32 value;
 
-	addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
+	addr = pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
 	value = ioread8(addr) & ~PORTCR_PULMD_MASK;
 
 	switch (bias) {
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index 009174d..36e1b76 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -3721,7 +3721,7 @@ static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
 			&r8a7740_portcr_offsets[i];
 
 		if (i <= group->end_pin)
-			return pfc->window->virt + group->offset + pin;
+			return pfc->windows->virt + group->offset + pin;
 	}
 
 	return NULL;
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index 70b522d..d97bb0c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -2585,7 +2585,7 @@ static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
 			&sh7372_portcr_offsets[i];
 
 		if (i <= group->end_pin)
-			return pfc->window->virt + group->offset + pin;
+			return pfc->windows->virt + group->offset + pin;
 	}
 
 	return NULL;
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index d6c57dd..995bb69 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3702,7 +3702,7 @@ static const struct pinmux_irq pinmux_irqs[] = {
 static void sh73a0_vccq_mc0_endisable(struct regulator_dev *reg, bool enable)
 {
 	struct sh_pfc *pfc = reg->reg_data;
-	void __iomem *addr = pfc->window[1].virt + 4;
+	void __iomem *addr = pfc->windows[1].virt + 4;
 	unsigned long flags;
 	u32 value;
 
@@ -3735,7 +3735,7 @@ static int sh73a0_vccq_mc0_disable(struct regulator_dev *reg)
 static int sh73a0_vccq_mc0_is_enabled(struct regulator_dev *reg)
 {
 	struct sh_pfc *pfc = reg->reg_data;
-	void __iomem *addr = pfc->window[1].virt + 4;
+	void __iomem *addr = pfc->windows[1].virt + 4;
 	unsigned long flags;
 	u32 value;
 
@@ -3794,7 +3794,7 @@ static const unsigned int sh73a0_portcr_offsets[] = {
 
 static unsigned int sh73a0_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
 {
-	void __iomem *addr = pfc->window->virt
+	void __iomem *addr = pfc->windows->virt
 			   + sh73a0_portcr_offsets[pin >> 5] + pin;
 	u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;
 
@@ -3812,7 +3812,7 @@ static unsigned int sh73a0_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
 static void sh73a0_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
 				   unsigned int bias)
 {
-	void __iomem *addr = pfc->window->virt
+	void __iomem *addr = pfc->windows->virt
 			   + sh73a0_portcr_offsets[pin >> 5] + pin;
 	u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;
 
-- 
1.8.3.2

[PATCH 05/10] sh-pfc: Rename sh_pfc window field to windows

[Laurent Pinchart]

There's more than one window, name the field windows.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 drivers/pinctrl/sh-pfc/core.c        | 19 ++++++++++---------
 drivers/pinctrl/sh-pfc/core.h        |  2 +-
 drivers/pinctrl/sh-pfc/gpio.c        |  4 ++--
 drivers/pinctrl/sh-pfc/pfc-r8a73a4.c |  4 ++--
 drivers/pinctrl/sh-pfc/pfc-r8a7740.c |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh7372.c  |  2 +-
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c  |  8 ++++----
 7 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 06e648b..7831f07 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -34,20 +34,21 @@ static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
 	if (pdev->num_resources == 0)
 		return -EINVAL;
 
-	pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
-				   sizeof(*pfc->window), GFP_NOWAIT);
-	if (!pfc->window)
+	pfc->windows = devm_kzalloc(pfc->dev, pdev->num_resources *
+				    sizeof(*pfc->windows), GFP_NOWAIT);
+	if (!pfc->windows)
 		return -ENOMEM;
 
 	pfc->num_windows = pdev->num_resources;
 
 	for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
 		WARN_ON(resource_type(res) != IORESOURCE_MEM);
-		pfc->window[k].phys = res->start;
-		pfc->window[k].size = resource_size(res);
-		pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
-							   resource_size(res));
-		if (!pfc->window[k].virt)
+		pfc->windows[k].phys = res->start;
+		pfc->windows[k].size = resource_size(res);
+		pfc->windows[k].virt =
+			devm_ioremap_nocache(pfc->dev, res->start,
+					     resource_size(res));
+		if (!pfc->windows[k].virt)
 			return -ENOMEM;
 	}
 
@@ -62,7 +63,7 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
 
 	/* scan through physical windows and convert address */
 	for (i = 0; i < pfc->num_windows; i++) {
-		window = pfc->window + i;
+		window = pfc->windows + i;
 
 		if (address < window->phys)
 			continue;
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index 11ea872..a83b747 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -37,7 +37,7 @@ struct sh_pfc {
 	spinlock_t lock;
 
 	unsigned int num_windows;
-	struct sh_pfc_window *window;
+	struct sh_pfc_window *windows;
 
 	struct sh_pfc_pin_range *ranges;
 	unsigned int nr_ranges;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index c24be81..6a21349 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -347,7 +347,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 	 * GPIOs.
 	 */
 	for (i = 0; i < pfc->num_windows; ++i) {
-		struct sh_pfc_window *window = &pfc->window[i];
+		struct sh_pfc_window *window = &pfc->windows[i];
 
 		if (pfc->info->data_regs[0].reg >= window->phys &&
 		    pfc->info->data_regs[0].reg < window->phys + window->size)
@@ -358,7 +358,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 		return 0;
 
 	/* Register the real GPIOs chip. */
-	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->window[i]);
+	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
 	if (IS_ERR(chip))
 		return PTR_ERR(chip);
 
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
index d25fd4e..5401cd7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
@@ -2691,7 +2691,7 @@ static unsigned int r8a73a4_pinmux_get_bias(struct sh_pfc *pfc,
 {
 	void __iomem *addr;
 
-	addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
+	addr = pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
 
 	switch (ioread8(addr) & PORTCR_PULMD_MASK) {
 	case PORTCR_PULMD_UP:
@@ -2710,7 +2710,7 @@ static void r8a73a4_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
 	void __iomem *addr;
 	u32 value;
 
-	addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
+	addr = pfc->windows->virt + r8a73a4_portcr_offsets[pin >> 5] + pin;
 	value = ioread8(addr) & ~PORTCR_PULMD_MASK;
 
 	switch (bias) {
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index 009174d..36e1b76 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -3721,7 +3721,7 @@ static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
 			&r8a7740_portcr_offsets[i];
 
 		if (i <= group->end_pin)
-			return pfc->window->virt + group->offset + pin;
+			return pfc->windows->virt + group->offset + pin;
 	}
 
 	return NULL;
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index 70b522d..d97bb0c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -2585,7 +2585,7 @@ static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
 			&sh7372_portcr_offsets[i];
 
 		if (i <= group->end_pin)
-			return pfc->window->virt + group->offset + pin;
+			return pfc->windows->virt + group->offset + pin;
 	}
 
 	return NULL;
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index d6c57dd..995bb69 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3702,7 +3702,7 @@ static const struct pinmux_irq pinmux_irqs[] = {
 static void sh73a0_vccq_mc0_endisable(struct regulator_dev *reg, bool enable)
 {
 	struct sh_pfc *pfc = reg->reg_data;
-	void __iomem *addr = pfc->window[1].virt + 4;
+	void __iomem *addr = pfc->windows[1].virt + 4;
 	unsigned long flags;
 	u32 value;
 
@@ -3735,7 +3735,7 @@ static int sh73a0_vccq_mc0_disable(struct regulator_dev *reg)
 static int sh73a0_vccq_mc0_is_enabled(struct regulator_dev *reg)
 {
 	struct sh_pfc *pfc = reg->reg_data;
-	void __iomem *addr = pfc->window[1].virt + 4;
+	void __iomem *addr = pfc->windows[1].virt + 4;
 	unsigned long flags;
 	u32 value;
 
@@ -3794,7 +3794,7 @@ static const unsigned int sh73a0_portcr_offsets[] = {
 
 static unsigned int sh73a0_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
 {
-	void __iomem *addr = pfc->window->virt
+	void __iomem *addr = pfc->windows->virt
 			   + sh73a0_portcr_offsets[pin >> 5] + pin;
 	u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;
 
@@ -3812,7 +3812,7 @@ static unsigned int sh73a0_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
 static void sh73a0_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
 				   unsigned int bias)
 {
-	void __iomem *addr = pfc->window->virt
+	void __iomem *addr = pfc->windows->virt
 			   + sh73a0_portcr_offsets[pin >> 5] + pin;
 	u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;
 
-- 
1.8.3.2

Re: [PATCH 05/10] sh-pfc: Rename sh_pfc window field to windows

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> There's more than one window, name the field windows.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 05/10] sh-pfc: Rename sh_pfc window field to windows

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> There's more than one window, name the field windows.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Patch applied.

Yours,
Linus Walleij

[PATCH 06/10] sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

[Laurent Pinchart]

On non-DT platforms IRQ controllers associated with the GPIOs have a
fixed IRQ base value known at compile time. The sh-pfc driver translates
GPIO number to IRQ numbers using a hardcoded table. This mechanism
breaks on DT platforms, as the IRQ base values are dynamic in that case.

Fix this by specifying IRQs associated with GPIOs in IRQ resources,
populated automatically from the device tree. When IRQ resources are
specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 +++++
 drivers/pinctrl/sh-pfc/core.c                      | 69 +++++++++++++++++-----
 drivers/pinctrl/sh-pfc/core.h                      |  2 +
 drivers/pinctrl/sh-pfc/gpio.c                      | 14 ++++-
 4 files changed, 82 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index d5dac7b..35d2e1f 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -26,6 +26,11 @@ Optional properties:
   - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
     otherwise. Should be 3.
 
+  - interrupts-extended: Specify the interrupts associated with external
+    IRQ pins. This property is mandatory when the PFC handles GPIOs and
+    forbidden otherwise. When specified, it must contain one interrupt per
+    external IRQ, sorted by external IRQ number.
+
 The PFC node also acts as a container for pin configuration nodes. Please refer
 to pinctrl-bindings.txt in this directory for the definition of the term "pin
 configuration node" and for the common pinctrl bindings used by client devices.
@@ -103,6 +108,15 @@ Example 1: SH73A0 (SH-Mobile AG5) pin controller node
 		      <0xe605801c 0x1c>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended +			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 
 Example 2: A GPIO LED node that references a GPIO
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 7831f07..b9b464d 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -26,30 +26,67 @@
 
 #include "core.h"
 
-static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
+static int sh_pfc_map_resources(struct sh_pfc *pfc,
+				struct platform_device *pdev)
 {
+	unsigned int num_windows = 0;
+	unsigned int num_irqs = 0;
+	struct sh_pfc_window *windows;
+	unsigned int *irqs = NULL;
 	struct resource *res;
-	unsigned int k;
+	unsigned int i;
+
+	/* Count the MEM and IRQ resources. */
+	for (i = 0; i < pdev->num_resources; ++i) {
+		switch (resource_type(&pdev->resource[i])) {
+		case IORESOURCE_MEM:
+			num_windows++;
+			break;
+
+		case IORESOURCE_IRQ:
+			num_irqs++;
+			break;
+		}
+	}
 
-	if (pdev->num_resources = 0)
+	if (num_windows = 0)
 		return -EINVAL;
 
-	pfc->windows = devm_kzalloc(pfc->dev, pdev->num_resources *
-				    sizeof(*pfc->windows), GFP_NOWAIT);
-	if (!pfc->windows)
+	/* Allocate memory windows and IRQs arrays. */
+	windows = devm_kzalloc(pfc->dev, num_windows * sizeof(*windows),
+			       GFP_KERNEL);
+	if (windows = NULL)
 		return -ENOMEM;
 
-	pfc->num_windows = pdev->num_resources;
+	pfc->num_windows = num_windows;
+	pfc->windows = windows;
 
-	for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
-		WARN_ON(resource_type(res) != IORESOURCE_MEM);
-		pfc->windows[k].phys = res->start;
-		pfc->windows[k].size = resource_size(res);
-		pfc->windows[k].virt -			devm_ioremap_nocache(pfc->dev, res->start,
-					     resource_size(res));
-		if (!pfc->windows[k].virt)
+	if (num_irqs) {
+		irqs = devm_kzalloc(pfc->dev, num_irqs * sizeof(*irqs),
+				    GFP_KERNEL);
+		if (irqs = NULL)
 			return -ENOMEM;
+
+		pfc->num_irqs = num_irqs;
+		pfc->irqs = irqs;
+	}
+
+	/* Fill them. */
+	for (i = 0, res = pdev->resource; i < pdev->num_resources; i++, res++) {
+		switch (resource_type(res)) {
+		case IORESOURCE_MEM:
+			windows->phys = res->start;
+			windows->size = resource_size(res);
+			windows->virt = devm_ioremap_resource(pfc->dev, res);
+			if (IS_ERR(windows->virt))
+				return -ENOMEM;
+			windows++;
+			break;
+
+		case IORESOURCE_IRQ:
+			*irqs++ = res->start;
+			break;
+		}
 	}
 
 	return 0;
@@ -482,7 +519,7 @@ static int sh_pfc_probe(struct platform_device *pdev)
 	pfc->info = info;
 	pfc->dev = &pdev->dev;
 
-	ret = sh_pfc_ioremap(pfc, pdev);
+	ret = sh_pfc_map_resources(pfc, pdev);
 	if (unlikely(ret < 0))
 		return ret;
 
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index a83b747..b7b0e6c 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -38,6 +38,8 @@ struct sh_pfc {
 
 	unsigned int num_windows;
 	struct sh_pfc_window *windows;
+	unsigned int num_irqs;
+	unsigned int *irqs;
 
 	struct sh_pfc_pin_range *ranges;
 	unsigned int nr_ranges;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 6a21349..6348081 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -211,11 +211,17 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 
 		for (k = 0; gpios[k] >= 0; k++) {
 			if (gpios[k] = offset)
-				return pfc->info->gpio_irq[i].irq;
+				goto found;
 		}
 	}
 
 	return -ENOSYS;
+
+found:
+	if (pfc->num_irqs)
+		return pfc->irqs[i];
+	else
+		return pfc->info->gpio_irq[i].irq;
 }
 
 static int gpio_pin_setup(struct sh_pfc_chip *chip)
@@ -357,6 +363,12 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 	if (i = pfc->num_windows)
 		return 0;
 
+	/* If we have IRQ resources make sure their number is correct. */
+	if (pfc->num_irqs && pfc->num_irqs != pfc->info->gpio_irq_size) {
+		dev_err(pfc->dev, "invalid number of IRQ resources\n");
+		return -EINVAL;
+	}
+
 	/* Register the real GPIOs chip. */
 	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
 	if (IS_ERR(chip))
-- 
1.8.3.2

[PATCH 06/10] sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

[Laurent Pinchart]

On non-DT platforms IRQ controllers associated with the GPIOs have a
fixed IRQ base value known at compile time. The sh-pfc driver translates
GPIO number to IRQ numbers using a hardcoded table. This mechanism
breaks on DT platforms, as the IRQ base values are dynamic in that case.

Fix this by specifying IRQs associated with GPIOs in IRQ resources,
populated automatically from the device tree. When IRQ resources are
specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Cc: devicetree at vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 +++++
 drivers/pinctrl/sh-pfc/core.c                      | 69 +++++++++++++++++-----
 drivers/pinctrl/sh-pfc/core.h                      |  2 +
 drivers/pinctrl/sh-pfc/gpio.c                      | 14 ++++-
 4 files changed, 82 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index d5dac7b..35d2e1f 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -26,6 +26,11 @@ Optional properties:
   - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
     otherwise. Should be 3.
 
+  - interrupts-extended: Specify the interrupts associated with external
+    IRQ pins. This property is mandatory when the PFC handles GPIOs and
+    forbidden otherwise. When specified, it must contain one interrupt per
+    external IRQ, sorted by external IRQ number.
+
 The PFC node also acts as a container for pin configuration nodes. Please refer
 to pinctrl-bindings.txt in this directory for the definition of the term "pin
 configuration node" and for the common pinctrl bindings used by client devices.
@@ -103,6 +108,15 @@ Example 1: SH73A0 (SH-Mobile AG5) pin controller node
 		      <0xe605801c 0x1c>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended =
+			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 
 Example 2: A GPIO LED node that references a GPIO
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 7831f07..b9b464d 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -26,30 +26,67 @@
 
 #include "core.h"
 
-static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
+static int sh_pfc_map_resources(struct sh_pfc *pfc,
+				struct platform_device *pdev)
 {
+	unsigned int num_windows = 0;
+	unsigned int num_irqs = 0;
+	struct sh_pfc_window *windows;
+	unsigned int *irqs = NULL;
 	struct resource *res;
-	unsigned int k;
+	unsigned int i;
+
+	/* Count the MEM and IRQ resources. */
+	for (i = 0; i < pdev->num_resources; ++i) {
+		switch (resource_type(&pdev->resource[i])) {
+		case IORESOURCE_MEM:
+			num_windows++;
+			break;
+
+		case IORESOURCE_IRQ:
+			num_irqs++;
+			break;
+		}
+	}
 
-	if (pdev->num_resources == 0)
+	if (num_windows == 0)
 		return -EINVAL;
 
-	pfc->windows = devm_kzalloc(pfc->dev, pdev->num_resources *
-				    sizeof(*pfc->windows), GFP_NOWAIT);
-	if (!pfc->windows)
+	/* Allocate memory windows and IRQs arrays. */
+	windows = devm_kzalloc(pfc->dev, num_windows * sizeof(*windows),
+			       GFP_KERNEL);
+	if (windows == NULL)
 		return -ENOMEM;
 
-	pfc->num_windows = pdev->num_resources;
+	pfc->num_windows = num_windows;
+	pfc->windows = windows;
 
-	for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
-		WARN_ON(resource_type(res) != IORESOURCE_MEM);
-		pfc->windows[k].phys = res->start;
-		pfc->windows[k].size = resource_size(res);
-		pfc->windows[k].virt =
-			devm_ioremap_nocache(pfc->dev, res->start,
-					     resource_size(res));
-		if (!pfc->windows[k].virt)
+	if (num_irqs) {
+		irqs = devm_kzalloc(pfc->dev, num_irqs * sizeof(*irqs),
+				    GFP_KERNEL);
+		if (irqs == NULL)
 			return -ENOMEM;
+
+		pfc->num_irqs = num_irqs;
+		pfc->irqs = irqs;
+	}
+
+	/* Fill them. */
+	for (i = 0, res = pdev->resource; i < pdev->num_resources; i++, res++) {
+		switch (resource_type(res)) {
+		case IORESOURCE_MEM:
+			windows->phys = res->start;
+			windows->size = resource_size(res);
+			windows->virt = devm_ioremap_resource(pfc->dev, res);
+			if (IS_ERR(windows->virt))
+				return -ENOMEM;
+			windows++;
+			break;
+
+		case IORESOURCE_IRQ:
+			*irqs++ = res->start;
+			break;
+		}
 	}
 
 	return 0;
@@ -482,7 +519,7 @@ static int sh_pfc_probe(struct platform_device *pdev)
 	pfc->info = info;
 	pfc->dev = &pdev->dev;
 
-	ret = sh_pfc_ioremap(pfc, pdev);
+	ret = sh_pfc_map_resources(pfc, pdev);
 	if (unlikely(ret < 0))
 		return ret;
 
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index a83b747..b7b0e6c 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -38,6 +38,8 @@ struct sh_pfc {
 
 	unsigned int num_windows;
 	struct sh_pfc_window *windows;
+	unsigned int num_irqs;
+	unsigned int *irqs;
 
 	struct sh_pfc_pin_range *ranges;
 	unsigned int nr_ranges;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 6a21349..6348081 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -211,11 +211,17 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 
 		for (k = 0; gpios[k] >= 0; k++) {
 			if (gpios[k] == offset)
-				return pfc->info->gpio_irq[i].irq;
+				goto found;
 		}
 	}
 
 	return -ENOSYS;
+
+found:
+	if (pfc->num_irqs)
+		return pfc->irqs[i];
+	else
+		return pfc->info->gpio_irq[i].irq;
 }
 
 static int gpio_pin_setup(struct sh_pfc_chip *chip)
@@ -357,6 +363,12 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 	if (i == pfc->num_windows)
 		return 0;
 
+	/* If we have IRQ resources make sure their number is correct. */
+	if (pfc->num_irqs && pfc->num_irqs != pfc->info->gpio_irq_size) {
+		dev_err(pfc->dev, "invalid number of IRQ resources\n");
+		return -EINVAL;
+	}
+
 	/* Register the real GPIOs chip. */
 	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
 	if (IS_ERR(chip))
-- 
1.8.3.2

[PATCH 06/10] sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

[Laurent Pinchart]

On non-DT platforms IRQ controllers associated with the GPIOs have a
fixed IRQ base value known at compile time. The sh-pfc driver translates
GPIO number to IRQ numbers using a hardcoded table. This mechanism
breaks on DT platforms, as the IRQ base values are dynamic in that case.

Fix this by specifying IRQs associated with GPIOs in IRQ resources,
populated automatically from the device tree. When IRQ resources are
specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 +++++
 drivers/pinctrl/sh-pfc/core.c                      | 69 +++++++++++++++++-----
 drivers/pinctrl/sh-pfc/core.h                      |  2 +
 drivers/pinctrl/sh-pfc/gpio.c                      | 14 ++++-
 4 files changed, 82 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index d5dac7b..35d2e1f 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -26,6 +26,11 @@ Optional properties:
   - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
     otherwise. Should be 3.
 
+  - interrupts-extended: Specify the interrupts associated with external
+    IRQ pins. This property is mandatory when the PFC handles GPIOs and
+    forbidden otherwise. When specified, it must contain one interrupt per
+    external IRQ, sorted by external IRQ number.
+
 The PFC node also acts as a container for pin configuration nodes. Please refer
 to pinctrl-bindings.txt in this directory for the definition of the term "pin
 configuration node" and for the common pinctrl bindings used by client devices.
@@ -103,6 +108,15 @@ Example 1: SH73A0 (SH-Mobile AG5) pin controller node
 		      <0xe605801c 0x1c>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended =
+			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 
 Example 2: A GPIO LED node that references a GPIO
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 7831f07..b9b464d 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -26,30 +26,67 @@
 
 #include "core.h"
 
-static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
+static int sh_pfc_map_resources(struct sh_pfc *pfc,
+				struct platform_device *pdev)
 {
+	unsigned int num_windows = 0;
+	unsigned int num_irqs = 0;
+	struct sh_pfc_window *windows;
+	unsigned int *irqs = NULL;
 	struct resource *res;
-	unsigned int k;
+	unsigned int i;
+
+	/* Count the MEM and IRQ resources. */
+	for (i = 0; i < pdev->num_resources; ++i) {
+		switch (resource_type(&pdev->resource[i])) {
+		case IORESOURCE_MEM:
+			num_windows++;
+			break;
+
+		case IORESOURCE_IRQ:
+			num_irqs++;
+			break;
+		}
+	}
 
-	if (pdev->num_resources == 0)
+	if (num_windows == 0)
 		return -EINVAL;
 
-	pfc->windows = devm_kzalloc(pfc->dev, pdev->num_resources *
-				    sizeof(*pfc->windows), GFP_NOWAIT);
-	if (!pfc->windows)
+	/* Allocate memory windows and IRQs arrays. */
+	windows = devm_kzalloc(pfc->dev, num_windows * sizeof(*windows),
+			       GFP_KERNEL);
+	if (windows == NULL)
 		return -ENOMEM;
 
-	pfc->num_windows = pdev->num_resources;
+	pfc->num_windows = num_windows;
+	pfc->windows = windows;
 
-	for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
-		WARN_ON(resource_type(res) != IORESOURCE_MEM);
-		pfc->windows[k].phys = res->start;
-		pfc->windows[k].size = resource_size(res);
-		pfc->windows[k].virt =
-			devm_ioremap_nocache(pfc->dev, res->start,
-					     resource_size(res));
-		if (!pfc->windows[k].virt)
+	if (num_irqs) {
+		irqs = devm_kzalloc(pfc->dev, num_irqs * sizeof(*irqs),
+				    GFP_KERNEL);
+		if (irqs == NULL)
 			return -ENOMEM;
+
+		pfc->num_irqs = num_irqs;
+		pfc->irqs = irqs;
+	}
+
+	/* Fill them. */
+	for (i = 0, res = pdev->resource; i < pdev->num_resources; i++, res++) {
+		switch (resource_type(res)) {
+		case IORESOURCE_MEM:
+			windows->phys = res->start;
+			windows->size = resource_size(res);
+			windows->virt = devm_ioremap_resource(pfc->dev, res);
+			if (IS_ERR(windows->virt))
+				return -ENOMEM;
+			windows++;
+			break;
+
+		case IORESOURCE_IRQ:
+			*irqs++ = res->start;
+			break;
+		}
 	}
 
 	return 0;
@@ -482,7 +519,7 @@ static int sh_pfc_probe(struct platform_device *pdev)
 	pfc->info = info;
 	pfc->dev = &pdev->dev;
 
-	ret = sh_pfc_ioremap(pfc, pdev);
+	ret = sh_pfc_map_resources(pfc, pdev);
 	if (unlikely(ret < 0))
 		return ret;
 
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index a83b747..b7b0e6c 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -38,6 +38,8 @@ struct sh_pfc {
 
 	unsigned int num_windows;
 	struct sh_pfc_window *windows;
+	unsigned int num_irqs;
+	unsigned int *irqs;
 
 	struct sh_pfc_pin_range *ranges;
 	unsigned int nr_ranges;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 6a21349..6348081 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -211,11 +211,17 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 
 		for (k = 0; gpios[k] >= 0; k++) {
 			if (gpios[k] == offset)
-				return pfc->info->gpio_irq[i].irq;
+				goto found;
 		}
 	}
 
 	return -ENOSYS;
+
+found:
+	if (pfc->num_irqs)
+		return pfc->irqs[i];
+	else
+		return pfc->info->gpio_irq[i].irq;
 }
 
 static int gpio_pin_setup(struct sh_pfc_chip *chip)
@@ -357,6 +363,12 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 	if (i == pfc->num_windows)
 		return 0;
 
+	/* If we have IRQ resources make sure their number is correct. */
+	if (pfc->num_irqs && pfc->num_irqs != pfc->info->gpio_irq_size) {
+		dev_err(pfc->dev, "invalid number of IRQ resources\n");
+		return -EINVAL;
+	}
+
 	/* Register the real GPIOs chip. */
 	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
 	if (IS_ERR(chip))
-- 
1.8.3.2

Re: [PATCH 06/10] sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> On non-DT platforms IRQ controllers associated with the GPIOs have a
> fixed IRQ base value known at compile time. The sh-pfc driver translates
> GPIO number to IRQ numbers using a hardcoded table. This mechanism
> breaks on DT platforms, as the IRQ base values are dynamic in that case.
>
> Fix this by specifying IRQs associated with GPIOs in IRQ resources,
> populated automatically from the device tree. When IRQ resources are
> specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Make things much better and only use standard bindings so
patch applied.

Yours,
Linus Walleij

[PATCH 06/10] sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> On non-DT platforms IRQ controllers associated with the GPIOs have a
> fixed IRQ base value known at compile time. The sh-pfc driver translates
> GPIO number to IRQ numbers using a hardcoded table. This mechanism
> breaks on DT platforms, as the IRQ base values are dynamic in that case.
>
> Fix this by specifying IRQs associated with GPIOs in IRQ resources,
> populated automatically from the device tree. When IRQ resources are
> specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
>
> Cc: devicetree at vger.kernel.org
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Make things much better and only use standard bindings so
patch applied.

Yours,
Linus Walleij

Re: [PATCH 06/10] sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> On non-DT platforms IRQ controllers associated with the GPIOs have a
> fixed IRQ base value known at compile time. The sh-pfc driver translates
> GPIO number to IRQ numbers using a hardcoded table. This mechanism
> breaks on DT platforms, as the IRQ base values are dynamic in that case.
>
> Fix this by specifying IRQs associated with GPIOs in IRQ resources,
> populated automatically from the device tree. When IRQ resources are
> specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Make things much better and only use standard bindings so
patch applied.

Yours,
Linus Walleij

[PATCH 07/10] ARM: shmobile: r8a73a4: Specify PFC interrupts in DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a73a4.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6b7ce89..62d0211 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -288,6 +288,22 @@
 		reg = <0 0xe6050000 0 0x9000>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended +			<&irqc0  0 0>, <&irqc0  1 0>, <&irqc0  2 0>, <&irqc0  3 0>,
+			<&irqc0  4 0>, <&irqc0  5 0>, <&irqc0  6 0>, <&irqc0  7 0>,
+			<&irqc0  8 0>, <&irqc0  9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
+			<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
+			<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
+			<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
+			<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
+			<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
+			<&irqc1  0 0>, <&irqc1  1 0>, <&irqc1  2 0>, <&irqc1  3 0>,
+			<&irqc1  4 0>, <&irqc1  5 0>, <&irqc1  6 0>, <&irqc1  7 0>,
+			<&irqc1  8 0>, <&irqc1  9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
+			<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
+			<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
+			<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
+			<&irqc1 24 0>, <&irqc1 25 0>;
 	};
 
 	sdhi0: sd@ee100000 {
-- 
1.8.3.2

[PATCH 07/10] ARM: shmobile: r8a73a4: Specify PFC interrupts in DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a73a4.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6b7ce89..62d0211 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -288,6 +288,22 @@
 		reg = <0 0xe6050000 0 0x9000>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended =
+			<&irqc0  0 0>, <&irqc0  1 0>, <&irqc0  2 0>, <&irqc0  3 0>,
+			<&irqc0  4 0>, <&irqc0  5 0>, <&irqc0  6 0>, <&irqc0  7 0>,
+			<&irqc0  8 0>, <&irqc0  9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
+			<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
+			<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
+			<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
+			<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
+			<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
+			<&irqc1  0 0>, <&irqc1  1 0>, <&irqc1  2 0>, <&irqc1  3 0>,
+			<&irqc1  4 0>, <&irqc1  5 0>, <&irqc1  6 0>, <&irqc1  7 0>,
+			<&irqc1  8 0>, <&irqc1  9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
+			<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
+			<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
+			<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
+			<&irqc1 24 0>, <&irqc1 25 0>;
 	};
 
 	sdhi0: sd at ee100000 {
-- 
1.8.3.2

Re: [PATCH 07/10] ARM: shmobile: r8a73a4: Specify PFC interrupts in DT

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Acked-by: Linus Walleij <linus.walleij@linaro.org>
for patches 7 thru 10.

I expect these to go in through the shmobile tree.

Yours,
Linus Walleij

[PATCH 07/10] ARM: shmobile: r8a73a4: Specify PFC interrupts in DT

[Linus Walleij]

On Wed, Dec 11, 2013 at 4:26 AM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Acked-by: Linus Walleij <linus.walleij@linaro.org>
for patches 7 thru 10.

I expect these to go in through the shmobile tree.

Yours,
Linus Walleij

[PATCH 08/10] ARM: shmobile: r8a7740: Specify PFC interrupts in DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 2782f64..8280884 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -155,6 +155,15 @@
 		      <0xe605800c 0x20>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended +			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 
 	tpu: pwm@e6600000 {
-- 
1.8.3.2

[PATCH 08/10] ARM: shmobile: r8a7740: Specify PFC interrupts in DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 2782f64..8280884 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -155,6 +155,15 @@
 		      <0xe605800c 0x20>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended =
+			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 
 	tpu: pwm at e6600000 {
-- 
1.8.3.2

[PATCH 09/10] ARM: shmobile: sh73a0: Specify PFC interrupts in DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 241c8cd..cb073c3 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -242,5 +242,14 @@
 		      <0xe605801c 0x1c>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended +			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 };
-- 
1.8.3.2

[PATCH 09/10] ARM: shmobile: sh73a0: Specify PFC interrupts in DT

[Laurent Pinchart]

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 241c8cd..cb073c3 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -242,5 +242,14 @@
 		      <0xe605801c 0x1c>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		interrupts-extended =
+			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
 	};
 };
-- 
1.8.3.2

[PATCH 10/10] ARM: shmobile: armadillo: dts: Add gpio-keys device

[Laurent Pinchart]

The board had 4 buttons connected to GPIOs, add a corresponding
gpio-keys device.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 6d6fd3d..e67c0a5 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -63,6 +63,35 @@
 		enable-active-high;
 	};
 
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		power-key {
+			gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
+			linux,code = <116>;
+			label = "SW3";
+			gpio-key,wakeup;
+		};
+
+		back-key {
+			gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
+			linux,code = <158>;
+			label = "SW4";
+		};
+
+		menu-key {
+			gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
+			linux,code = <139>;
+			label = "SW5";
+		};
+
+		home-key {
+			gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
+			linux,code = <102>;
+			label = "SW6";
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		led1 {
-- 
1.8.3.2

[PATCH 10/10] ARM: shmobile: armadillo: dts: Add gpio-keys device

[Laurent Pinchart]

The board had 4 buttons connected to GPIOs, add a corresponding
gpio-keys device.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 6d6fd3d..e67c0a5 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -63,6 +63,35 @@
 		enable-active-high;
 	};
 
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		power-key {
+			gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
+			linux,code = <116>;
+			label = "SW3";
+			gpio-key,wakeup;
+		};
+
+		back-key {
+			gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
+			linux,code = <158>;
+			label = "SW4";
+		};
+
+		menu-key {
+			gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
+			linux,code = <139>;
+			label = "SW5";
+		};
+
+		home-key {
+			gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
+			linux,code = <102>;
+			label = "SW6";
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		led1 {
-- 
1.8.3.2

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Magnus Damm]

On Wed, Dec 11, 2013 at 12:26 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> Hello,
>
> This patch set fixes conversion from a GPIO number to an IRQ number in the
> sh-pfc driver in the device tree case.
>
> Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix in
> patch 06/10. As explained in patch 06/10 commit message, on non-DT platforms
> IRQ controllers associated with the GPIOs have a fixed IRQ base value known at
> compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a
> hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values
> are dynamic in that case.
>
> The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> resources, populated automatically from the device tree. When IRQ resources
> are specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
>
> Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0, R8A73A4
> and R9A7740 SoCs. The only missing platform here is SH7372 due to its very
> uncomplete DT support. All other Renesas ARM platforms use a standaline GPIO
> driver and are thus not affected.
>
> Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> allowing the whole patch set to the tested.
>
> The sh-pfc changes need to be merged first. Linus, could you please provide a
> stable branch with the first 6 patches when you will apply them to your tree ?
>
> Laurent Pinchart (10):
>   sh-pfc: Turn unsigned indices into unsigned int
>   sh-pfc: Terminate gpios array by -1
>   sh-pfc: sh73a0: Add missing IRQ15
>   sh-pfc: sh73a0: Sort IRQ entries by IRQ number
>   sh-pfc: Rename sh_pfc window field to windows
>   sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
>   ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
>   ARM: shmobile: r8a7740: Specify PFC interrupts in DT
>   ARM: shmobile: sh73a0: Specify PFC interrupts in DT
>   ARM: shmobile: armadillo: dts: Add gpio-keys device

Looking great, nice to see that this is getting resolved! For the entire series:

Acked-by: Magnus Damm <damm@opensource.se>

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Magnus Damm]

On Wed, Dec 11, 2013 at 12:26 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> Hello,
>
> This patch set fixes conversion from a GPIO number to an IRQ number in the
> sh-pfc driver in the device tree case.
>
> Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix in
> patch 06/10. As explained in patch 06/10 commit message, on non-DT platforms
> IRQ controllers associated with the GPIOs have a fixed IRQ base value known at
> compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a
> hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values
> are dynamic in that case.
>
> The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> resources, populated automatically from the device tree. When IRQ resources
> are specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
>
> Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0, R8A73A4
> and R9A7740 SoCs. The only missing platform here is SH7372 due to its very
> uncomplete DT support. All other Renesas ARM platforms use a standaline GPIO
> driver and are thus not affected.
>
> Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> allowing the whole patch set to the tested.
>
> The sh-pfc changes need to be merged first. Linus, could you please provide a
> stable branch with the first 6 patches when you will apply them to your tree ?
>
> Laurent Pinchart (10):
>   sh-pfc: Turn unsigned indices into unsigned int
>   sh-pfc: Terminate gpios array by -1
>   sh-pfc: sh73a0: Add missing IRQ15
>   sh-pfc: sh73a0: Sort IRQ entries by IRQ number
>   sh-pfc: Rename sh_pfc window field to windows
>   sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
>   ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
>   ARM: shmobile: r8a7740: Specify PFC interrupts in DT
>   ARM: shmobile: sh73a0: Specify PFC interrupts in DT
>   ARM: shmobile: armadillo: dts: Add gpio-keys device

Looking great, nice to see that this is getting resolved! For the entire series:

Acked-by: Magnus Damm <damm@opensource.se>

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Wed, Dec 11, 2013 at 04:26:20AM +0100, Laurent Pinchart wrote:
> Hello,
> 
> This patch set fixes conversion from a GPIO number to an IRQ number in the
> sh-pfc driver in the device tree case.
> 
> Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix in
> patch 06/10. As explained in patch 06/10 commit message, on non-DT platforms
> IRQ controllers associated with the GPIOs have a fixed IRQ base value known at
> compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a
> hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values
> are dynamic in that case.
> 
> The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> resources, populated automatically from the device tree. When IRQ resources
> are specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
> 
> Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0, R8A73A4
> and R9A7740 SoCs. The only missing platform here is SH7372 due to its very
> uncomplete DT support. All other Renesas ARM platforms use a standaline GPIO
> driver and are thus not affected.

s/uncomplete/incomplete/

> Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> allowing the whole patch set to the tested.
> 
> The sh-pfc changes need to be merged first. Linus, could you please provide a
> stable branch with the first 6 patches when you will apply them to your tree ?

It seems to me that if Linus applies the pfc changes the
shmobile changes could be applied independently. Am I missing
and do the shmobile patches have build-dependencies on the pfc patches?

> 
> Laurent Pinchart (10):
>   sh-pfc: Turn unsigned indices into unsigned int
>   sh-pfc: Terminate gpios array by -1
>   sh-pfc: sh73a0: Add missing IRQ15
>   sh-pfc: sh73a0: Sort IRQ entries by IRQ number
>   sh-pfc: Rename sh_pfc window field to windows
>   sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
>   ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
>   ARM: shmobile: r8a7740: Specify PFC interrupts in DT
>   ARM: shmobile: sh73a0: Specify PFC interrupts in DT
>   ARM: shmobile: armadillo: dts: Add gpio-keys device
> 
>  .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 ++++
>  arch/arm/boot/dts/r8a73a4.dtsi                     | 16 +++++
>  .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 +++++++++
>  arch/arm/boot/dts/r8a7740.dtsi                     |  9 +++
>  arch/arm/boot/dts/sh73a0.dtsi                      |  9 +++
>  drivers/pinctrl/sh-pfc/core.c                      | 76 ++++++++++++++++------
>  drivers/pinctrl/sh-pfc/core.h                      |  4 +-
>  drivers/pinctrl/sh-pfc/gpio.c                      | 24 +++++--
>  drivers/pinctrl/sh-pfc/pfc-r8a73a4.c               |  4 +-
>  drivers/pinctrl/sh-pfc/pfc-r8a7740.c               |  2 +-
>  drivers/pinctrl/sh-pfc/pfc-sh7372.c                |  2 +-
>  drivers/pinctrl/sh-pfc/pfc-sh73a0.c                | 54 +++++++--------
>  drivers/pinctrl/sh-pfc/sh_pfc.h                    |  4 +-
>  13 files changed, 188 insertions(+), 59 deletions(-)
> 
> -- 
> Regards,
> 
> Laurent Pinchart
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Wed, Dec 11, 2013 at 04:26:20AM +0100, Laurent Pinchart wrote:
> Hello,
> 
> This patch set fixes conversion from a GPIO number to an IRQ number in the
> sh-pfc driver in the device tree case.
> 
> Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix in
> patch 06/10. As explained in patch 06/10 commit message, on non-DT platforms
> IRQ controllers associated with the GPIOs have a fixed IRQ base value known at
> compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a
> hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values
> are dynamic in that case.
> 
> The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> resources, populated automatically from the device tree. When IRQ resources
> are specified the driver requires one IRQ resource per GPIO able to generate
> an interrupt, and uses the translation table to compute the IRQ resource
> offset instead of the IRQ number.
> 
> Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0, R8A73A4
> and R9A7740 SoCs. The only missing platform here is SH7372 due to its very
> uncomplete DT support. All other Renesas ARM platforms use a standaline GPIO
> driver and are thus not affected.

s/uncomplete/incomplete/

> Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> allowing the whole patch set to the tested.
> 
> The sh-pfc changes need to be merged first. Linus, could you please provide a
> stable branch with the first 6 patches when you will apply them to your tree ?

It seems to me that if Linus applies the pfc changes the
shmobile changes could be applied independently. Am I missing
and do the shmobile patches have build-dependencies on the pfc patches?

> 
> Laurent Pinchart (10):
>   sh-pfc: Turn unsigned indices into unsigned int
>   sh-pfc: Terminate gpios array by -1
>   sh-pfc: sh73a0: Add missing IRQ15
>   sh-pfc: sh73a0: Sort IRQ entries by IRQ number
>   sh-pfc: Rename sh_pfc window field to windows
>   sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
>   ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
>   ARM: shmobile: r8a7740: Specify PFC interrupts in DT
>   ARM: shmobile: sh73a0: Specify PFC interrupts in DT
>   ARM: shmobile: armadillo: dts: Add gpio-keys device
> 
>  .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 ++++
>  arch/arm/boot/dts/r8a73a4.dtsi                     | 16 +++++
>  .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 +++++++++
>  arch/arm/boot/dts/r8a7740.dtsi                     |  9 +++
>  arch/arm/boot/dts/sh73a0.dtsi                      |  9 +++
>  drivers/pinctrl/sh-pfc/core.c                      | 76 ++++++++++++++++------
>  drivers/pinctrl/sh-pfc/core.h                      |  4 +-
>  drivers/pinctrl/sh-pfc/gpio.c                      | 24 +++++--
>  drivers/pinctrl/sh-pfc/pfc-r8a73a4.c               |  4 +-
>  drivers/pinctrl/sh-pfc/pfc-r8a7740.c               |  2 +-
>  drivers/pinctrl/sh-pfc/pfc-sh7372.c                |  2 +-
>  drivers/pinctrl/sh-pfc/pfc-sh73a0.c                | 54 +++++++--------
>  drivers/pinctrl/sh-pfc/sh_pfc.h                    |  4 +-
>  13 files changed, 188 insertions(+), 59 deletions(-)
> 
> -- 
> Regards,
> 
> Laurent Pinchart
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Laurent Pinchart]

Hi Simon,

On Thursday 12 December 2013 22:11:39 Simon Horman wrote:
> On Wed, Dec 11, 2013 at 04:26:20AM +0100, Laurent Pinchart wrote:
> > Hello,
> > 
> > This patch set fixes conversion from a GPIO number to an IRQ number in the
> > sh-pfc driver in the device tree case.
> > 
> > Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix
> > in patch 06/10. As explained in patch 06/10 commit message, on non-DT
> > platforms IRQ controllers associated with the GPIOs have a fixed IRQ base
> > value known at compile time. The sh-pfc driver translates GPIO number to
> > IRQ numbers using a hardcoded table. This mechanism breaks on DT
> > platforms, as the IRQ base values are dynamic in that case.
> > 
> > The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> > resources, populated automatically from the device tree. When IRQ
> > resources
> > are specified the driver requires one IRQ resource per GPIO able to
> > generate an interrupt, and uses the translation table to compute the IRQ
> > resource offset instead of the IRQ number.
> > 
> > Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0,
> > R8A73A4 and R9A7740 SoCs. The only missing platform here is SH7372 due to
> > its very uncomplete DT support. All other Renesas ARM platforms use a
> > standaline GPIO driver and are thus not affected.
> 
> s/uncomplete/incomplete/
> 
> > Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> > allowing the whole patch set to the tested.
> > 
> > The sh-pfc changes need to be merged first. Linus, could you please
> > provide a stable branch with the first 6 patches when you will apply them
> > to your tree ?
>
> It seems to me that if Linus applies the pfc changes the
> shmobile changes could be applied independently. Am I missing
> and do the shmobile patches have build-dependencies on the pfc patches?

The DTS patches will result in the PFC platform device having IRQ resources. 
The sh-pfc driver currently supports MEM resources only and will crash.

> > Laurent Pinchart (10):
> >   sh-pfc: Turn unsigned indices into unsigned int
> >   sh-pfc: Terminate gpios array by -1
> >   sh-pfc: sh73a0: Add missing IRQ15
> >   sh-pfc: sh73a0: Sort IRQ entries by IRQ number
> >   sh-pfc: Rename sh_pfc window field to windows
> >   sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
> >   ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
> >   ARM: shmobile: r8a7740: Specify PFC interrupts in DT
> >   ARM: shmobile: sh73a0: Specify PFC interrupts in DT
> >   ARM: shmobile: armadillo: dts: Add gpio-keys device
> >  
> >  .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 ++++
> >  arch/arm/boot/dts/r8a73a4.dtsi                     | 16 +++++
> >  .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 +++++++++
> >  arch/arm/boot/dts/r8a7740.dtsi                     |  9 +++
> >  arch/arm/boot/dts/sh73a0.dtsi                      |  9 +++
> >  drivers/pinctrl/sh-pfc/core.c                      | 76 +++++++++++------
> >  drivers/pinctrl/sh-pfc/core.h                      |  4 +-
> >  drivers/pinctrl/sh-pfc/gpio.c                      | 24 +++++--
> >  drivers/pinctrl/sh-pfc/pfc-r8a73a4.c               |  4 +-
> >  drivers/pinctrl/sh-pfc/pfc-r8a7740.c               |  2 +-
> >  drivers/pinctrl/sh-pfc/pfc-sh7372.c                |  2 +-
> >  drivers/pinctrl/sh-pfc/pfc-sh73a0.c                | 54 +++++++--------
> >  drivers/pinctrl/sh-pfc/sh_pfc.h                    |  4 +-
> >  13 files changed, 188 insertions(+), 59 deletions(-)
-- 
Regards,

Laurent Pinchart

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Laurent Pinchart]

Hi Simon,

On Thursday 12 December 2013 22:11:39 Simon Horman wrote:
> On Wed, Dec 11, 2013 at 04:26:20AM +0100, Laurent Pinchart wrote:
> > Hello,
> > 
> > This patch set fixes conversion from a GPIO number to an IRQ number in the
> > sh-pfc driver in the device tree case.
> > 
> > Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix
> > in patch 06/10. As explained in patch 06/10 commit message, on non-DT
> > platforms IRQ controllers associated with the GPIOs have a fixed IRQ base
> > value known at compile time. The sh-pfc driver translates GPIO number to
> > IRQ numbers using a hardcoded table. This mechanism breaks on DT
> > platforms, as the IRQ base values are dynamic in that case.
> > 
> > The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> > resources, populated automatically from the device tree. When IRQ
> > resources
> > are specified the driver requires one IRQ resource per GPIO able to
> > generate an interrupt, and uses the translation table to compute the IRQ
> > resource offset instead of the IRQ number.
> > 
> > Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0,
> > R8A73A4 and R9A7740 SoCs. The only missing platform here is SH7372 due to
> > its very uncomplete DT support. All other Renesas ARM platforms use a
> > standaline GPIO driver and are thus not affected.
> 
> s/uncomplete/incomplete/
> 
> > Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> > allowing the whole patch set to the tested.
> > 
> > The sh-pfc changes need to be merged first. Linus, could you please
> > provide a stable branch with the first 6 patches when you will apply them
> > to your tree ?
>
> It seems to me that if Linus applies the pfc changes the
> shmobile changes could be applied independently. Am I missing
> and do the shmobile patches have build-dependencies on the pfc patches?

The DTS patches will result in the PFC platform device having IRQ resources. 
The sh-pfc driver currently supports MEM resources only and will crash.

> > Laurent Pinchart (10):
> >   sh-pfc: Turn unsigned indices into unsigned int
> >   sh-pfc: Terminate gpios array by -1
> >   sh-pfc: sh73a0: Add missing IRQ15
> >   sh-pfc: sh73a0: Sort IRQ entries by IRQ number
> >   sh-pfc: Rename sh_pfc window field to windows
> >   sh-pfc: Support GPIO to IRQ mapping specified IRQ resources
> >   ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
> >   ARM: shmobile: r8a7740: Specify PFC interrupts in DT
> >   ARM: shmobile: sh73a0: Specify PFC interrupts in DT
> >   ARM: shmobile: armadillo: dts: Add gpio-keys device
> >  
> >  .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 14 ++++
> >  arch/arm/boot/dts/r8a73a4.dtsi                     | 16 +++++
> >  .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 +++++++++
> >  arch/arm/boot/dts/r8a7740.dtsi                     |  9 +++
> >  arch/arm/boot/dts/sh73a0.dtsi                      |  9 +++
> >  drivers/pinctrl/sh-pfc/core.c                      | 76 +++++++++++------
> >  drivers/pinctrl/sh-pfc/core.h                      |  4 +-
> >  drivers/pinctrl/sh-pfc/gpio.c                      | 24 +++++--
> >  drivers/pinctrl/sh-pfc/pfc-r8a73a4.c               |  4 +-
> >  drivers/pinctrl/sh-pfc/pfc-r8a7740.c               |  2 +-
> >  drivers/pinctrl/sh-pfc/pfc-sh7372.c                |  2 +-
> >  drivers/pinctrl/sh-pfc/pfc-sh73a0.c                | 54 +++++++--------
> >  drivers/pinctrl/sh-pfc/sh_pfc.h                    |  4 +-
> >  13 files changed, 188 insertions(+), 59 deletions(-)
-- 
Regards,

Laurent Pinchart

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Thu, Dec 12, 2013 at 02:15:35PM +0100, Laurent Pinchart wrote:
> Hi Simon,
> 
> On Thursday 12 December 2013 22:11:39 Simon Horman wrote:
> > On Wed, Dec 11, 2013 at 04:26:20AM +0100, Laurent Pinchart wrote:
> > > Hello,
> > > 
> > > This patch set fixes conversion from a GPIO number to an IRQ number in the
> > > sh-pfc driver in the device tree case.
> > > 
> > > Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix
> > > in patch 06/10. As explained in patch 06/10 commit message, on non-DT
> > > platforms IRQ controllers associated with the GPIOs have a fixed IRQ base
> > > value known at compile time. The sh-pfc driver translates GPIO number to
> > > IRQ numbers using a hardcoded table. This mechanism breaks on DT
> > > platforms, as the IRQ base values are dynamic in that case.
> > > 
> > > The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> > > resources, populated automatically from the device tree. When IRQ
> > > resources
> > > are specified the driver requires one IRQ resource per GPIO able to
> > > generate an interrupt, and uses the translation table to compute the IRQ
> > > resource offset instead of the IRQ number.
> > > 
> > > Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0,
> > > R8A73A4 and R9A7740 SoCs. The only missing platform here is SH7372 due to
> > > its very uncomplete DT support. All other Renesas ARM platforms use a
> > > standaline GPIO driver and are thus not affected.
> > 
> > s/uncomplete/incomplete/
> > 
> > > Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> > > allowing the whole patch set to the tested.
> > > 
> > > The sh-pfc changes need to be merged first. Linus, could you please
> > > provide a stable branch with the first 6 patches when you will apply them
> > > to your tree ?
> >
> > It seems to me that if Linus applies the pfc changes the
> > shmobile changes could be applied independently. Am I missing
> > and do the shmobile patches have build-dependencies on the pfc patches?
> 
> The DTS patches will result in the PFC platform device having IRQ resources. 
> The sh-pfc driver currently supports MEM resources only and will crash.

Thanks, got it :)

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Thu, Dec 12, 2013 at 02:15:35PM +0100, Laurent Pinchart wrote:
> Hi Simon,
> 
> On Thursday 12 December 2013 22:11:39 Simon Horman wrote:
> > On Wed, Dec 11, 2013 at 04:26:20AM +0100, Laurent Pinchart wrote:
> > > Hello,
> > > 
> > > This patch set fixes conversion from a GPIO number to an IRQ number in the
> > > sh-pfc driver in the device tree case.
> > > 
> > > Patches 01/10 to 05/10 clean up the driver to prepare it for the core fix
> > > in patch 06/10. As explained in patch 06/10 commit message, on non-DT
> > > platforms IRQ controllers associated with the GPIOs have a fixed IRQ base
> > > value known at compile time. The sh-pfc driver translates GPIO number to
> > > IRQ numbers using a hardcoded table. This mechanism breaks on DT
> > > platforms, as the IRQ base values are dynamic in that case.
> > > 
> > > The patch set fixes this by specifying IRQs associated with GPIOs in IRQ
> > > resources, populated automatically from the device tree. When IRQ
> > > resources
> > > are specified the driver requires one IRQ resource per GPIO able to
> > > generate an interrupt, and uses the translation table to compute the IRQ
> > > resource offset instead of the IRQ number.
> > > 
> > > Patches 07/10 to 09/10 then add PFC interrupts in DT for the SH73A0,
> > > R8A73A4 and R9A7740 SoCs. The only missing platform here is SH7372 due to
> > > its very uncomplete DT support. All other Renesas ARM platforms use a
> > > standaline GPIO driver and are thus not affected.
> > 
> > s/uncomplete/incomplete/
> > 
> > > Patch 10/10 finally adds a gpio-keys device to the Armadillo board DTS,
> > > allowing the whole patch set to the tested.
> > > 
> > > The sh-pfc changes need to be merged first. Linus, could you please
> > > provide a stable branch with the first 6 patches when you will apply them
> > > to your tree ?
> >
> > It seems to me that if Linus applies the pfc changes the
> > shmobile changes could be applied independently. Am I missing
> > and do the shmobile patches have build-dependencies on the pfc patches?
> 
> The DTS patches will result in the PFC platform device having IRQ resources. 
> The sh-pfc driver currently supports MEM resources only and will crash.

Thanks, got it :)

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Linus Walleij]

On Thu, Dec 12, 2013 at 2:11 PM, Simon Horman <horms@verge.net.au> wrote:

> It seems to me that if Linus applies the pfc changes the
> shmobile changes could be applied independently. Am I missing
> and do the shmobile patches have build-dependencies on the pfc patches?

I've applied the PFC changes to the pin control tree and will push
to kernelorg shortly, then allow it to stablilze before you attempt to
pull that into the SH mobile tree please, and notify me before
doing so and make sure to just pick the top commit you need.

Yours,
Linus Walleij

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Linus Walleij]

On Thu, Dec 12, 2013 at 2:11 PM, Simon Horman <horms@verge.net.au> wrote:

> It seems to me that if Linus applies the pfc changes the
> shmobile changes could be applied independently. Am I missing
> and do the shmobile patches have build-dependencies on the pfc patches?

I've applied the PFC changes to the pin control tree and will push
to kernelorg shortly, then allow it to stablilze before you attempt to
pull that into the SH mobile tree please, and notify me before
doing so and make sure to just pick the top commit you need.

Yours,
Linus Walleij

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Thu, Dec 12, 2013 at 10:05:55PM +0100, Linus Walleij wrote:
> On Thu, Dec 12, 2013 at 2:11 PM, Simon Horman <horms@verge.net.au> wrote:
> 
> > It seems to me that if Linus applies the pfc changes the
> > shmobile changes could be applied independently. Am I missing
> > and do the shmobile patches have build-dependencies on the pfc patches?
> 
> I've applied the PFC changes to the pin control tree and will push
> to kernelorg shortly, then allow it to stablilze before you attempt to
> pull that into the SH mobile tree please, and notify me before
> doing so and make sure to just pick the top commit you need.

Thanks, I understand.

I'll re-visit this next week.

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Thu, Dec 12, 2013 at 10:05:55PM +0100, Linus Walleij wrote:
> On Thu, Dec 12, 2013 at 2:11 PM, Simon Horman <horms@verge.net.au> wrote:
> 
> > It seems to me that if Linus applies the pfc changes the
> > shmobile changes could be applied independently. Am I missing
> > and do the shmobile patches have build-dependencies on the pfc patches?
> 
> I've applied the PFC changes to the pin control tree and will push
> to kernelorg shortly, then allow it to stablilze before you attempt to
> pull that into the SH mobile tree please, and notify me before
> doing so and make sure to just pick the top commit you need.

Thanks, I understand.

I'll re-visit this next week.

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Fri, Dec 13, 2013 at 09:14:56AM +0900, Simon Horman wrote:
> On Thu, Dec 12, 2013 at 10:05:55PM +0100, Linus Walleij wrote:
> > On Thu, Dec 12, 2013 at 2:11 PM, Simon Horman <horms@verge.net.au> wrote:
> > 
> > > It seems to me that if Linus applies the pfc changes the
> > > shmobile changes could be applied independently. Am I missing
> > > and do the shmobile patches have build-dependencies on the pfc patches?
> > 
> > I've applied the PFC changes to the pin control tree and will push
> > to kernelorg shortly, then allow it to stablilze before you attempt to
> > pull that into the SH mobile tree please, and notify me before
> > doing so and make sure to just pick the top commit you need.
> 
> Thanks, I understand.
> 
> I'll re-visit this next week.

Hi Linus,

just to let you know I am planning to use
70c8f01a357ac74d ("sh-pfc: Support GPIO to IRQ mapping specified IRQ resources")

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Fri, Dec 13, 2013 at 09:14:56AM +0900, Simon Horman wrote:
> On Thu, Dec 12, 2013 at 10:05:55PM +0100, Linus Walleij wrote:
> > On Thu, Dec 12, 2013 at 2:11 PM, Simon Horman <horms@verge.net.au> wrote:
> > 
> > > It seems to me that if Linus applies the pfc changes the
> > > shmobile changes could be applied independently. Am I missing
> > > and do the shmobile patches have build-dependencies on the pfc patches?
> > 
> > I've applied the PFC changes to the pin control tree and will push
> > to kernelorg shortly, then allow it to stablilze before you attempt to
> > pull that into the SH mobile tree please, and notify me before
> > doing so and make sure to just pick the top commit you need.
> 
> Thanks, I understand.
> 
> I'll re-visit this next week.

Hi Linus,

just to let you know I am planning to use
70c8f01a357ac74d ("sh-pfc: Support GPIO to IRQ mapping specified IRQ resources")

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Linus Walleij]

On Thu, Dec 19, 2013 at 7:40 AM, Simon Horman <horms@verge.net.au> wrote:

> just to let you know I am planning to use
> 70c8f01a357ac74d ("sh-pfc: Support GPIO to IRQ mapping specified IRQ resources")

OK go ahead and pull that to your tree.

Yours,
Linus Walleij

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Linus Walleij]

On Thu, Dec 19, 2013 at 7:40 AM, Simon Horman <horms@verge.net.au> wrote:

> just to let you know I am planning to use
> 70c8f01a357ac74d ("sh-pfc: Support GPIO to IRQ mapping specified IRQ resources")

OK go ahead and pull that to your tree.

Yours,
Linus Walleij

Re: [PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Mon, Dec 23, 2013 at 06:27:57PM +0100, Linus Walleij wrote:
> On Thu, Dec 19, 2013 at 7:40 AM, Simon Horman <horms@verge.net.au> wrote:
> 
> > just to let you know I am planning to use
> > 70c8f01a357ac74d ("sh-pfc: Support GPIO to IRQ mapping specified IRQ resources")
> 
> OK go ahead and pull that to your tree.

Thanks, done.

[PATCH 00/10] sh-pfc: Fix GPIO to IRQ mapping

[Simon Horman]

On Mon, Dec 23, 2013 at 06:27:57PM +0100, Linus Walleij wrote:
> On Thu, Dec 19, 2013 at 7:40 AM, Simon Horman <horms@verge.net.au> wrote:
> 
> > just to let you know I am planning to use
> > 70c8f01a357ac74d ("sh-pfc: Support GPIO to IRQ mapping specified IRQ resources")
> 
> OK go ahead and pull that to your tree.

Thanks, done.