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From: Atish Patra <atish.patra@wdc.com>
To: linux-riscv@lists.infradead.org, palmer@sifive.com
Cc: anup@brainfault.org, hch@infradead.org,
	linux-kernel@vger.kernel.org, atish.patra@wdc.com
Subject: [PATCH v6 06/14] RISC-V: Provide a cleaner raw_smp_processor_id()
Date: Tue,  2 Oct 2018 12:14:59 -0700	[thread overview]
Message-ID: <1538507707-22299-7-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1538507707-22299-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

I'm not sure how I managed to miss this the first time, but this is much
better.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: code comment formatting and other fixes]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/smp.h | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 36016845..85d7619e 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -14,13 +14,9 @@
 #ifndef _ASM_RISCV_SMP_H
 #define _ASM_RISCV_SMP_H
 
-/* This both needs asm-offsets.h and is used when generating it. */
-#ifndef GENERATING_ASM_OFFSETS
-#include <asm/asm-offsets.h>
-#endif
-
 #include <linux/cpumask.h>
 #include <linux/irqreturn.h>
+#include <linux/thread_info.h>
 
 #ifdef CONFIG_SMP
 
@@ -34,12 +30,10 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
 void arch_send_call_function_single_ipi(int cpu);
 
 /*
- * This is particularly ugly: it appears we can't actually get the definition
- * of task_struct here, but we need access to the CPU this task is running on.
- * Instead of using C we're using asm-offsets.h to get the current processor
- * ID.
+ * Obtains the hart ID of the currently executing task.  This relies on
+ * THREAD_INFO_IN_TASK, but we define that unconditionally.
  */
-#define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
+#define raw_smp_processor_id() (current_thread_info()->cpu)
 
 #endif /* CONFIG_SMP */
 
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: atish.patra@wdc.com (Atish Patra)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v6 06/14] RISC-V: Provide a cleaner raw_smp_processor_id()
Date: Tue,  2 Oct 2018 12:14:59 -0700	[thread overview]
Message-ID: <1538507707-22299-7-git-send-email-atish.patra@wdc.com> (raw)
In-Reply-To: <1538507707-22299-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

I'm not sure how I managed to miss this the first time, but this is much
better.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: code comment formatting and other fixes]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/smp.h | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 36016845..85d7619e 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -14,13 +14,9 @@
 #ifndef _ASM_RISCV_SMP_H
 #define _ASM_RISCV_SMP_H
 
-/* This both needs asm-offsets.h and is used when generating it. */
-#ifndef GENERATING_ASM_OFFSETS
-#include <asm/asm-offsets.h>
-#endif
-
 #include <linux/cpumask.h>
 #include <linux/irqreturn.h>
+#include <linux/thread_info.h>
 
 #ifdef CONFIG_SMP
 
@@ -34,12 +30,10 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
 void arch_send_call_function_single_ipi(int cpu);
 
 /*
- * This is particularly ugly: it appears we can't actually get the definition
- * of task_struct here, but we need access to the CPU this task is running on.
- * Instead of using C we're using asm-offsets.h to get the current processor
- * ID.
+ * Obtains the hart ID of the currently executing task.  This relies on
+ * THREAD_INFO_IN_TASK, but we define that unconditionally.
  */
-#define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
+#define raw_smp_processor_id() (current_thread_info()->cpu)
 
 #endif /* CONFIG_SMP */
 
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@wdc.com>
To: linux-riscv@lists.infradead.org, palmer@sifive.com
Cc: hch@infradead.org, anup@brainfault.org,
	linux-kernel@vger.kernel.org, atish.patra@wdc.com
Subject: [PATCH v6 06/14] RISC-V: Provide a cleaner raw_smp_processor_id()
Date: Tue,  2 Oct 2018 12:14:59 -0700	[thread overview]
Message-ID: <1538507707-22299-7-git-send-email-atish.patra@wdc.com> (raw)
Message-ID: <20181002191459.T587hftzjdznnKiqkvkReNZfYh7A4EA4GkZ5-_6zKXc@z> (raw)
In-Reply-To: <1538507707-22299-1-git-send-email-atish.patra@wdc.com>

From: Palmer Dabbelt <palmer@sifive.com>

I'm not sure how I managed to miss this the first time, but this is much
better.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: code comment formatting and other fixes]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/include/asm/smp.h | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 36016845..85d7619e 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -14,13 +14,9 @@
 #ifndef _ASM_RISCV_SMP_H
 #define _ASM_RISCV_SMP_H
 
-/* This both needs asm-offsets.h and is used when generating it. */
-#ifndef GENERATING_ASM_OFFSETS
-#include <asm/asm-offsets.h>
-#endif
-
 #include <linux/cpumask.h>
 #include <linux/irqreturn.h>
+#include <linux/thread_info.h>
 
 #ifdef CONFIG_SMP
 
@@ -34,12 +30,10 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
 void arch_send_call_function_single_ipi(int cpu);
 
 /*
- * This is particularly ugly: it appears we can't actually get the definition
- * of task_struct here, but we need access to the CPU this task is running on.
- * Instead of using C we're using asm-offsets.h to get the current processor
- * ID.
+ * Obtains the hart ID of the currently executing task.  This relies on
+ * THREAD_INFO_IN_TASK, but we define that unconditionally.
  */
-#define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
+#define raw_smp_processor_id() (current_thread_info()->cpu)
 
 #endif /* CONFIG_SMP */
 
-- 
2.7.4


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  parent reply	other threads:[~2018-10-02 19:15 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-02 19:14 [PATCH v6 00/14] SMP cleanup and new features Atish Patra
2018-10-02 19:14 ` Atish Patra
2018-10-02 19:14 ` Atish Patra
2018-10-02 19:14 ` [PATCH v6 01/14] RISC-V: No need to pass scause as arg to do_IRQ() Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14 ` [PATCH v6 02/14] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Atish Patra
2018-10-02 19:14   ` [PATCH v6 02/14] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes} Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14 ` [PATCH v6 03/14] RISC-V: Filter ISA and MMU values in cpuinfo Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14 ` [PATCH v6 04/14] RISC-V: Comment on the TLB flush in smp_callin() Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14 ` [PATCH v6 05/14] RISC-V: Disable preemption before enabling interrupts Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:14 ` Atish Patra [this message]
2018-10-02 19:14   ` [PATCH v6 06/14] RISC-V: Provide a cleaner raw_smp_processor_id() Atish Patra
2018-10-02 19:14   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 07/14] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 08/14] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 09/14] RISC-V: Use mmgrab() Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 10/14] RISC-V: Use WRITE_ONCE instead of direct access Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 11/14] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 12/14] RISC-V: Use Linux logical CPU number instead of hartid Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 13/14] RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15 ` [PATCH v6 14/14] RISC-V: Show IPI stats Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:15   ` Atish Patra
2018-10-02 19:40 ` [PATCH v6 00/14] SMP cleanup and new features Palmer Dabbelt
2018-10-02 19:40   ` Palmer Dabbelt
2018-10-02 19:40   ` Palmer Dabbelt

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